AD AD7111KN Lc2mos logdac logarithmic d/a converter Datasheet

a
FEATURES
Dynamic Range: 88.5 dB
Resolution: 0.375 dB
On-Chip Data Latches
+5 V Operation
AD7111A Pin Compatible with AD7524
Low Power
LC2MOS LOGDAC
Logarithmic D/A Converter
AD7111/AD7111A
FUNCTIONAL BLOCK DIAGRAMS
VDD
VIN
R FB
AD7111
I OUT
17-BIT DAC
AGND
APPLICATIONS
Audio Attenuators
Sonar Systems
Function Generators
Digitally Controlled AGC System
GENERAL DESCRIPTION
The LOGDAC AD7111/AD7111A are monolithic multiplying
D/A converters featuring wide dynamic range in a small package. Both DACs can attenuate an analog input signal over the
range 0 dB to 88.5 dB in 0.375 dB steps. They are available in
16-pin DIPs and SOIC packages. The AD7111 is also available
in a 20-terminal LCCC package.
The degree of attenuation across the DAC is determined by an
8-bit word applied to the onboard decode logic. This 8-bit word
is decoded into a 17-bit word which is then applied to a 17-bit
R-2R ladder. The very fine step resolution, which is available
over the entire dynamic range, is due to the use of this 17-bit
DAC.
The AD7111/AD7111A are easily interfaced to a standard 8-bit
MPU bus via an 8-bit data port and standard microprocessor
control lines. The AD7111 WR input is edge triggered and requires a rising edge to load new data to the DAC. The AD7111A
WR is level triggered to allow transparent operation of the
latches, if required. It should also be noted that the AD7111A is
exactly pin and function-compatible with the AD7524, an industry standard 8-bit multiplying DAC. This allows an easy upgrading of existing AD7524 designs which would benefit both
from the wider dynamic range and the finer step resolution offered by the AD7111A.
The AD7111/AD7111A are fabricated in Linear Compatible
CMOS (LC2MOS), an advanced, mixed technology process that
combines precision bipolar circuits with low power CMOS logic.
LOGDAC is a registered trademark of Analog Devices, Inc.
17-BIT LATCH
DECODE LOGIC
CONTROL LOGIC
8-BIT BUFFER
D0 – D7
WR
CS
VDD
DGND
VIN
R FB
AD7111A
I OUT
17-BIT DAC
AGND
17-BIT LATCH
DECODE LOGIC
CONTROL LOGIC
CS
8-BIT BUFFER
WR
D0 – D7
DGND
PRODUCT HIGHLIGHTS
1. Wide Dynamic Range: 0 dB to 88.5 dB attenuation range in
0.375 dB steps.
2. Small Package: The AD7111/AD7111A are available in
16-pin DIPs and SOIC packages.
3. Transparent Latch Operation: By tying the CS and WR inputs low, the DAC latches in the AD7111A can be made
transparent.
4. Fast Microprocessor Interface: Data setup times of 25 ns and
write pulse width of 57 ns make the AD7111A compatible
with modern microprocessors.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
AD7111/AD7111A–SPECIFICATIONS
(V = +5 V, V
AD7111–ELECTRICAL CHARACTERISTICS
DD
IN = –10 V dc, IOUT = AGND = DGND = O V output amplifier
AD711 except where noted)
Parameter
AD7111L/C/U Grades
TA = +258C TA = TMIN, TMAX
AD7111K/B/T Grades
TA = +258C TA = TMIN, TMAX
Units
NOMINAL RESOLUTION
0.375
0.375
0.375
0.375
dB
0 to 36
0 to 54
0 to 36
0 to 54
0 to 30
0 to 48
0 to 30
0 to 48
dB min
dB min
0 to 48
0 to 72
0 to 42
0 to 66
0 to 42
0 to 72
0 to 36
0 to 60
dB min
dB min
0 to 54
Full Range
0 to 48
0 to 78
0 to 42
0 to 85.5
0 to 42
0 to 72
dB min
dB min
Conditions/Comments
ACCURACY RELATIVE TO
0 dB ATTENUATION
0.375 dB Steps:
Accuracy ≤ ± 0.17 dB
Monotonic
0.75 dB Steps:
Accuracy ≤ ± 0.35 dB
Monotonic
1.5 dB Steps:
Accuracy ≤ ± 0.7 dB
Monotonic
3.0 dB Steps:
Accuracy ≤ ± 1.4 dB
Monotonic
6.0 dB Steps:
Accuracy ≤ ± 2.7 dB
Monotonic
0 to 66
Full Range
0 to 54
Full Range
0 to 60
Full Range
0 to 48
Full Range
dB min
dB min
0 to 72
Full Range
0 to 60
Full Range
0 to 60
Full Range
0 to 48
Full Range
dB min
dB min
GAIN ERROR
± 0.1
± 0.15
± 0.15
± 0.20
dB max
VIN INPUT RESISTANCE
9/11/15
9/11/15
7/11/18
7/11/18
kΩ min/typ/max
RFB INPUT RESISTANCE
9.3/11.5/15.7 9.3/11.5/15.7
7.3/11.5/18.8 7.3/11.5/18.8
kΩ min/typ/max
DIGITAL INPUTS
VIH (Input High Voltage)
VIL (Input Low Voltage)
Input Leakage Current
2.4
0.8
±1
2.4
0.8
± 10
2.4
0.8
±1
2.4
0.8
± 10
V min
V max
µA max
Digital Inputs = V DD
0
0
350
175
10
3
0
0
500
250
10
4.5
0
0
350
175
10
3
0
0
500
250
10
4.5
ns min
ns min
ns min
ns min
ns min
µs min
Chip Select to Write Setup Time
Chip Select to Write Hold Time
Write Pulse Width
Data Valid to Write Setup Time
Data Valid to Write Hold Time
Refresh Time
+5
1
500
+5
4
1000
+5
1
500
+5
4
1000
V
mA max
µA max
SWITCHING CHARACTERISTICS
tCS
tCH
tWR
tDS
tDH
tRFSH
POWER SUPPLY
VDD
IDD
Guaranteed Attenuation Ranges
for Specified Step Sizes
Full Range Is from 0 dB
to 88.5 dB
1
Digital Inputs = VIL or VIH
Digital Inputs = 0 V or V DD;
See Figure 6
NOTE
1
Sample tested at +25°C to ensure compliance.
Specifications subject to change without notice.
AC PERFORMANCE CHARACTERISTICS
These characteristics are included for design guidance only and are not subject
to test. VDD = +5 V, VIN = –10 V dc except where noted, IOUT = AGND = DGND = O V, output amplifier AD711 except where noted.
Parameter
AD7111L/C/U Grades
TA = +258C TA = TMIN, TMAX
AD7111K/B/T Grades
TA = +258C TA = TMIN, TMAX Units
DC Supply Rejection, ∆Gain/∆VDD
Propagation Delay
0.001
3.0
0.001
3.0
Digital-to-Analog Glitch Impulse
100
Output Capacitance, Pin 1
Input Capacitance, Pin 15 and Pin 16
Feedthrough at 1 kHz
Total Harmonic Distortion
Output Noise Voltage Density
Digital Input Capacitance
185
7
–94
–91
70
7
0.005
4.5
0.005
4.5
100
185
7
–72
–91
70
7
185
7
–94
–91
70
7
185
7
–68
–91
70
7
Conditions/Comments
dB per % max ∆VDD = ± 10%, Input Code = 00000000
µs max
Full-Scale Change Measured from
WR Going High, CS = 0 V
nV secs typ
Measured with AD843 as Output
Amplifier for Code Transition
10000000 to 00000000
C1 of Figure 1 is 0 pF
pF max
pF max
dB max
dB typ
VIN = 6 V rms at 1 kHz
nV/√Hz max
Includes AD711 Amplifier Noise
pF max
Specifications subject to change without notice.
–2–
REV. 0
AD7111/AD7111A
(VDD = +5 V, VIN = –10 V dc, IOUT = AGND = DGND = O V output amplifier
AD7111A–ELECTRICAL CHARACTERISTICS AD711 except where noted)
Parameter
AD7111AC Grade
TA = +258C TA = TMIN, TMAX
AD7111AB Grade
TA = +258C TA = TMIN, TMAX
Units
NOMINAL RESOLUTION
0.375
0.375
0.375
0.375
dB
0 to 36
0 to 54
0 to 36
0 to 54
0 to 30
0 to 48
0 to 30
0 to 48
dB min
dB min
0 to 48
0 to 72
0 to 42
0 to 66
0 to 42
0 to 72
0 to 36
0 to 60
dB min
dB min
0 to 54
Full Range
0 to 48
0 to 78
0 to 48
0 to 85.5
0 to 42
0 to 72
dB min
dB min
0 to 66
Full Range
0 to 54
Full Range
0 to 60
Full Range
0 to 48
Full Range
dB min
dB min
0 to 72
Full Range
0 to 60
Full Range
0 to 60
Full Range
0 to 48
Full Range
dB min
dB min
GAIN ERROR
± 0.1
± 0.15
± 0.15
± 0.20
dB max
VIN INPUT RESISTANCE
9/11/15
9/11/15
7/11/18
7/11/18
kΩ min/typ/max
RFB INPUT RESISTANCE
9.3/11.5/15.7 9.3/11.5/15.7
7.3/11.5/18.8 7.3/11.5/18.8
kΩ min/typ/max
DIGITAL INPUTS
VIH (Input High Voltage)
VIL (Input High Voltage)
Input Leakage Current
2.4
0.8
±1
2.4
0.8
± 10
2.4
0.8
±1
2.4
0.8
± 10
V min
V max
µA max
Digital Inputs = V DD
SWITCHING CHARACTERISTICS 1
tCS
tCH
tWR
tDS
tDH
0
0
57
25
10
0
0
57
25
10
0
0
57
25
10
0
0
57
25
10
ns min
ns min
ns min
ns min
ns min
Chip Select to Write Setup Time
Chip Select to Write Hold Time
Write Pulse Width
Data Valid to Write Setup Time
Data Valid to Write Hold Time
+5
1
1
+5
2
1
+5
1
1
+5
2
1
V
mA max
mA max
Digital Inputs = V IL or V IH
CS = WR = 0 V
Digital Inputs = 0 V or V DD;
See Figure 6
ACCURACY RELATIVE TO
0 dB ATTENUATION
0.375 dB Steps:
Accuracy ≤ ± 0.17 dB
Monotonic
0.75 dB Steps:
Accuracy ≤ ± 0.35 dB
Monotonic
1.5 dB Steps:
Accuracy ≤ ± 0.7 dB
Monotonic
3.0 dB Steps:
Accuracy ≤ ± 1.4 dB
Monotonic
6.0 dB Steps:
Accuracy ≤ ± 2.7 dB
Monotonic
POWER SUPPLY
VDD
IDD
Conditions/Comments
Guaranteed Attenuation Ranges
for Specified Step Sizes
Full Range Is from 0 dB
to 88.5 dB
NOTE
1
Sample tested at +25°C to ensure compliance.
Specifications subject to change without notice.
AC PERFORMANCE CHARACTERISTICS
These characteristics are included for design guidance only and are not subject
to test. VDD = +5 V, VIN = –10 V dc except where noted, IOUT = AGND = DGND = O V, output amplifier AD711 except where noted.
Parameter
AD7111AC Grade
TA = +258C TA = TMIN, TMAX
AD7111AB Grade
TA = +258C TA = TMIN, TMAX Units
DC Supply Rejection, ∆Gain/∆VDD
Propagation Delay
0.001
1
0.005
1.5
0.001
1
0.005
1.5
Digital-to-Analog Glitch Impulse
10
20
10
20
Output Capacitance, Pin 1
Input Capacitance, Pin 15 and Pin 16
Feedthrough at 1 kHz
Total Harmonic Distortion
Output Noise Voltage Density
Digital Input Capacitance
50
7
–94
–91
70
7
50
7
–90
–91
70
7
50
7
–92
–91
70
7
50
7
–90
–91
70
7
Specifications subject to change without notice.
REV. 0
–3–
Conditions/Comments
dB per % max ∆VDD = ± 10%, Input Code = 00000000
µs max
Full-Scale Change Measured from
WR Going High, CS = 0 V
nV secs typ
Measured with AD843 as Output
Amplifier for Code Transition
10000000 to 00000000
C1 of Figure 1 is 0 pF
pF max
pF max
dB max
dB typ
VIN = 6 V rms at 1 kHz
nV/√Hz max
Includes AD711 Amplifier Noise
pF max
AD7111/AD7111A
ABSOLUTE MAXIMUM RATINGS*
Power Dissipation, LCCC . . . . . . . . . . . . . . . . . . . . . . . . 1 W
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 76°C/W
Lead Temperature (Soldering, 10 secs) . . . . . . . . . +300°C
Operating Temperature Range
Commercial (K, L Versions) . . . . . . . . . . . . . 0°C to +70°C
Industrial (B, C Versions) . . . . . . . . . . . . . –40°C to +85°C
Extended (T, U Versions) . . . . . . . . . . . . –55°C to +125°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
(TA = +25°C unless otherwise noted)
VDD (to DGND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7 V
VIN (to AGND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 35 V
Digital Input Voltage to DGND . . . . . –0.3 V to VDD + 0.3 V
IOUT to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VDD
VRFB to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 35 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to VDD
DGND to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to VDD
Power Dissipation, DIP . . . . . . . . . . . . . . . . . . . . . . . . . . 1 W
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 117°C/W
Lead Temperature (Soldering, 10 secs) . . . . . . . . . +300°C
Power Dissipation, SOIC . . . . . . . . . . . . . . . . . . . . . . . . . 1 W
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 75°C/W
Lead Temperature (Soldering)
Vapor Phase (60 secs) . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 secs) . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only, and functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7111/AD7111A features proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore,
proper ESD precautions are recommended to avoid performance degradation or loss of
functionality.
ORDERING GUIDES
WARNING!
AD7111 ORDERING GUIDE
AD7111A ORDERING GUIDE
Model
AD7111ABN
AD7111ACN
AD7111ABR
AD7111ACR
Temperature
Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Specified
Accuracy
Range
0 dB to 60 dB
0 dB to 72 dB
0 dB to 60 dB
0 dB to 72 dB
ESD SENSITIVE DEVICE
Temperature
Modell
Range
AD7111KN
0°C to +70°C
AD7111BQ
–40°C to +85°C
AD7111LN
0°C to +70°C
AD7111CQ
–40°C to +85°C
AD7111UQ/883B –55°C to +125°C
AD7111TE/883B –55°C to +125°C
Package
Option1
N-16
N-16
R-16
R-16
Specified
Accuracy
Range
0 dB to 60 dB
0 dB to 60 dB
0 dB to 72 dB
0 dB to 72 dB
0 dB to 72 dB
0 dB to 60 dB
Package
Option2
N-16
Q-16
N-16
Q-16
Q-16
E-20A
NOTES
1
To order MIL-STD-883B, Class B processed parts, add /883B to part number.
Contact local sales office for military data sheet and availability.
2
N = Plastic DIP; Q = Cerdip; E = LCCC; R = SOIC.
NOTE
1
N = Plastic DIP; R = SOIC.
RESOLUTION: Nominal change in attenuation when moving
between two adjacent codes.
ACCURACY: The difference (measured in dB) between the
ideal transfer function as listed in Table I and the actual transfer
function as measured with the device.
MONOTONICITY: The device is monotonic if the analog output decreases (or remains constant) as the digital code increases.
OUTPUT CAPACITANCE: Capacitance from IOUT to
ground.
FEEDTHROUGH ERROR: That portion of the input signal
which reaches the output when all digital inputs are high. See
section on Applications.
DIGITAL-TO-ANALOG GLITCH IMPULSE: The amount
of charge injected from the digital inputs to the analog output
when the inputs change state. This is normally specified as the
area of the glitch in either pA-secs or nV-secs depending upon
whether the glitch is measured as a current or voltage signal.
Glitch impulse is measured with VIN = AGND.
TERMINOLOGY
OUTPUT LEAKAGE CURRENT: Current which appears on
the IOUT terminal with all digital inputs high.
TOTAL HARMONIC DISTORTION: A measure of the
harmonics introduced by the circuit when a pure sinusoid is
applied to the input. It is expressed as the harmonic energy
divided by the fundamental energy at the output.
PROPAGATION DELAY: This is a measure of the internal
delays of the circuit and is defined as the time from a digital input change to the analog output current reaching 90% of its
final value.
–4–
REV. 0
AD7111/AD7111A
PIN CONFIGURATIONS
LCCC
DIP/SOIC
Write Cycle Timing Diagram
CIRCUIT DESCRIPTION
where 0.375 is the step size (resolution) in dB and N is the input code in decimal for values 0 to 239. For 240 ≤ N ≤ 255 the
output is zero. Table I gives the output attenuation relative to
0 dB for all possible input codes.
GENERAL CIRCUIT DESCRIPTION
The AD7111/AD7111A consists of a 17-bit R-2R CMOS multiplying D/A converter with extensive digital logic. The logic
translates the 8-bit binary input into a 17-bit word which is
used to drive the D/A converter. Input data on the D7-D0 bus
is loaded into the input data latches using CS and WR control
signals. When using the AD7111, the rising edge of WR latches
the input data and initiates the internal data transfer to the decoder. A minimum time tRFSH, the refresh time, is required for
the data to propagate through the decoder before a new data
write is attempted.
In contrast, the AD7111A WR input is level triggered to allow
transparent operation of the latches if required.
The transfer function for the circuit of Figure 1 is given by:
Figure 1. Typical Circuit Configuration
0. 375 N
VO = –VIN 10 exp –
20
or
VO
VIN
The graphs on the last page give a pictorial representation of the
specified accuracy and monotonic ranges for all grades of the
AD7111/AD7111A. High attenuation levels are specified with
less accuracy than low attenuation levels. The range of monotonic behavior depends upon the attenuation step size used.
dB = –0.375 N
Table I. Ideal Attenuation in dB vs. Input Code
D3-D0
D7-D4
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0000
0001
0010
0011
0.0
6.0
12.0
18.0
0.375
6.375
12.375
18.375
0.75
6.75
12.75
18.75
1.125
7.125
13.125
19.125
1.5
7.5
13.5
19.5
1.875
7.875
13.875
19.875
2.25
8.25
14.25
20.25
2.625
8.625
14.625
20.625
3.0
9.0
15.0
21.0
3.375
9.375
15.375
21.375
3.75
9.75
15.75
21.75
4.125
10.125
16.125
22.125
4.5
10.5
16.5
22.5
4.875
10.875
16.875
22.875
5.25
11.25
17.25
23.25
5.625
11.625
17.625
23.625
0100
0101
0110
0111
24.0
30.0
36.0
42.0
24.375
30.375
36.375
42.375
24.75
30.75
36.75
42.75
25.125
31.125
37.125
43.125
25.5
31.5
37.5
43.5
25.875
31.875
37.875
43.875
26.25
32.25
38.25
44.25
26.625
32.625
38.625
44.625
27.0
33.0
39.0
45.0
27.375
33.375
39.375
45.375
27.75
33.75
39.75
45.75
28.125
34.125
40.125
46.125
28.5
34.5
40.5
46.5
28.875
34.875
40.875
46.875
29.25
35.25
41.25
47.25
29.625
35.625
41.625
47.625
1000
1001
1010
1011
48.0
54.0
60.0
66.0
48.375
54.375
60.375
66.375
48.75
54.75
60.75
66.75
49.125
55.125
61.125
67.125
49.5
55.5
61.5
67.5
49.875
55.875
61.875
67.875
50.25
56.25
62.25
68.25
50.625
56.625
62.625
68.625
51.0
57.0
63.0
69.0
51.375
57.375
63.375
69.375
51.75
57.75
63.75
69.75
52.125
58.125
64.125
70.125
52.5
58.5
64.5
70.5
52.875
58.875
64.875
70.875
53.25
59.25
65.25
71.25
53.625
59.625
65.625
71.625
1100
1101
1110
1111
72.0
78.0
84.0
MUTE
72.375
78.375
84.375
MUTE
72.75
78.75
84.75
MUTE
73.125
79.125
85.125
MUTE
73.5
79.5
85.5
MUTE
73.875
79.875
85.875
MUTE
74.25
80.25
86.25
MUTE
74.625
80.625
86.625
MUTE
75.0
81.0
87.0
MUTE
75.375
81.375
87.375
MUTE
75.75
81.75
87.75
MUTE
76.125
82.125
88.125
MUTE
76.5
82.5
88.5
MUTE
76.875
82.875
88.875
MUTE
77.25
83.25
89.25
MUTE
77.625
83.625
89.625
MUTE
REV. 0
–5–
AD7111/AD7111A
For example, the AD7111L is guaranteed monotonic in 0.375 dB
steps from 0 dB to –54 dB inclusive and in 0.75 dB steps from
0 dB to –72 dB inclusive. To achieve monotonic operation over
the entire 88.5 dB range it is necessary to select input codes so
that the attenuation step size at any point is consistent with the
step size guaranteed for monotonic operation at that point.
A1
–0.2V
100
MSB
DATA CHANGE
90
C1 = 0pF
V OUT
EQUIVALENT CIRCUIT ANALYSIS
C1 = 15pF
10
0%
Figure 2 shows a simplified circuit of the D/A converter section
of the AD7111/AD7111A, and Figure 3 gives an approximate
equivalent circuit.
V OUT
5V
5V
200ns
DATA CHANGE FROM 80H TO 00H.
The current source ILEAKAGE is composed of surface and junction leakages. The resistor R0 as shown in Figure 3 is the
equivalent output resistance of the device which varies with input code (excluding all 0s code) from 0.8R to 2R. R is typically
12 kΩ. COUT is the capacitance due to the N channel switches
and varies from about 20 pF to 50 pF depending upon the digital input. For further information on CMOS multiplying D/A
converters, refer to “CMOS DAC Application Guide” which is
available from Analog Devices, Publication Number
G872b–8–1/89.
Figure 4. Response of AD7111/AD7111A with AD711
A1
0.4V
MSB
DATA CHANGE
100
90
C1 = 0pF
V OUT
C1 = 15pF
10
0%
V OUT
5V
5V
200ns
DATA CHANGE FROM 80H TO 00H.
Figure 5. Response of AD7111/AD7111A with 1/2 OP275
In conventional CMOS D/A converter design, parasitic capacitance in N-channel D/A converter switches can give rise to
glitches on the D/A converter output. These glitches result from
digital feedthrough. The AD7111/AD7111A has been designed
to minimize these glitches as much as possible.
Figure 2. Simplified D/A Circuit of AD7111/AD7111A
For operation beyond 250 kHz, capacitor C1 may be reduced in
value. This gives an increase in bandwidth at the expense of a
poorer transient response as shown in Figures 5 and 11. In circuits where C1 is not included, the high frequency roll-off point
is primarily determined by the characteristics of the output amplifier and not the AD7111/AD7111A.
Figure 3. Equivalent Analog Output Circuit of
AD7111/AD7111A
DYNAMIC PERFORMANCE
The dynamic performance of the AD7111/AD7111A will depend
upon the gain and phase characteristics of the output amplifier,
together with the optimum choice of PC board layout and
decoupling components. Circuit layout is most important if the
optimum performance of the AD7111/AD7111A is to be
achieved. Most application problems stem from either poor layout, grounding errors, or inappropriate choice of amplifier.
It is recommended that when using thc AD7111/AD7111A with
a high speed amplifier, a capacitor (C1) he connected in the
feedback path as shown in Figure 1. This capacitor, which
should be between 10 pF and 30 pF, compensates for the phase
lag introduced by the output capacitance of the D/A converter.
Figures 4 and 5 show the performance of the AD7111/AD7111A
using the AD711, a high speed, low cost BiFET amplifier, and
the OP275, a dual, bipolar/JFET, audio amplifier. The performance without C1 is shown in the middle trace and the response with C1 in circuit shown in the bottom trace.
Feedthrough and absolute accuracy are sensitive to output leakage current effects. For this reason it is recommended that the
operating temperature of the AD7111/AD7111A be kept as
close to 25°C as is practically possible, particularly where the
device’s performance at high attenuation levels is important. A typical plot of leakage current vs. temperature is shown in Figure 10.
Some solder fluxes and cleaning materials can form slightly conductive films which cause leakage effects between analog
input and output. The user is cautioned to ensure that the
manufacturing process for circuits using thc AD7111/AD7111A
does not allow such films to form. Otherwise the feedthrough,
accuracy and maximum usable range will be affected.
STATIC ACCURACY PERFORMANCE
The D/A converter section of the AD7111/AD7111A consists of
a 17-bit R-2R type converter. To obtain optimum static performance at this level of resolution it is necessary to pay great
attention to amplifier selection, circuit grounding, etc.
Amplifier input has current results in a dc offset at the output of
the amplifier due to the current flowing through the feedback
resistor RFB. It is recommended that an amplifier with an input
bias current of less than 10 nA be used (e.g., AD711) to minimize this offset.
–6–
REV. 0
AD7111/AD7111A
Another error arises from the output amplifier s input offset
voltage. The amplifier is operated with a fixed feedback resistance, but the equivalent source impedance (the AD7111/
AD7111A output impedance) varies as a function of attenuation
level. This has the effect of varying thc “noise” gain of the
amplifier, thus creating a varying error due to amplifier offset
voltage. It is recommended that an amplifier with less than
50 µV of input offset be used (such as the AD OP07 in dc applications. Amplifiers with higher offset voltage may cause audible
“thumps” in ac applications due to dc output changes.
The AD7111/AD7111A accuracy is specified and tested using
only the internal feedback resistor. Any gain error (i.e., mismatch of RFB to the R-2R ladder) that may exist in the
AD7111/AD7111A D/A converter circuit results in a constant
attenuation error over the whole range. The AD7111/AD7111A
accuracy is specified relative to 0 dB attenuation, hence “Gain”
trim resistors—R1 and R2 in Figure 1—can be used to adjust
VOUT = VIN precisely (i.e., 0 dB attenuation) with input code
00000000. The accuracy and monotonic range specifications of
the AD7111/AD7111A are not affected in any way by this gain
trim procedure. For the AD7111/AD7111A L/C/U grades, suitable values for R1 and R2 of Figure 1 are R1 = 500 Ω, R2 =
180 Ω; for the K/B/T grades, suitable value are R1 = 1000 Ω,
R2 = 270 Ω. For additional information on gain error the reader
is referred to the “CMOS DAC Application Guide,” available
from Analog Devices, Inc., Publication Number G872b–8–1/89.
Typical Performance Characteristics
1.0
6
VDD = +5V
V DD = +5V
TA = +25 °C
5
V IN APPLIED TO ALL DATA INPUTS
0.5
CS = WR = 0V
TA = +85 °C
ERROR – dB
I DD – mA
4
3
0.0
TA = +25 °C
2
–0.5
1
0
–1.0
0
1
2
3
INPUT VOLTAGE – Volts
4
5
0
6
12
18
24
30
36 42
48
54
60
66
72 78
84
ATTENUATION – dB
Figure 6. Typical Supply Current vs. Logic Input Level
Figure 8. Typical Attenuation Error for 3 dB Steps vs.
Temperature
0.4
VDD = +5V
TA = +25 °C
ERROR – dB
0.2
0.0
*
*
*
*** *
* *
**
******
***
**
* *** * * ** *
** **
**
** **
–0.2
–0.4
–0.6
0
3
6
9
12
15
18
21
24
27
30
ATTENUATION – dB
Figure 7. Typical Attenuation Error for 0.75 dB Steps
REV. 0
Figure 9. Accuracy Specification for K/B/T Grade Devices
at TA = +25°C
–7–
AD7111/AD7111A–Typical Performance Characteristics
–60
VIN = 6V rms
VIN = –10V
1.5
DATA INPUT = 1111XXXX
1.0
0.5
0.0
–40
–70
10
35
60
C1 = 15pF
1/2 OP- 275
–80
AD711
–90
–100
–15
INPUT CODE = 0000 0000
TA = +25 °C
C1687–10–7/92
VDD = +5V
TOTAL HARMONIC DISTORTION – dB
OUTPUT LEAKAGE CURRENT I OUT – nA
2.0
85
101
TEMPERATURE – °C
Figure 10. Output Leakage Current vs. Temperature
10 2
10 3
FREQUENCY – Hz
10 4
10 5
Figure 12. Distortion vs. Frequency
NORMALIZED GAIN WITH RESPECT TO 1kHz
10
1/2 OP – 275
C1 = 0pF
0
1/2 OP – 275
C1 = 15pF
–10
AD711
C1 = 0pF
–20
–30
2
10
V DD = +5V
TA = +25°C
DATA INPUT CODE = 0000 0000
VIN = 1V rms
10
3
4
AD711
C1 = 15pF
5
10
10
FREQUENCY – Hz
10
6
10
7
Figure 13. Accuracy Specification for L/C/U Grade
Devices at TA = +25°C
Figure 11. Frequency Response with 1/2 OP275 and
AD711 Amplifiers
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
Plastic DIP (N-16)
PRINTED IN U.S.A.
SOIC (R-16)
Cerdip (Q-16)
LCCC (E-20A)
–8–
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