Allegro A3957SLB Full-bridge pwm microstepping motor driver Datasheet

Data Sheet
29319.44†
3957
FULL-BRIDGE PWM
MICROSTEPPING MOTOR DRIVER
A3957SLB
NO
CONNECT
1
PFD
2
REF
3
NO
CONNECT
4
RC
5
GROUND
6
GROUND
24
NO
CONNECT
23
LOAD
SUPPLY
22
OUTB
21
NO
CONNECT
20
D0
19
GROUND
7
18
GROUND
D3
8
17
SENSE
LOGIC
SUPPLY
9
PHASE
D2
NO
CONNECT
NC
NC
VBB
NC
NC
LOGIC
VCC
NC 16
10
15
11
NC 14
12 NC
13
NO
CONNECT
OUTA
NO
CONNECT
D1
Dwg. PP-056-4
ABSOLUTE MAXIMUM RATINGS
Load Supply Voltage, VBB . . . . . . . . . 50 V
Output Current, IOUT
(Continuous) . . . . . . . . . . . . . ±1.5 A*
Logic Supply Voltage, VCC . . . . . . . 7.0 V
Logic/Reference Input Voltage Range,
VIN . . . . . . . . . . -0.3 V to V CC + 0.3 V
Sense Voltage, VS . . . . . . . . . . . . . . . 1.0 V
Package Power Dissipation (TA = 25°C), PD
A3957SA . . . . . . . . . . . . . . . . 2.08 W†
A3957SLB . . . . . . . . . . . . . . . 2.23 W†
Operating Temperature Range,
TA . . . . . . . . . . . . . . . -20˚C to +85˚C
Junction Temperature, TJ . . . . . . . . +150˚C
Storage Temperature Range,
TS . . . . . . . . . . . . . . . -55˚C to +150˚C
* Output current rating may be limited by duty
cycle, ambient temperature, and heat sinking.
Under any set of conditions, do not exceed the
specified current rating or a junction temperature
of 150°C.
† Per SEMI G42-88 Specification, Thermal Test
Board Standardization for Measuring Junctionto-Ambient Thermal Resistance of Semiconductor
Packages..
The A3957SA and A3957SLB are designed for driving one winding of a
bipolar stepper motor in a microstepping mode. The outputs are rated for
continuous output currents to ±1.5 A and operating voltages to 50 V. Internal
pulse-width modulated (PWM) current control combined with an internal
four-bit nonlinear digital-to-analog converter allows the motor current to be
controlled in full-, half-, quarter-, eighth-, or sixteenth-step (microstepping)
modes. Nonlinear increments minimize the number of control lines necessary
for microstepping. Microstepping provides for increased step resolution, and
reduces torque variations and resonance problems at low speed.
Internal circuitry determines whether the PWM current-control circuitry
operates in a slow (recirculating) current-decay mode, fast (regenerative)
current-decay mode, or in a mixed current-decay mode in which the off time
is divided into a period of fast current decay with the remainder of the fixed
off time spent in slow current decay. The combination of user-selectable
current-sensing resistor and reference voltage, digitally selected output
current ratio; and slow, fast, or mixed current-decay modes provides users
with a broad, variable range of motor control.
Internal circuit protection includes thermal shutdown with hysteresis,
transient-suppression diodes, and crossover current protection. Special
power-up sequencing is not required.
The A3957S— is supplied in a choice of two power packages; a 16-pin
dual-in-line plastic package (suffix ‘A’), and a 24-lead plastic SOIC with
copper heat-sink tabs (suffix ‘LB’). The power tab is at ground potential and
needs no electrical isolation.
FEATURES
■
■
■
■
■
■
■
■
■
±1.5 A Continuous Output Current
50 V Output Voltage Rating
Internal PWM Current Control
4-Bit Non-Linear DAC for 16-Bit Microstepping
Satlington™ Sink Drivers
Fast, Mixed Fast/Slow, and Slow Current-Decay Modes
Internal Transient-Suppression Diodes
Internal Thermal-Shutdown Circuitry
Crossover-Current and UVLO Protection
Always order by complete part number:
Part Number
RθJA
RθJC
RθJT
A3957SA
16-pin DIP
Package
60°C/W
38°C/W
—
A3957SLB
24-lead batwing SOIC
56°C/W
—
6°C/W
3957
FULL-BRIDGE PWM
MICROSTEPPING
MOTOR DRIVER
9
VCC
PHASE
15
LOAD
SUPPLY
OUTB
OUTA
LOGIC
SUPPLY
FUNCTIONAL BLOCK DIAGRAM (A3957SLB shown)
22
23
10
VBB
GROUND
6
7
UVLO
& TSD
18
19
MIXED-DECAY
COMPARATOR
CURRENT-SENSE
COMPARATOR
+
–
SENSE
17
+
–
R
Q
S
D/A
RS
+ –
RT
3
8
11
13
20
D0
V TH
D1
RC
5
D2
VCC
DISABLE
÷3
BLANKING
D3
2
BLANKING
GATE
REF
PFD
PWM LATCH
CT
A3957SA
Dwg. FP-042-1
16
NO
CONNECT
15
SENSE
14
OUTA
13
D1
5
12
D2
REF
6
11
PHASE
RC
7
10
LOGIC
SUPPLY
GROUND
8
9
D3
GROUND
1
D0
2
OUTB
3
LOAD
SUPPLY
4
PFD
NC
LOGIC
VBB
VCC
Dwg. PP-056-3
For the ‘A’ package, pins 1 and 8 must
be externally connected together.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
W
Copyright © 1998 Allegro MicroSystems, Inc.
3957
FULL-BRIDGE PWM
MICROSTEPPING
MOTOR DRIVER
Table 1 — PHASE Truth Table
PHASE
OUTA
OUTB
H
L
H
L
L
H
Table 2 — PFD Truth Table
VPFD
Description
≥3.5 V
Slow Current-Decay Mode
1.2 V to 2.9 V
Mixed Current-Decay Mode
≤0.8 V
Fast Current-Decay Mode
Table 3 — DAC Truth Table
DAC Data
Current
D3
D2
D1
D0
Ratio, %
VREF/VS
H
H
H
H
100
3.00
H
H
H
L
95.7
3.13
H
H
L
H
91.3
3.29
H
H
L
L
87.0
3.45
H
L
H
H
82.6
3.64
H
L
H
L
78.3
3.83
H
L
L
H
73.9
4.07
H
L
L
L
69.6
4.31
L
H
H
H
60.9
4.93
L
H
H
L
52.2
5.74
L
H
L
H
43.5
6.90
L
H
L
L
34.8
8.62
L
L
H
H
26.1
11.49
L
L
H
L
17.4
17.24
L
L
L
X
All Outputs Disabled
where VS = ITRIP • RS . See Applications section.
3957
FULL-BRIDGE PWM
MICROSTEPPING
MOTOR DRIVER
ELECTRICAL CHARACTERISTICS at TA = 25˚C, VBB = 5 V to 50 V, V CC = 4.5 V to 5.5 V (unless
otherwise noted.)
Limits
Characteristic
Symbol
Test Conditions
Min.
Typ.
Max.
Units
V CC
—
50
V
Power Outputs
Load Supply Voltage Range
VBB
Operating, IOUT = ±1.5 A, L = 3 mH
Output Leakage Current
ICEX
VOUT = V BB
—
<1.0
50
µA
VOUT = 0 V
—
<-1.0
-50
µA
VS = 1.0 V:
Source Driver, I OUT = -0.85 A
Source Driver, IOUT = -1.5 A
Sink Driver, IOUT = 0.85 A
Sink Driver, IOUT = 1.5 A
—
—
—
—
1.1
1.4
0.5
1.2
1.2
1.5
0.7
1.5
V
V
V
V
Output Saturation Voltage
(Forward or Reverse Mode)
VCE(SAT)
Sense Current Offset
ISO
IS - IOUT, IOUT = 850 mA,
VS = 0 V, VCC = 5 V
20
30
40
mA
Clamp Diode Forward Volt.
(Sink or Source)
VF
IF = 0.85 A
—
1.2
1.4
V
IF = 1.5 A
—
1.5
1.7
V
—
2.0
4.0
mA
D0 = D1 = D2 = D3 = 0.8 V
—
1.0
50
µA
Motor Supply Current
(No Load)
IBB(ON)
IBB(OFF)
Control Circuitry
Logic Supply Voltage Range
VCC
Operating
4.5
5.0
5.5
V
Reference Voltage Range
V REF
Operating
0.5
—
2.5
V
3.35
3.70
4.05
V
0.25
0.40
0.55
V
—
42
50
mA
—
14
17
mA
VIN(1)
2.0
—
—
V
VIN(0)
—
—
0.8
V
VCC = 0 → 5 V
UVLO Enable Threshold
UVLO Hysteresis
Logic Supply Current
ICC(ON)
ICC(OFF)
Logic Input Voltage
Logic Input Current
D0 = D1 = D2 = D3 = 0.8 V
IIN(1)
VIN = 2.0 V
—
<1.0
20
µA
IIN(0)
VIN = 0.8 V
—
<-2.0
-200
µA
Continued next page…
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
3957
FULL-BRIDGE PWM
MICROSTEPPING
MOTOR DRIVER
ELECTRICAL CHARACTERISTICS at TA = 25˚C, VBB = 5 V to 50 V, V CC = 4.5 V to 5.5 V (unless
otherwise noted.)
Limits
Characteristic
Symbol
Test Conditions
Min.
Typ.
Max.
Units
Slow Current-Decay Mode
3.5
—
—
V
Mixed Current-Decay Mode
1.2
—
2.9
V
Fast Current-Decay Mode
—
—
0.8
V
Control Circuitry (continued)
Mixed-Decay Comparator
Trip Points
V PFD
Mixed-Decay Comparator
Input Offset Voltage
VIO(PFD)
—
0
±20
mV
Mixed-Decay Comparator
Hysteresis
∆V IO(PFD)
5.0
25
55
mV
VREF = 0 V to 2.5 V
—
—
±5.0
µA
at trip, D0 = D1 = D2 = D3 = 2 V
—
3.0
—
—
1.0 V < VREF ≤ 2.5 V
—
—
±3.0
%
0.5 V < VREF ≤ 1.0 V
—
—
±4.0
%
Reference Input Current
IREF
Reference Divider Ratio
VREF /VS
Digital-to-Analog Converter
Accuracy*
—
Current-Sense Comparator
Input Offset Voltage*
V IO(S)
VREF = 0 V
—
±16
—
mV
Step Reference
Current Ratio
SRCR
D0 = D1 = D2 = D3 = 0.8 V
D1 = 2 V, D 0 = D2 = D3 = 0.8 V
D0 = D1 = 2 V, D2 = D3 = 0.8 V
D2 = 2 V, D 0 = D1 = D3 = 0.8 V
D0 = D2 = 2 V, D1 = D3 = 0.8 V
D1 = D2 = 2 V, D0 = D3 = 0.8 V
D0 = D1 = D2 = 2 V, D 3 = 0.8 V
D3 = 2 V, D 0 = D1 = D2 = 0.8 V
D0 = D3 = 2 V, D1 = D2 = 0.8 V
D1 = D3 = 2 V, D0 = D2 = 0.8 V
D0 = D1 = D3 = 2 V, D 2 = 0.8 V
D2 = D3 = 2 V, D0 = D1 = 0.8 V
D0 = D2 = D3 = 2 V, D 1 = 0.8 V
D1 = D2 = D3 = 2 V, D 0 = 0.8 V
D0 = D1 = D2 = D3 = 2 V
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0
17.4
26.1
34.8
43.5
52.2
60.9
69.6
73.9
78.3
82.6
87.0
91.3
95.7
100
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
Thermal Shutdown Temp.
TJ
—
165
—
°C
Thermal Shutdown Hyst.
∆T J
—
15
—
°C
* The total error for the VREF/VS function is the sum of the D/A error and the current-sense comparator input offset voltage.
Continued next page…
3957
FULL-BRIDGE PWM
MICROSTEPPING
MOTOR DRIVER
ELECTRICAL CHARACTERISTICS at TA = 25˚C, VBB = 5 V to 50 V, V CC = 4.5 V to 5.5 V (unless
otherwise noted.)
Limits
Characteristic
Symbol
Test Conditions
Min.
Typ.
Max.
Units
CT = 470 pF, RT = 43 kΩ
18.2
20.2
22.3
µs
Current-Sense Comparator Trip
to Source OFF, IOUT = 100 mA
—
1.0
1.5
µs
Current-Sense Comparator Trip
to Source OFF, IOUT = 1.5 A
—
1.4
2.5
µs
IRC Charge ON to Source ON,
IOUT = 100 mA
—
0.4
0.7
µs
IRC Charge ON to Source ON,
IOUT = 1.5 A
—
0.55
0.85
µs
VCC = 5.0 V, RT ≥ 43 kΩ, CT = 470 pF
IOUT = 100 mA
1.0
1.6
2.2
µs
1 kΩ Load to 25 V
0.3
1.5
3.0
µs
AC Timing
PWM RC Fixed Off-time
PWM Turn-Off Time
PWM Turn-On Time
PWM Minimum On Time
Crossover Dead Time
tOFF RC
tPWM(OFF)
tPWM(ON)
tON(min)
tCODT
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
3957
FULL-BRIDGE PWM
MICROSTEPPING
MOTOR DRIVER
Typical Operating Characteristics
Satlington™ Sink Driver Saturation Voltage
Source Driver Saturation Voltage
1.5
OUTPUT SATURATION VOLTAGE IN VOLTS
OUTPUT SATURATION VOLTAGE IN VOLTS
1.5
1.25
1.0
0.75
SOURCE DRIVER
0.5
TJ = +25°C
TJ = +70°C
TJ = +85°C
TJ = +125°C
0.25
0
SINK DRIVER
1.25
TJ = +25°C
TJ = +70°C
TJ = +85°C
TJ = +125°C
1.0
0.75
0.5
0.25
0
0
0.25
0.5
0.75
1.0
1.25
0
1.5
0.25
OUTPUT CURRENT IN AMPERES
0.5
0.75
1.0
Dwg. GP-064-2
Dwg. GP-064-3
Flyback Diode Forward Voltage
1.5
1.5
1.25
1.25
FORWARD VOLTAGE IN VOLTS
FORWARD VOLTAGE IN VOLTS
Clamp Diode Forward Voltage
1.0
0.75
SINK DIODE
0.5
TJ = +25°C
TJ = +70°C
TJ = +85°C
TJ = +125°C
0.25
1.5
1.25
OUTPUT CURRENT IN AMPERES
0
1.0
0.75
FLYBACK DIODE
0.5
TJ = +25°C
TJ = +70°C
TJ = +85°C
TJ = +125°C
0.25
0
0
0.25
0.5
0.75
1.0
1.25
1.5
FORWARD CURRENT IN AMPERES
0
0.25
0.5
0.75
1.0
1.25
1.5
FORWARD CURRENT IN AMPERES
Dwg. GD-003-1
Dwg. GD-003-2
3957
FULL-BRIDGE PWM
MICROSTEPPING
MOTOR DRIVER
Terminal Functions
A3957SA
Pin
A3957SLB
Lead
Terminal
Name
–
1
NC
No internal connection.
5
2
PFD
(Percent Fast Decay) The analog input used to set the current-decay mode.
6
3
REF
(VREF) The voltage at this input (along with the value of RS and the states of DAC
inputs D0, D1, and D2) set the peak output current.
–
4
NC
No internal connection.
7
5
RC
The parallel combination of external resistor RT and capacitor CT set the off time
for the PWM current regulator. CT also sets the blanking time.
8*
6-7
GROUND
9
8
D3
10
9
LOGIC SUPPLY
11
10
PHASE
12
11
D2
(DATA2) One of four control bits for the internal digital-to-analog converter.
–
12
NC
No internal connection.
13
13
D1
(DATA1) One of four control bits for the internal digital-to-analog converter.
–
14
NC
No internal connection.
14
15
OUTA
–
16
NC
15
17
SENSE
16
–
NC
1*
18-19
GROUND
2
20
D0
(DATA0) One of four (LSB) control bits for the internal digital-to-analog converter.
–
21
NC
No internal connection.
3
22
OUTB
4
23
LOAD SUPPLY
–
24
NC
Description
Return for the logic supply (VCC) and load supply (VBB); the reference for all
voltage measurements.
(DATA3) One of four (MSB) control bits for the internal digital-to-analog converter.
(VCC) Supply voltage for the logic circuitry. Typically = 5 V.
The PHASE input determines the direction of current in the load.
One of two output load connections.
No internal connection.
Connection to the sink-transistor emitters. Sense resistor RS is connected
between this point and ground.
No internal connection.
Return for the logic supply (VCC) and load supply (VBB); the reference for all
voltage measurements.
One of two output load connections.
(VBB) Supply voltage for the load.
No internal connection.
* For the ‘A’ package, pins 1 and 8 must be externally connected together.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
3957
FULL-BRIDGE PWM
MICROSTEPPING
MOTOR DRIVER
Functional Description
Two A3957S— full-bridge PWM microstepping motor
drivers are needed to drive the windings of a bipolar stepper
motor. Internal pulse-width modulated (PWM) control circuitry
regulates each motor winding’s current. The peak motor
current is set by the value of an external current-sense resistor
(RS), a reference voltage (VREF), and the digital-to-analog
converter (DAC) data inputs (D0, D1, D2, and D3).
To improve motor performance, especially when using
sinusoidal current profiles necessary for microstepping, the
A3957S— has three distinct current-decay modes: slow decay,
fast decay, and mixed decay.
PHASE Input. The PHASE input controls the direction of
current flow in the load (table 1). An internally generated dead
time of approximately 1.5 µs prevents crossover currents that
could occur when switching the PHASE input.
DAC Data Inputs (D0, D1, D2 , D3). A non-linear DAC is used
to digitally control the output current. The output of the DAC is
used to set the trip point of the current-sense comparator. Table
3 shows DAC output voltages for each input condition. When
D1 , D2, and D3 are all logic low, all of the power output
transistors are turned off.
Internal PWM Current Control. Each motor driver IC
contains an internal fixed off-time PWM current-control circuit
that limits the load current to a desired value (ITRIP). Initially, a
diagonal pair of source and sink transistors are enabled and
current flows through the motor winding and RS (figure 1).
V
BB
DRIVE CURRENT
RECIRCULATION
(SLOW-DECAY MODE)
RECIRCULATION
(FAST-DECAY MODE)
RS
Dwg. EP-006-15
Figure 1 — Load-Current Paths
When the voltage across the sense resistor equals the DAC
output voltage, the current-sense comparator resets the PWM
latch, which turns off the source drivers (slow-decay mode) or
the sink and source drivers (fast- or mixed-decay mode).
With the DATA input lines tied to VCC, the maximum
value of current limiting is set by the selection of RS and VREF
with a transconductance function approximated by:
ITRIP ≈ VREF/3RS = IOUT + I SO.
where ISO is the sense-current offset due to the base-drive
current of the sink transistor (typically 30 mA). The actual peak
load current (IPEAK) will be slightly higher than ITRIP due to
internal logic and switching delays. The driver(s) remain off
for a time period determined by a user-selected external
resistor-capacitor combination (RTCT). At the end of the fixed
off time, the driver(s) are re-enabled, allowing the load current
to increase to ITRIP again, maintaining an average load current.
The current-sense comparator has a fixed offset of approximately 16 mV. With RS = 0.5 Ω, the sense-current offset (ISO)
is effectively cancelled (VIO(S) ≈ ISO • RS).
The DAC data input lines are used to provide up to eight
levels of output current. The internal 4-bit digital-to-analog
converter reduces the reference input to the current-sense
comparator in precise steps (the step reference current ratio or
SRCR) to provide half-step, quarter-step, eighth-step, or
“microstepping” load-current levels.
ITRIP ≈ SRCR x VREF/3RS
Slow Current-Decay Mode. When VPFD ≥ 3.5 V, the device is
in slow current-decay mode (the source drivers are disabled
when the load current reaches ITRIP). During the fixed off time,
the load inductance causes the current to recirculate through the
motor winding, sink driver, ground clamp diode, and sense
resistor (see figure 1). Slow-decay mode produces low ripple
current for a given fixed off time (see figure 2). Low ripple
current is desirable because the average current in the motor
winding is more nearly equal to the desired reference value,
resulting in increased motor performance in microstepping
applications.
For a given level of ripple current, slow decay affords the
lowest PWM frequency, which reduces heating in the motor and
driver IC due to a corresponding decrease in hysteretic core
losses and switching losses respectively. Slow decay also has
the advantage that the PWM load current regulation can follow
a more rapidly increasing reference before the PWM frequency
drops into the audible range. For these reasons slow-decay
mode is typically used as long as good current regulation can be
maintained.
3957
FULL-BRIDGE PWM
MICROSTEPPING
MOTOR DRIVER
Under some circumstances slow-decay mode PWM can fail
to maintain good current regulation:
1) The load current will fail to regulate in slow-decay mode
due to a sufficiently negative back-EMF voltage in conjunction with the low voltage drop across the load during
slow decay recirculation. The negative back-EMF voltage
can cause the load current to actually increase during the
slow decay off time. A negative back-EMF voltage
condition commonly occurs when driving stepping motors
because the phase lead of the rotor typically causes the
back-EMF voltage to be negative towards the end of each
step (see figure 3A).
2) When the desired load current is decreased rapidly, the
slow rate of load current decay can prevent the current from
following the desired reference value.
A — Slow-Decay Mode
3) When the desired load current is set to a very low value,
the current-control loop can fail to regulate due to its
minimum duty cycle, which is a function of the userselected value of tOFF and the minimum on-time pulse
width ton(min) that occurs each time the PWM latch is reset.
Fast Current-Decay Mode. When VPFD ≤ 0.8 V, the device is
in fast current-decay mode (both the sink and source drivers are
disabled when the load current reaches ITRIP). During the fixed
off time, the load inductance causes the current to flow from
ground to the load supply via the motor winding, ground-clamp
and flyback diodes (see figure 1). Because the full motor
supply voltage is across the load during fast-decay recirculation,
the rate of load current decay is rapid, producing a high ripple
current for a given fixed off time (see figure 2). This rapid rate
of decay allows good current regulation to be maintained at the
I PEAK
I TRIP
B — Fast-Decay Mode
SLOW (VPFD ≥ 3.5 V)
MIXED (1.2 V ≤ V PFD ≤ 2.9 V)
FAST (V PFD ≤ 0.8 V)
PFD
t OFF
C — Mixed-Decay Mode
Dwg. WP-031-2
Figure 3 — Sinusoidal Drive Currents
Figure 2 — Current-Decay Waveforms
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
3957
FULL-BRIDGE PWM
MICROSTEPPING
MOTOR DRIVER
cost of decreased average current accuracy or increased driver
and motor losses.
Mixed Current-Decay Mode. If VPFD is between 1.2 V and
2.9 V, the device will be in a mixed current-decay mode.
Mixed-decay mode allows the user to achieve good current
regulation with a minimum amount of ripple current and motor/
driver losses by selecting the minimum percentage of fast decay
required for their application (see also Stepper Motor Applications).
As in fast current-decay mode, mixed-decay starts with the sink
and source drivers disabled after the load current reaches ITRIP.
When the voltage at the RC terminal decays to a value below
VPFD, the sink drivers are re-enabled, placing the device in slow
current-decay mode for the remainder of the fixed off time
(figure 2). The percentage of fast decay (PFD) is user determined by VPFD or two external resistors.
PFD = 100 ln (0.6[R1+R2]/R2)
where
V
CC
R1
PFD
R2
Dwg. EP-062-1
Fixed Off-Time. The internal PWM current-control circuitry
uses a one shot to control the time the driver(s) remain(s) off.
The one-shot off-time, tOFF, is determined by the selection of an
external resistor (RT) and capacitor (CT) connected from the RC
timing terminal to ground. The off-time, over a range of values
of CT = 470 pF to 1500 pF and RT = 12 kΩ to 100 kΩ, is
approximated by:
tOFF ≈ RTCT.
When the load current is increasing, but has not yet reached
the sense-current comparator threshold (ITRIP), the voltage on
the RC terminal is approximately 0.6VCC. When I TRIP is
reached, the PWM latch is reset by the current-sense comparator and the voltage on the RC terminal will decay until it
reaches approximately 0.22VCC. The PWM latch is then set,
thereby re-enabling the driver(s) and allowing load current to
increase again. The PWM cycle repeats, maintaining the peak
load current at the desired value.
With increasing values of tOFF, switching losses will
decrease, low-level load-current regulation will improve, EMI
will be reduced, the PWM frequency will decrease, and ripple
current will increase. A value of tOFF can be chosen for optimization of these parameters. For applications where audible
noise is a concern, typical values of tOFF are chosen to be in the
range of 15 µs to 35 µs.
RC Blanking. In addition to determining the fixed off-time of
the PWM control circuit, the CT component sets the comparator
blanking time. This function blanks the output of the currentsense comparator when the outputs are switched by the internal
current-control circuitry (or by the PHASE input, or when the
device is enabled with the DAC data inputs). The comparator
output is blanked to prevent false over-current detections due to
reverse recovery currents of the clamp diodes, and/or switching
transients related to distributed capacitance in the load.
During internal PWM operation, at the end of the tOFF time,
the comparator’s output is blanked and CT begins to be charged
from approximately 0.22VCC by an internal current source of
approximately 1 mA. The comparator output remains blanked
until the voltage on CT reaches approximately 0.6VCC. The
blanking time, tBLANK, can be calculated as:
tBLANK = R TC T ln (RT/[RT - 3 kΩ]).
When a transition of the PHASE input occurs, CT is
discharged to near ground during the crossover delay time (the
crossover delay time is present to prevent simultaneous conduction of the source and sink drivers). After the crossover delay,
CT is charged by an internal current source of approximately 1
mA. The comparator output remains blanked until the voltage
on CT reaches approximately 0.6VCC.
Similarly, when the device is disabled, via the DAC data
inputs, CT is discharged to near ground. When the device is reenabled, CT is charged by an internal current source of approximately 1 mA. The comparator output remains blanked until the
voltage on CT reaches approximately 0.6VCC. The blanking
time, tBLANK′, can be calculated as:
tBLANK′ ≈ 1900 CT.
The minimum recommended value for CT is 470 pF
± 5 %. This value ensures that the blanking time is sufficient to
avoid false trips of the comparator under normal operating
conditions. For optimal regulation of the load current, this
value for CT is recommended and the value of RT can be sized
to determine tOFF.
3957
FULL-BRIDGE PWM
MICROSTEPPING
MOTOR DRIVER
Thermal Considerations. Thermal-protection circuitry turns
off all output transistors when the junction temperature reaches
approximately +165°C. This is intended only to protect the
device from failures due to excessive junction temperatures and
should not imply that output short circuits are permitted. The
output transistors are re-enabled when the junction temperature
cools to approximately +150°C.
Stepper Motor Applications. The A3957SB or A3957SLB are
used to optimize performance in microstepping/sinusoidal
stepper-motor drive applications (see figures 4 and 5). When
the load current is increasing, the slow current-decay mode is
used to limit the switching losses in the driver and iron losses in
the motor. This also improves the maximum rate at which the
load current can increase (as compared to fast decay) due to the
slow rate of decay during tOFF. When the load current is
decreasing, the mixed current-decay mode is used to regulate
the load current to the desired level. This prevents tailing of the
current profile caused by the back-EMF voltage of the stepper
motor (see figure 3A).
BRIDGE A
BRIDGE B
VBB
1
V PFD
2
V REF
3
NC
NC
VBB
D 1B
24
23
14
22
NC
NC
15
+
4
NC 12
13
11
D2B
10
PHASE B
47 µF
NC 21
16
VCC
NC
9
+5 V
8
D3B
D 0A
18
11
D3A
8
17
+5 V
9
10
15
D2A
11
NC 14
NC
13
6
20
47 µF
21
5
NC
NC
+
PHASE A
12
LOGIC
19
D0B
NC 16
7
18
22
VBB
D 1A
23
24
30 kΩ
7
VCC
0.5 Ω
19
LOGIC
0.5 Ω
30 kΩ
470 pF
6
17
470 pF
20
5
VBB
NC
NC
4
3
V REF
2
V PFD
1
Dwg. EP-047-5
Figure 4 — Typical Application
MIXED DECAY
SLOW DECAY
MIXED DECAY
SLOW DECAY
Dwg. WK-004-5
Figure 5 — Microstepping/Sinusoidal Drive Current
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
3957
FULL-BRIDGE PWM
MICROSTEPPING
MOTOR DRIVER
Table 4 — Step Sequencing
Full 1/2 1/4 1/8 1/16
Step Step Step Step Step
1
1
1
1
2
2
3
4
2
3
5
6
4
7
8
2
3
5
9
10
6
11
12
4
7
13
14
8
15
16
3
5
9
17
18
10
19
20
6
11
21
22
12
23
24
4
7
13
25
26
14
27
28
8
15
29
30
16
31
32
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Bridge A
PHASEA D3A
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
X
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
Bridge B
D2A
D1A
D0A
ILOAD A
H
H
H
H
H
H
L
L
L
L
H
H
H
H
L
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
H
H
H
H
L
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
H
H
H
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
H
H
H
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
H
H
H
H
L
H
L
H
L
H
L
H
L
H
L
H
L
X
L
H
L
H
L
H
L
H
L
H
L
H
L
H
H
H
H
H
L
H
L
H
L
H
L
H
L
H
L
H
L
X
L
H
L
H
L
H
L
H
L
H
L
H
L
H
H
100%
100%
100%
95.7%
91.3%
87.0%
82.6%
78.3%
73.9%
69.6%
60.9%
52.2%
43.5%
34.8%
26.1%
17.4%
0%
-17.4%
-26.1%
-34.8%
-43.5%
-52.2%
-60.9%
-69.6%
-73.9%
-78.3%
-82.6%
-87.0%
-91.3%
-95.7%
-100%
-100%
-100%
-100%
-100%
-95.7%
-91.3%
-87.0%
-82.6%
-78.3%
-73.9%
-69.6%
-60.9%
-52.2%
-43.5%
-34.8%
-26.1%
-17.4%
0%
17.4%
26.1%
34.8%
43.5%
52.2%
60.9%
69.6%
73.9%
78.3%
82.6%
87.0%
91.3%
95.7%
100%
100%
PHASEB D3B
X
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
D2B
D1B
D0B
ILOAD B
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
H
H
H
H
L
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
H
H
H
H
L
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
H
H
H
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
H
H
H
H
H
L
L
H
H
L
L
H
H
L
L
H
H
X
L
H
L
H
L
H
L
H
L
H
L
H
L
H
H
H
H
H
L
H
L
H
L
H
L
H
L
H
L
H
L
X
L
H
L
H
L
H
L
H
L
H
L
H
L
H
H
H
H
H
L
H
L
H
L
H
L
H
L
H
L
H
L
0%
17.4%
26.1%
34.8%
43.5%
52.2%
60.9%
69.6%
73.9%
78.3%
82.6%
87.0%
91.3%
95.7%
100%
100%
100%
100%
100%
95.7%
91.3%
87.0%
82.6%
78.3%
73.9%
69.6%
60.9%
52.2%
43.5%
34.8%
26.1%
17.4%
0%
-17.4%
-26.1%
-34.8%
-43.5%
-52.2%
-60.9%
-69.6%
-73.9%
-78.3%
-82.6%
-87.0%
-91.3%
-95.7%
-100%
-100%
-100%
-100%
-100%
-95.7%
-91.3%
-87.0%
-82.6%
-78.3%
-73.9%
-69.6%
-60.9%
-52.2%
-43.5%
-34.8%
-26.1%
-17.4%
Step
angle
0°
45°
90°
135°
180°
225°
270°
315°
3957
FULL-BRIDGE PWM
MICROSTEPPING
MOTOR DRIVER
A3957SA
Dimensions in Inches
(controlling dimensions)
0.014
0.008
9
16
0.430
MAX
0.280
0.240
0.300
BSC
1
0.070
0.045
0.100
0.775
0.735
8
0.005
BSC
MIN
0.210
MAX
0.015
0.150
0.115
MIN
0.022
0.014
Dwg. MA-001-16A in
Dimensions in Millimeters
(for reference only)
0.355
0.204
9
16
10.92
MAX
7.11
6.10
7.62
BSC
1
1.77
1.15
2.54
19.68
18.67
BSC
8
0.13
MIN
5.33
MAX
0.39
3.81
2.93
MIN
0.558
0.356
Dwg. MA-001-16A mm
NOTES:1. Exact body and lead configuration at vendor’s option within limits shown.
2. Lead spacing tolerance is non-cumulative
3. Lead thickness is measured at seating plane or below.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
3957
FULL-BRIDGE PWM
MICROSTEPPING
MOTOR DRIVER
A3957SLB
Dimensions in Inches
(for reference only)
24
13
0.0125
0.0091
0.491
0.394
0.2992
0.2914
0.050
0.016
0.020
0.013
1
2
3
0.050
0.6141
0.5985
0° TO 8°
BSC
NOTE 1
NOTE 3
0.0926
0.1043
0.0040 MIN.
Dwg. MA-008-25 in
Dimensions in Millimeters
(controlling dimensions)
24
13
0.32
0.23
10.65
10.00
7.60
7.40
1.27
0.40
0.51
0.33
1
2
3
15.60
15.20
1.27
BSC
0° TO 8°
NOTE 1
NOTE 3
2.65
2.35
0.10 MIN.
NOTES:1. Exact body and lead configuration at vendor’s option within limits shown.
2. Lead spacing tolerance is non-cumulative
3. Webbed lead frame. Leads 4, 5, 12, and 13 are internally one piece.
Dwg. MA-008-25A mm
3957
FULL-BRIDGE PWM
MICROSTEPPING
MOTOR DRIVER
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such
departures from the detail specifications as may be required to permit improvements in
the design of its products.
The information included herein is believed to be accurate and reliable. However,
Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000