Cypress CY25701 Programmable high-frequency crystal oscillator with spread spectrum (ssxo) and no-spread spectrum (xo) option Datasheet

CY25701
Programmable High-Frequency Crystal
Oscillator with Spread Spectrum (SSXO) and
No-Spread Spectrum (XO) Option
Features
Benefits
• Crystal Oscillator with Spread Spectrum Clock (SSXO)
• No Spread Spectrum (XO) Option
• Wide operating output clock frequency range of
10–166 MHz
• Programmable spread spectrum with nominal 31.5 kHz
modulation frequency
• Center spread: ±0.25% to ±2.0%
• Down spread: –0.5% to –4.0%
• No spread: ± 0.0%
• Integrated phase-locked loop (PLL)
• 85 ps typical cycle-to-cycle Jitter with SSCLK = 133 MHz
• 3.3V operation
• Output Enable function
• Package available in 4-Pin Ceramic LCC SMD
• Pb-free package
• Industrial Temperature from –40°C to 85°C
• Provides a wide range of spread percentages for maximum
electromagnetic interference (EMI) reduction to meet
regulatory agency electromagnetic compliance (EMC)
requirements. Reduces development and manufacturing
costs and time-to-market.
• This versatile programming feature enables the user to
switch between SSXO (with Spread) and XO (without
Spread) functions with ease.
• Internal PLL to generate up to 166 MHz output.
• Suitable for most PC, consumer, and networking
applications
• Application compatibility in standard and low-power
systems
• In-house programming of samples and prototype quantities
is available using CY3672 programming kit and CY3724
socket adapters. Production quantities are available
through Cypress’s value-added distribution partners or by
using third-party programmers from BP Microsystems, HiLo
Systems, and others.
Pin Configuration
Logic Block Diagram
CY25701
4-pin Ceramic SMD
RFB
PLL
with
MODULATION
CONTROL
4
VDD
SSCLK
OE
1
VSS
2
3
C XIN
PROGRAMMABLE
CONFIGURATION
C XOUT
OUTPUT
DIVIDERS
and
MUX
3
SSCLK
1
OE
4
2
VDD
VSS
Cypress Semiconductor Corporation
Document #: 001-07313 Rev. *A
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised July 25, 2006
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CY25701
Pin Definition
Pin
Name
Description
1
OE
Output Enable pin: Active HIGH. If OE = 1, SSCLK is enabled
2
VSS
Power supply ground
3
SSCLK
Spread spectrum clock output (with or without spread)
4
VDD
3.3V power supply
Functional Description
The CY25701 is a Spread Spectrum Crystal Oscillator (SSXO)
IC used to reduce the EMI found in today’s high-speed digital
electronic systems.
The device uses a Cypress proprietary PLL and Spread
Spectrum Clock (SSC) technology to synthesize and modulate
the frequency of the embedded input crystal. By frequency
modulating the clock, the measured EMI at the fundamental
and harmonic frequencies are greatly reduced. This reduction
in radiated energy can significantly reduce the cost of
complying with regulatory agency (EMC) requirements and
improve time-to-market without degrading system performance.
The CY25701 uses a programmable configuration memory
array to synthesize output frequency and spread%.
must be submitted to the local Cypress Field Application
Engineer (FAE) or Sales Representative. Once the request
has been processed, you will receive a new part number,
samples, and data sheet with the programmed values. This
part number will be used for additional sample request and the
production orders. Contact your local Cypress FAE or sales
representative for details.
Additional information on the CY25701 can be obtained from
the Cypress web site at www.cypress.com.
Output Frequency, SSCLK Output (SSCLK, pin 3)
The modulated frequency at the SSCLK output is produced by
synthesizing from the embedded crystal oscillator frequency
input. The range of synthesized clock is from 10 to 166 MHz.
Spread Percentage (SSCLK, pin 3)
The spread% is programmed to either center spread or down
spread with various spread percentages. The range for center
spread is from ±0.25% to ±2.00%. The range for down spread
is from –0.5% to –4.0%. Contact the factory for smaller or
larger spread% amounts if required. Refer to Table 2 for
spread selection and no-spread values.
The SSCLK spread can be programmed to various spread
percentage values from ±0.25% to ±2.0% for Center Spread
and from –0.5% to –4.0% for Down Spread. Refer to Table 2
for available spread options. Enter ±0.0% (No spread) for XO
(Crystal Oscillator) without spread option.
The frequency modulated SSCLK output can be programmed
from 10 to 166 MHz.
The default frequency modulation is programmed at 31.5 kHz
for all SSCLK frequencies from 10 to 166 MHz. Alternate
frequency modulations at 30.1 kHz or 32.9 kHz can be
selected via Cyberclocks software. Contact the factory for
other alternate modulation frequencies if required.
The CY25701 is available in a 4-pin ceramic SMD package
with an operating temperature range of –40 to 85°C.
Programming Description
Frequency Modulation (SSCLK, pin 3)
Factory/Field Programmable CY25701
Factory/Field programming is available for samples and
manufacturing by Cypress and its distributors. All requests
Table 1. Programming Data Requirement
Pin Function
Output Frequency
Spread Percent Code[1]
Frequency Modulation
Pin Name
SSCLK
SSCLK
SSCLK
Pin#
3
3
3
Units
MHz
%
kHz
Program Value
ENTER DATA
ENTER DATA
31.5
Note
1. ±0.0% or Code “Z” for XO (No-Spread) option.
Document #: 001-07313 Rev. *A
Page 2 of 8
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CY25701
Table 2. Spread Percent Selection
Center Spread
Down Spread
Code
A
B
C
D
E
F
Z
Percentage
±0.25%
±0.5%
±0.75%
±1.0%
±1.5%
±2.0%
±0.0%
Code
G
H
J
K
L
M
Z
Percentage
–0.5%
–1.0%
–1.5%
–2.0%
–3.0%
–4.0%
±0.0%
Absolute Maximum Ratings
Storage Temperature (Non-condensing) .... –55°C to +100°C
Supply Voltage (VDD) .................................... –0.5V to +7.0V
DC Input Voltage....................................–0.5V to VDD + 0.5V
Junction Temperature ................................ –40°C to +125°C
Data Retention @ Tj = 125°C.................................>10 years
Package Power Dissipation...................................... 350 mW
Operating Conditions
Parameter
Description
Min.
Typ.
Max.
Unit
VDD
Supply Voltage
3.00
3.30
3.60
V
TA
Ambient Temperature (Commercial)
–20
–
70
°C
TA
Ambient Temperature (Industrial)
–40
–
85
°C
CLOAD
Max. Load Capacitance @ pin 3
–
–
15
pF
FSSCLK
SSCLK output frequency, CLOAD = 15 pF
10
–
166
MHz
FMOD
Spread Spectrum Modulation Frequency
30.0
31.5
33.0
kHz
TPU
Power-up time for VDD to reach minimum specified voltage (power ramp must be
monotonic)
0.05
–
500
ms
Min.
Typ.
Max.
Unit
10
12
–
mA
DC Electrical Characteristics
Parameter
Description
Condition
IOH
Output High Current (pin 3)
VOH = VDD – 0.5, VDD = 3.3V (source)
IOL
Output Low Current (pin 3)
VOL = 0.5, VDD= 3.3V (sink)
10
12
–
mA
VIH
Input High Voltage (pin 1)
CMOS levels, 70% of VDD
0.7VDD
–
VDD
V
VIL
Input Low Voltage (pin 1)
CMOS levels, 30% of VDD
–
–
0.3VDD
V
IIH
Input High Current (pin 1)
Vin = VDD
–
–
10
µA
IIL
Input Low Current (pin 1)
Vin = VSS
IOZ
Output Leakage Current (pin 3)
Three-state output, OE = 0
CIN
[2]
IVDD
∆f/f
–
–
10
µA
–10
–
10
µA
Input Capacitance (pin 1)
Pin 1, or OE
–
5
7
pF
Supply Current
VDD = 3.3V, SSCLK = 10 to 166 MHz,
CLOAD = 0, OE = VDD
–
–
50
mA
Initial Accuracy at room temp.
TA = 25°C, 3.3V
–25
–
25
ppm
Freq. Stability over temp. range
TA = –20°C to 70°C, 3.3V
–25
–
25
ppm
Freq. Stability over voltage range 3.0 to 3.6V
–12
–
12
ppm
Aging
–5
–
5
ppm
TA = 25°C, First year
Note
2. Guaranteed by characterization, not 100% tested.
Document #: 001-07313 Rev. *A
Page 3 of 8
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CY25701
AC Electrical Characteristics[2]
Min.
Typ.
Max.
Unit
DC
Parameter
Output Duty Cycle
Description
SSCLK, Measured at VDD/2
Condition
45
50
55
%
tR
Output Rise Time
20%–80% of VDD, CL = 15 pF
–
–
2.7
ns
tF
Output Fall Time
20%–80% of VDD, CL = 15 pF
–
–
2.7
ns
TCCJ1[3]
Cycle-to-Cycle Jitter SSCLK (Pin 3) SSCLK ≥133 MHz, Measured at VDD/2
–
85
200
ps
25 MHz ≤ SSCLK <133 MHz, Measured at
VDD/2
–
215
400
ps
SSCLK < 25 MHz, Measured at VDD/2
–
–
1% of
1/SSCK
s
TOE1
Output Disable Time (pin1 = OE)
Time from falling edge on OE to stopped
outputs (Asynchronous)
–
150
350
ns
TOE2
Output Enable Time (pin1 = OE)
Time from rising edge on OE to outputs at a
valid frequency (Asynchronous)
–
150
350
ns
TLOCK
PLL Lock Time
Time for SSCLK to reach valid frequency
–
–
10
ms
Application Circuit
Figure 1. Application Circuit Diagram
0.1 µF
Power
4
3
VDD
SSCLK
CY25701
OE
1
VSS
2
VDD
Note
3. Jitter is configuration dependent. Actual jitter is dependent on output frequencies, spread percentage, temperature, and output load. For more information,
refer to the application note, “Jitter in PLL Based Systems: Causes, Effects, and Solutions” available at http://www.cypress.com/clock/appnotes.html, or contact
your local Cypress Field Application Engineer.
Document #: 001-07313 Rev. *A
Page 4 of 8
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CY25701
Switching Waveforms
Figure 2. Duty Cycle Waveform
Cycle Timing (DC = t1A/t1B)
SSCLK
t1A
t1B
Figure 3. Output Rise/Fall Time Waveform
VDD
SSCLK
0V
Tr
Tf
Output Rise time (Tr) = (0.6 x VDD)/SR1 (or SR3)
Output Fall time (Tf) = (0.6 x VDD)/SR2 (or SR4)
Refer to AC Electrical Characteristics table for SR (Slew Rate) values.
Figure 4. Output Enable/Disable Timing Waveforms
OUTPUT
ENABLE
VDD
0V
VIH
VIL
TOE2
High Impedance
SSCLK
(Asynchronous)
TOE1
Document #: 001-07313 Rev. *A
Page 5 of 8
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CY25701
Informational Graphs [4]
172.5
161.5
169.5
169
168.5
168
167.5
167
166.5
166
165.5
165
164.5
164
163.5
163
160.5
162.5
171.5
Spread Spectrum Profile: Fnom=166MHz,
Fmod=30kHz, Spread%= -4%
170.5
169.5
168.5
167.5
166.5
Fnominal
165.5
164.5
163.5
162.5
Spread Spectrum Profile: Fnom=166MHz,
Fmod=30kHz, Spread%= +/-1%
Fnominal
159.5
0
20
68.5
40
60
80
100
120
Time (us)
140
160
180
Spread Spectrum Profile: Fnom=66MHz,
Fmod=30kHz, Spread%= -4%
68
0
200
20
67.5
40
60
80
100 120
Time (us)
140
160
180
200
Spread Spectrum Profile: Fnom=66MHz,
Fmod=30kHz, Spread%= +/-1%
67
67.5
67
66.5
66.5
Fnominal
66
Fnominal
66
65.5
65.5
65
64.5
65
64
64.5
63.5
0
20
40
60
80
100
120
Time (us)
140
160
180
200
0
20
40
60
80
100 120
Time (us)
140
160
180
200
Ordering Information
Part Number
Package Description
Product Flow
Lead-free (Pb-free)
CY25701FLXCT[5]
4-Lead Ceramic LCC SMD -Tape and Reel
Commercial, –20° to 70°C
CY25701FLXIT[5]
4-Lead Ceramic LCC SMD -Tape and Reel
Industrial, –40° to 85°C
CY25701LXCZZZT[6]
4-Lead Ceramic LCC SMD -Tape and Reel
Commercial, –20° to 70°C
CY25701LXIZZZT[6]
4-Lead Ceramic LCC SMD -Tape and Reel
Industrial, –40° to 85°C
Actual Marking[7]
CY25701FLX*
CY25701LX*
F=Field
Programmable
Marketing Part Number (CY25701)
C Y
2
X
*
L
Pin 1 mark L = LCC X = Pb free
5
Temp
7
Marketing Part Number (CY25701)
L = LCC
F
C
Y
2
5
7
0
Y W W
X
*
z
z
z
Y W W
0
1
YWW = Date Code (Year & WW)
Pin 1 mark X = Pb free
Temp
1 L
zzz = Programmable Dash Code YWW = Date Code (Year & WW)
Notes
4. The “Informational Graphs” are meant to convey the typical performance levels. No performance specifications is implied or guaranteed. Refer to the tables on
pages 4 and 5 for device specifications.
5. “FLX” suffix is used for products programmed in field by Cypress Distributors.
6. “ZZZ” denotes the assigned product dash number. This number will be assigned by factory after the output frequency and spread percent programming data
is received from the customer.
7. Temp can be C (Com’l) or I (Industrial).
Document #: 001-07313 Rev. *A
Page 6 of 8
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CY25701
Package Drawings and Dimensions
4-Lead (5.0x3.2mm) Ceramic LCC LZ04A
DIMENSIONS IN MM
GENERAL TOLERANCE: ± 0.15MM
0.70
1.30 Max
SIDE VIEW
5.0
1.20
0.80
#3
#2
3.2
#4
#1
2.90
2.50
TOP VIEW
BOTTOM VIEW
001-02743-*A
All product and company names mentioned in this document are the trademarks of their respective holders.
Document #: 001-07313 Rev. *A
Page 7 of 8
© Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be
used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
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Document History Page
Document Title: CY25701 Programmable High-Frequency Crystal Oscillator with Spread Spectrum (SSXO) and
No-Spread Spectrum (XO) Option
Document Number: 001-07313
REV.
ECN NO.
Issue Date
**
442944
See ECN
*A
487736
See ECN
Document #: 001-07313 Rev. *A
Orig. of
Change
RGL
Description of Change
New data sheet
KKVTMP Added Industrial temp
Page 8 of 8
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