\ CDB5521/22/23/24/28 CDB5521/22/23/24/28 Evaluation Board and Software Features General Description l Evaluation The CDB5521/22/23/24/28 is an inexpensive tool designed to evaluate the performance of the CS5521, CS5522, CS5523, CS5524, and CS5528 Analog-to-Digital Converters (ADC). Board and Software Supports All Chips: CS5521, CS5522, CS5523, CS5524, and CS5528 l Direct Thermocouple Interface l RS-232 to PC With Test Modes l On-board 80C51 Microcontroller l On-board Voltage Reference l Lab Windows/CVITM Evaluation Software – Register Setup & Chip Control – Data Capture – FFT Analysis – Time Domain Analysis – Noise Histogram Analysis l On-board The CDB5521/22/23/24/28 also includes one installed ADC sample, and software for Data Capture, Time Domain Analysis, Histogram Analysis, and Frequency Domain Analysis. Charge Pump Drive Circuitry -5 ANALOG The evaluation board includes a 2.5 V voltage reference, an 80C51 microcontroller, an RS232 driver/receiver, and firmware. The 8051 controls the serial communication between the evaluation board and the PC via the firmware, thus, enabling quick and easy access to all of the CS5521/22/23/24/28’s registers. +5 ANALOG AGND ORDERING INFORMATION CDB5521/22/23/24/28 DGND Evaluation Board +5 DIGITAL VOLTAGE REFERENCE J2 REF+ TEST SWITCHES on off 3 REFJ1 AIN1+ CS5521 CS5522 CS5523 CS5524 CS5528 AIN1AIN2+ LEDs 2 80C51 Microcontroller 1 RS232 CONNECTOR AIN2AIN3+ AIN3- CS SDI SDO SCLK AIN4+ AIN4- RS232 DRIVER/RECEIVER A0 A1 NBV CPD NBV DRIVE CIRCUITRY RESET CIRCUITRY CRYSTAL 32.768 kHz Preliminary Product Information P.O. Box 17847, Austin, Texas 78760 (512) 445 7222 FAX: (512) 445 7581 http://www.cirrus.com CRYSTAL 11.0592 MHz This document contains information for a new product. Cirrus Logic reserves the right to modify this product without notice. Copyright Cirrus Logic, Inc. 2000 (All Rights Reserved) MAY ‘00 DS317DB2 1 CDB5521/22/23/24/28 TABLE OF CONTENTS 1. PART I: HARDWARE ............................................................................................................... 4 1.1 Introduction ........................................................................................................................ 4 1.3 Using the Evaluation Board ............................................................................................... 8 1.4. Power Connections ........................................................................................................... 8 1.5 Negative Bias Voltage ........................................................................................................ 8 1.6 Software ............................................................................................................................. 9 1.7. Writing Your Own Interface Software ................................................................................ 9 2. PART II: SOFTWARE ............................................................................................................. 13 2.1 Installation Procedure ...................................................................................................... 13 2.3 Menu Bars Overview ........................................................................................................ 14 2.4 Setup Window Overview .................................................................................................. 15 2.5 Data FIFO Window Overview .......................................................................................... 15 2.6 Histogram Window Overview ........................................................................................... 16 2.7 Frequency Domain Window (i.e. FFT) ............................................................................. 17 2.8 Time Domain Window Overview ...................................................................................... 18 2.9 Calibration Window Overview .......................................................................................... 19 2.10 Trouble Shooting the Evaluation Board ......................................................................... 19 LIST OF FIGURES Figure 1. CS5522 Analog Section ................................................................................................... 5 Figure 2. CS5524/28 Analog Section .............................................................................................. 6 Figure 3. Digital Section .................................................................................................................. 7 Figure 4. Power Supplies ................................................................................................................ 8 Figure 5. Main Menu ..................................................................................................................... 21 Figure 6. Setup Window ................................................................................................................ 21 Figure 7. Data FIFO Window......................................................................................................... 22 Figure 8. Frequency Domain Analysis .......................................................................................... 22 Figure 9. Calibration Menu ............................................................................................................ 23 Figure 10. Time Domain Analysis ................................................................................................. 23 Figure 11. Histogram Analysis (Using the CS5524 with default register settings and 24-bit output words) ...................................................................................................... 24 Figure 12. CDB5521/22/23/24/28 Component Side Silkscreen .................................................... 25 Contacting Cirrus Logic Support For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at: http://www.cirrus.com/corporate/contacts/ IBM, AT and PS/2 are trademarks of International Business Machines Corporation. Windows is a trademark of Microsoft Corporation. Lab Windows and CVI are trademarks of National Instruments. SPITM is a trademark of Motorola. MICROWIRETM is a trademark of National Semiconductor. Preliminary product information describes products which are in production, but for which full characterization data is not yet available. Advance product information describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of any kind (express or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights of third parties. This document is the property of Cirrus Logic, Inc. and implies no license under patents, copyrights, trademarks, or trade secrets. No part of this publication may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc. Items from any Cirrus Logic website or disk may be printed for use by the user. However, no part of the printout or electronic files may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture or sale of any items without the prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing in this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trademarks and service marks can be found at http://www.cirrus.com. 2 DS317DB2 CDB5521/22/23/24/28 Figure 13. CDB5521/22/23/24/28 Component Side (top) ............................................................. 26 Figure 14. CDB5521/22/23/24/28 Solder Side (bottom) ............................................................... 27 LIST OF TABLES Table 1. Header Descriptions.......................................................................................................... 9 Table 2. Microcontroller Read/Write Commands via RS-232 ....................................................... 10 Table 3. Microcontroller Conversion Commands via RS-232 ....................................................... 10 Table 4. Microcontroller Self Calibration Commands via RS-232 ................................................. 11 Table 5. Microcontroller System Calibration Commands via RS-232 ........................................... 12 DS317DB2 3 CDB5521/22/23/24/28 1. PART I: HARDWARE 1.1 Introduction The CDB5521/22/23/24/28 evaluation board provides a means of testing the CS5521/22/23/24/28 Analog-to-Digital Converters (ADCs). The board interfaces the converters to an IBMTM compatible PC via an RS-232 interface while operating from a +5 V and -5 V power supply. To accomplish this, the board comes equipped with an 80C51 microcontroller and a 9-pin RS-232 cable, which physically interfaces the evaluation board to the PC. Additionally, analysis software provides easy access to the internal registers of the converters and provides a means to capture data and display the converters’ time domain, frequency domain, and noise histogram performance. 1.2 Evaluation Board Overview The board is partitioned into two main sections: analog and digital. The analog section consists of the either the CS5521, CS5522, CS5523, CS5524 or CS5528, a precision voltage reference, and the circuitry to generate a negative voltage. The digital section consists of the 80C51 microcontroller, the hardware test switches, the reset circuitry, and the RS-232 interface. The CS5521/22/23/24/28 is designed to digitize low level signals while operating from a 32.768 KHz crystal. As shown in Figures 1 and 2, a thermocouple can be connected to the converter’s inputs via J1’s AIN+ and AIN- inputs. Note, a simple RC network filters the thermocouple’s output to 4 reduce any interference picked up by the thermocouple leads. The evaluation board provides two voltage reference options, on-board and external. With HDR5’s jumpers in positions 1 and 4, the LT1019 provides 2.5 volts (the LT1019 was chosen for its low drift, typically 5ppm/°C). By setting HDR5’s jumpers to position 2 and 3, the user can supply an external voltage reference to J2’s REF+ and REF- inputs (Application Note 4 on the web details various voltage references). The A/D converters’ serial interfaces are SPITM and MICROWIRETM compatible. The interface control lines (CS, SDI, SDO, and SCLK) are connected to the 80C51 microcontroller via port one. To interface a different microcontroller to the ADC chip, the control lines to the ADC are available at HDR6 (Header 6). However, to connect an external microcontroller to the header, the evaluation board must be modified in one of three ways: 1) cut the interface control traces going to the on-board 80C51 microcontroller, 2) remove resistors R1-R6, or 3) remove the 80C51 microcontroller from its socket on the evaluation board. Figure 3 illustrates the schematic of the digital section. It contains the microcontroller, a Motorola MC145407 interface chip, and test switches. The test switches aid in debugging communication problems between the CDB5521/22/23/24/28 and the PC. The microcontroller derives its clock from an 11.0592 MHz crystal. From this, the controller is configured to communicate via RS-232 at 9600 baud, no parity, 8-bit data, and 1 stop bit. DS317DB2 CDB5521/22/23/24/28 R15 10Ω +5V Analog C14 0.1µF C29 10µF 2 1 3 R17 301Ω J1 1 AIN1+ 2 AIN13 AIN2+ 4 AIN2- HDR1 C2 4700pF HDR2 HDR8 C3 4700pF U4 LT1019 +5V Analog C20 0.1µF IN C33 0.1µF HDR9 U6 AIN1CS5521 CS5522* AIN2+ C34 0.1µF 17 R26 301Ω AIN1+ AIN2- 14 C30 10µF CS SDI SDO SCLK A0 A1 DGND Y2 32.768kHz 11 9 8 12 15 6 16 To Figure 3 13 C9 0.033µF CPD 20 OUT R7 C16 20kΩ 0.1µF C15 0.1µF JP7 10 C35 0.1µF R24 49.9Ω GND TRIM XIN XOUT 18 R25 301Ω VD+ AGND C32 0.1µF 4 R18 301Ω VA+ 19 7 D2 1N4148 VREF+ VREF- HDR5 D3 1N4148 +5V Analog JP3 JP6 NBV J2 C1 4700pF R21 301Ω REF+ REF- CPD GND 5 HDR4 337 C41 0.1µF D5 BAT85 C22 10µF + JP4 JP5 R22 301Ω C40 0.1µF * CS5521 and CS5522 are interchangeable -5V Analog U2 LM337_LZ VIN VOUT C21 1µF + ADJ C11 0.1µF + R23 1kΩ R16 1kΩ Figure 1. CS5522 Analog Section DS317DB2 5 CDB5521/22/23/24/28 R15 10Ω +5V Analog C14 0.1µF C29 10µF 2 1 3 R17 301Ω HDR1 C2 4700pF HDR2 R25 301Ω AIN1+ AIN1AIN2+ AIN2AIN3+ AIN3AIN4+ AIN4- 1 2 3 4 5 6 7 8 HDR8 C3 4700pF R26 301Ω HDR9 HDR11 C4 4700pF HDR12 U4 LT1019 C20 0.1µF IN AIN2+/AIN3 AIN2-/AIN4 Y2 32.768kHz 13 11 10 14 17 8 18 To Figure 3 15 C9 0.033µF CPD 9 AIN3-/AIN6 D2 1N4148 C37 0.1µF AIN4+/AIN7 D3 1N4148 C31 4700pF 19 AIN4-/AIN8 HDR14 C39 0.1µF NBV CPD GND 7 337 24 C16 R7 0.1µF 20kΩ JP3 23 VREF+ VREF- HDR5 * CS5523, CS5524 and CS5528 are interchangeable C1 4700pF R21 301Ω C41 0.1µF JP4 U2 LM337_LZ VIN VOUT ADJ C21 1µF + C11 0.1µF JP5 R22 301Ω D5 BAT85 C22 10µF + OUT HDR4 * -5V Analog JP6 REF+ REF- JP7 12 AIN3+AIN5 +5V Analog J2 CS SDI SDO SCLK A0 A1 R24 49.9Ω GND TRIM C15 0.1µF HDR13 C38 0.1µF R30 301Ω +5V Analog XOUT C36 0.1µF 20 R29 301Ω XIN DGND 6 R28 301Ω C30 10µF AIN1-/AIN2 C35 0.1µF 5 R27 301Ω AIN1+/AIN1 C34 0.1µF 21 16 U3 CS5523 CS5524 CS5528* C33 0.1µF 22 J1 AGND VD+ C32 0.1µF 4 R18 301Ω VA+ + R23 1kΩ R16 1kΩ C40 0.1µF Figure 2. CS5524/28 Analog Section 6 DS317DB2 DS317DB2 A1 A0 SCLK R9 750kΩ Bypass Cap C24 33pF C0G RESET C19 0.1µF +5V Digital 6 5 4 3 2 1 9 19 18 R1 200 Ω R2 200 Ω R3 200 Ω R4 200 Ω R5 200 Ω R6 200 Ω Y1 11.0592MHz C23 33pF C0G CS SDI SDO SCLK A0 A1 C18 0.1µF D4 1N4148 +5V Digital From Figure 1, 2 SDO SDI CS HDR6 RST XTAL2 XTAL1 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0 VSS 20 UM1 80C51 39 40 P2.3 P2.2 P2.1 24 23 22 P2.0 21 P3.2 13 P3.3 14 P3.4 12 P3.0 10 11 P3.1 P0.0 VDD +5V Digital R12 5.11kΩ C7 47µF 5 6 7 8 + 4 + 3 + 2 + 1 Test Switch 3 Test Switch 2 Test Switch 1 D1 LED_555_5003 R10 5.11kΩ S1 C17 0.1µF Figure 3. Digital Section R11 5.11kΩ JP2 R13 10kΩ + OFFSETCAL GAINCAL COMM RESET + TP71 TXD TP72 RXD Loopback Normal To RS-232 HDR7 From RS-232 C27 10µF 11 12 13 14 15 16 1 C1+ + U1 MC145407 2 4 C2+ 19 C28 10µF 10 9 8 7 6 5 20 17 VCC VDD 3 18 C2C1- +5V Digital C26 10µF + + C25 10µF DCD DSR DTR CTS RTS RXD TXD RI R14 10kΩ 5 1 6 4 8 7 2 3 9 CDB5521/22/23/24/28 7 CDB5521/22/23/24/28 1.3 Using the Evaluation Board The CS5521/22/23/24/28 are highly integrated ADCs. They contain a multiplexer, an instrumentation amplifier (IA), a programmable gain amplifier (PGA), an on-chip charge pump drive (CPD), and programmable output word rates (OWR). The IA provides a set gain of 20 while the PGA sets the input levels of the ADC at either 25 mV, 55 mV, 100 mV, 1 V, 2.5 V, or 5 V (for VREF = 2.5 V). The CPD provides a square wave output. This output, along with two diodes and two capacitors, is used to supply the negative supply to the IA, enabling measurements of ground referenced signals. The ADC’s digital filter allows the user to select output word rates (OWR’s) from 1.88 Hz up to 101 Hz. higher output word rates can be attained when a faster clock source is used. Since the CS5521/22/23/24/28 have such a high degree of integration and flexibility, the CS5521/23 or CS5522/24/28 data sheet should be read thoroughly before and consulted during the use of the CDB5521/22/23/24/28. Table 1 lists the different headers on the CDB5521/22/23/24/28 and their functions. The locations of these headers are marked on the top of the board, and the silkscreen and layout of the board can also be found at the end +5V Analog Z3 P6KE6V8P +5V Analog + C8 47µF C13 0.1µF AGND Z1 P6KE6V8P -5V Analog of this document in Figures 12, 13, and 14 for reference. 1.4. Power Connections Figure 4 illustrates the power supply connections to the evaluation board. The +5 V Analog supplies the analog section of the evaluation board, the LT1019 and the ADC. The -5 V Analog supplies the negative bias voltage circuitry. The +5 V Digital supplies a separate five volts to the digital section of the evaluation board, the 80C51, the reset circuitry, and the RS-232 interface circuitry. 1.5 Negative Bias Voltage The evaluation board provides three means of supplying the Negative Bias Voltage (NBV). HDR4 (Header 4) selects between them. When HRD4 is in position one, the LM337 supplies NBV with an adjustable voltage. R16 is used to adjust this voltage between -1.25 V and -5 V. When in position two, HDR4 grounds NBV. And by setting HDR4 to position three, the converter’s Charge Pump Drive provides NBV with a dc rectified voltage, nominally -2.1 V. Note: NBV should not exceed a voltage more negative than -3.0 V. +5V Digital Z2 P6KE6V8P +5V Digital + C6 47µF C12 0.1µF DGND + C5 47µF C10 0.1µF -5V Analog Figure 4. Power Supplies 8 DS317DB2 CDB5521/22/23/24/28 1.6 Software 1.7. Writing Your Own Interface Software The evaluation board comes with software and an RS-232 cable to link the evaluation board to the PC. The executable software was developed with Lab Windows/CVITM and meant to run under WindowsTM 3.1 or later. After installing the software, read the readme.txt file for last minute changes in the software. Additionally, Section 2., Part II: Software further details how to install and use the software Tables 2 through 5 list the RS-232 commands used to communicate between the PC and the microcontroller. To develop additional code to communicate to the evaluation board via RS-232, the following applies: to write to an internal ADC register, choose the appropriate write command byte (See Table 2), and transmit it LSB first. Then, transmit the three data bytes lowest order byte (bits 7-0) first with the LSB of each byte transmitted first. These three data bytes provide the 24-bits of information to be written to the desired register. To read from an internal register, choose the appropriate read command byte and transmit it LSB first. Then, the microcontroller automatically acquires the ADC’s register contents and returns the 24-bits of information. The returned data is transmitted lowest order byte first with the LSB of each byte transmitted first. Name HDR1 HDR2 HDR3 HDR4 HDR5 HDR6 HDR7 HDR8 HDR9 HDR10 HDR11 HDR12 HDR13 HDR14 Function Description Used to switch AIN1+ (AIN1 on CS5528) between J1 and AGND. Used to switch AIN1- (AIN2 on CS5528) between J1 and AGND. Does not exist. Used to switch the power for NBV from the LM337, CPD, or AGND. Used to switch VREF+ and VREFpins from external J2 header to the on board LT1019 reference. Used to connect an external microcontroller. Used in conjunction with the self test modes to test the UART/RS232 communication link between the microcontroller and a PC. Used to switch AIN2 + (AIN3 on CS5528) between J1 and AGND. Used to switch AIN2- (AIN4 on CS5528) between J1 and AGND. Does not exist. Used to switch AIN3+ (AIN5 on CS5528) between J1 and AGND. Used to switch AIN3- (AIN6 on CS5528) between J1 and AGND. Used to switch AIN4+ (AIN7 on CS5528) between J1 and AGND. Used to switch AIN4- (AIN8 on CS5528) between J1 and AGND. Table 1. Header Descriptions DS317DB2 9 CDB5521/22/23/24/28 Register Read Command (HEX) Write Command (HEX) Offset Register Physical Channel 1 09 01 Offset Register Physical Channel 2 19 11 Offset Register Physical Channel 3 29 21 Offset Register Physical Channel 4 39 31 Offset Register Physical Channel 5 49 41 Offset Register Physical Channel 6 59 51 Offset Register Physical Channel 7 69 61 Offset Register Physical Channel 8 79 71 Gain Register Physical Channel 1 0A 02 Gain Register Physical Channel 2 1A 12 Gain Register Physical Channel 3 2A 22 Gain Register Physical Channel 4 3A 32 Gain Register Physical Channel 5 4A 42 Gain Register Physical Channel 6 5A 52 Gain Register Physical Channel 7 6A 62 Gain Register Physical Channel 8 7A 72 Configuration Register 0B 03 Conversion Data FIFO 0C --- Channel Setup Registers 0D 05 Table 2. Microcontroller Read/Write Commands via RS-232 Perform Conversion Conversion Command (HEX) Normal Conversion on Setup 1 80 Normal Conversion on Setup 2 88 Normal Conversion on Setup 3 90 Normal Conversion on Setup 4 98 Normal Conversion on Setup 5 A0 Normal Conversion on Setup 6 A8 Normal Conversion on Setup 7 B0 Normal Conversion on Setup 8 B8 Normal Conversion on Setup 9 C0 Normal Conversion on Setup 10 C8 Normal Conversion on Setup 11 D0 Normal Conversion on Setup 12 D8 Normal Conversion on Setup 13 E0 Normal Conversion on Setup 14 E8 Normal Conversion on Setup 15 F0 Normal Conversion on Setup 16 F8 Table 3. Microcontroller Conversion Commands via RS-232 10 DS317DB2 CDB5521/22/23/24/28 Self-Offset Calibration Calibration Command (HEX) Self-Offset Calibration on Setup 1 81 Self-Offset Calibration on Setup 2 89 Self-Offset Calibration on Setup 3 91 Self-Offset Calibration on Setup 4 99 Self-Offset Calibration on Setup 5 A1 Self-Offset Calibration on Setup 6 A9 Self-Offset Calibration on Setup 7 B1 Self-Offset Calibration on Setup 8 B9 Self-Offset Calibration on Setup 9 C1 Self-Offset Calibration on Setup 10 C9 Self-Offset Calibration on Setup 11 D1 Self-Offset Calibration on Setup 12 D9 Self-Offset Calibration on Setup 13 E1 Self-Offset Calibration on Setup 14 E9 Self-Offset Calibration on Setup 15 F1 Self-Offset Calibration on Setup 16 F9 Self Gain Calibration Calibration Command (HEX) Self-Gain Calibration on Setup 1 82 Self-Gain Calibration on Setup 2 8A Self-Gain Calibration on Setup 3 92 Self-Gain Calibration on Setup 4 9A Self-Gain Calibration on Setup 5 A2 Self-Gain Calibration on Setup 6 AA Self-Gain Calibration on Setup 7 B2 Self-Gain Calibration on Setup 8 BA Self-Gain Calibration on Setup 9 C2 Self-Gain Calibration on Setup 10 CA Self-Gain Calibration on Setup 11 D2 Self-Gain Calibration on Setup 12 DA Self-Gain Calibration on Setup 13 E2 Self-Gain Calibration on Setup 14 EA Self-Gain Calibration on Setup 15 F2 Self-Gain Calibration on Setup 16 FA Table 4. Microcontroller Self Calibration Commands via RS-232 DS317DB2 11 CDB5521/22/23/24/28 System-Offset Calibration Calibration Command (HEX) System-Offset Calibration on Setup 1 85 System-Offset Calibration on Setup 2 8D System-Offset Calibration on Setup 3 95 System-Offset Calibration on Setup 4 9D System-Offset Calibration on Setup 5 A5 System-Offset Calibration on Setup 6 AD System-Offset Calibration on Setup 7 B5 System-Offset Calibration on Setup 8 BD System-Offset Calibration on Setup 9 C5 System-Offset Calibration on Setup 10 CD System-Offset Calibration on Setup 11 D5 System-Offset Calibration on Setup 12 DD System-Offset Calibration on Setup 13 E5 System-Offset Calibration on Setup 14 ED System-Offset Calibration on Setup 15 F5 System-Offset Calibration on Setup 16 FD System Gain Calibration Calibration Command (HEX) System-Gain Calibration on Setup 1 86 System-Gain Calibration on Setup 2 8E System-Gain Calibration on Setup 3 96 System-Gain Calibration on Setup 4 9E System-Gain Calibration on Setup 5 A6 System-Gain Calibration on Setup 6 AE System-Gain Calibration on Setup 7 B6 System-Gain Calibration on Setup 8 BE System-Gain Calibration on Setup 9 C6 System-Gain Calibration on Setup 10 CE System-Gain Calibration on Setup 11 D6 System-Gain Calibration on Setup 12 DE System-Gain Calibration on Setup 13 E6 System-Gain Calibration on Setup 14 EE System-Gain Calibration on Setup 15 F6 System-Gain Calibration on Setup 16 FE Miscellaneous Commands Command Variable # of Normal Conversions 1F Serial Port Initialization 3F Reset Converter 4F Arbitrary Read SDO EF Arbitrary Write SDI FF Table 5. Microcontroller System Calibration Commands via RS-232 12 DS317DB2 CDB5521/22/23/24/28 2. PART II: SOFTWARE 2.1 Installation Procedure To install the software: 1) Turn on the PC, running Windows 95TM or later. 2) Insert the Installation Diskette #1 into the PC. 3) Select the Run option from the Start menu. 4) At the prompt, type: A:\SETUP.EXE <enter>. 5) The program will begin installation. 6) If it has not already been installed on the PC, the user will be prompted to enter the directory in which to install the CVI Run-Time EngineTM. The Run-Time EngineTM manages executables created with Lab Windows/CVITM. If the default directory is acceptable, select OK and the Run-Time EngineTM will be installed there. 7) After the Run-Time EngineTM is installed, the user is prompted to enter the directory in which to install the CDB55521/22/23/24/28 software. Select OK to accept the default directory. 8) Once the program is installed, it can be run by double clicking on the Eval5522 icon, or through the Start menu. Note: Thesoftwareiswrittentorunwith640x480resolution; however, it will work with 1024 x 768 resolution. If the user interface seems to be a little small, the user might consider setting the display settings to 640 x 480. (640x480 was chosen to accommodate a variety of computers). 2.2 Using the Software At start-up, the window Start-Up appears first (Figure 5). This window contains information concerning the software’s title, revision number, copyright date, etc. Additionally, at the top of the screen is a menu bar which displays user options. Notice, the DS317DB2 menu bar item Menu is initially disabled. This eliminates any conflicts with the mouse or concurrent use of modems. Before proceeding any further, the user is prompted to select the serial communication port. To initialize a port, pull down option Setup from the menu bar and select either COM1 or COM2. After a port is initialized, it is a good idea to test the RS-232 link between the PC and the evaluation board. To do this, pull down the Setup menu from the menu bar and select the option TESTRS232. The user is then prompted to set the evaluation board’s test switches to 011 and then reset the board. Once this is done, proceed with the test. If the test fails, check the hardware connection and repeat again. Otherwise, set the test switches to 000 (normal mode) and reset the board. The option Menu is now available and performance tests can be executed. The evaluation software provides three types of analysis tests - Time Domain, Frequency Domain, and Histogram. The Time Domain analysis processes acquired conversions to produce a plot of Conversion Sample Number versus Magnitude. The Frequency Domain analysis processes acquired conversions to produce a magnitude versus frequency plot using the Fast-Fourier transform (results up to Fs/2 are calculated and plotted). Also, statistical noise calculations are calculated and displayed. The Histogram analysis test processes acquired conversions to produce a histogram plot. Statistical noise calculations are also calculated and displayed (see Figures 4 through 9). The evaluation software was developed with Lab Windows/CVITM, a software development package from National Instruments. More sophisticated analysis software can be developed by purchasing the development package from National Instruments (512-794-0100). 13 CDB5521/22/23/24/28 2.3 Menu Bars Overview file. The file must comply with the CDBCAPTURE file save format. The format is: part number, throughput (or sample rate), number of conversions, maximum range, and the data conversions. The user is prompted to enter the path and file name of previously saved data. To prevent hardware conflicts, this option is deactivated while in the Setup Window. The menu bar controls the link between windows and allows the user to exit the program. It also allows the user to initialize the serial port and load presaved data conversions from a file. The six principal windows are the Start-Up, the Setup Window, the Power Spectrum Window (also referred to as the FFT window), the Histogram Window, the Time Domain Window, and the Calibrate Window. - Specifically, the menu bar has the following control items: • Menu 1) test the link between the PC and the RS232 interface circuitry; and To select, click on option Menu from the menu bar, or use associated hot keys. The items associated with MENU are listed and described below. - Start-Up Window (F1) - Setup Window - Power Spectrum Window (F3) - Histogram Window (F4) - Time Domain Window (F5) - Calibrate Window (F6) 2) test the RS-232 link between the PC and the microcontroller. - (F2) These six menu items allow the user to navigate between the windows. They are available at all times via the menu bar or hot keys. • Setup To select, click on option Setup from the menu bar. The functions available under Setup are: - - - 14 COM1 - When selected, COM1 is initialized to 9600 baud, no parity, 8 data bits, and 1 stop bit. COM2 - When selected, COM2 is initialized to 9600 baud, no parity, 8 data bits, and 1 stop bit. Load From Disk - Used to load and display previously saved data conversions from a TESTRS232 - This test mode tests the ability of the PC to communicate to the evaluation board. It consists of two subtests: • HDR7 distinguishes these two subtests. Set HDR7 to Normal to test the complete communication link. Or set HDR7 to Loop Back to test the link between the RS-232 Circuitry and the PC. Then, set the test switches to 110 and reset the evaluation board. The LED’s should indicate a binary six signifying that the hardware is ready to initiate the test. To complete the test, the user must initialize the PC. First, use the SETUP menu to select a communications port and then select the TESTRS232 option. From there, user prompts navigate the user through the test. The PC indicates if the test passes or fails. Once either test is complete, the LED’s toggle to indicate that the test mode is complete. Part Allows user to select a different converter. • Quit Allows user to exit program. DS317DB2 CDB5521/22/23/24/28 2.4 Setup Window Overview The Setup Window (Figure 6) allows the user to read and write to the internal register of the converter in either binary or hexadecimal, and acquire real-time conversions. It has quick access control icons that quickly reset the converter, reset the converter’s serial port, or self-calibrate the converter’s offset and gain. The following are controls and indicators associated with this window. • Acquire Data This is a control icon. When pressed, the PC transmits the collect single conversion command to the microcontroller. The microcontroller in turn collects a conversion from the ADC and returns it to the PC. The PC stores the conversion and collects additional conversions to form a set. From the sample set collected, the high, the low, peak-to-peak, average, and standard deviation, are computed (the size of the data set is set by the Num To Average input) and then the display icons are updated. This process continues until the STOP button is pressed, or until another window is selected. Note: • The quick access control icons are disabled once Acquire is selected. This eliminates potential hardware conflicts. Binary Icons Input icons array to set/clear the 24 individual bits in the configuration or channel-setup registers. The respective registers bit is set/cleared as soon as the icon is clicked. • Channel Selects the Setup that will be accessed to perform conversions when Acquire Data is activated. • down menu above the register decode box to select between the different registers. • Hexadecimal Icons Nine input/display icons that allow a user to set/clear the 24 bits in the configuration, or channel setup registers via 6 hexadecimal nibbles. If the upper nibbles in the registers are zero’s, the leading zero nibbles need not be entered. • Num To Average Input icon that sets the size of the data conversion set referred to after the Acquire Icon is activated. • Reinitialize Port This is a control icon. When pressed, 128 logic 1’s followed by a logic ‘0’ are sent to the ADC’s serial port to reset its port. It does not reset the RS-232 link. • Reset A/D This is a control icon. When pressed, the microcontroller sends the appropriate commands to return the converter to its initial default state. • Stop Stops the collection of conversion data. • Update Icons This is a control icon. When pressed the configuration and channel -setup registers contents are acquired. Then, the configuration text box and the register content icons are updated. • Data FIFO Window This button opens the Data FIFO Window when pressed. Register Decode Box 2.5 Data FIFO Window Overview Text display box that displays the decoded meaning of each bit in the configuration register and the channel setup registers. Use the pull- The following describes the controls available in the Data FIFO Window (Figure 7). DS317DB2 15 CDB5521/22/23/24/28 • Acquire Data This icon begins a conversion cycle based on the selection of MC, LP, and RC. Depending on the status of these bits, the software will instruct the converter to do single conversions or collect data in the FIFO, and display the information on the screen. Pressing the STOP button will end the conversion cycle. All other icons are disabled during the conversion cycles to avoid hardware conflicts. • Channel • • • Channel Data Boxes 2.6 Histogram Window Overview The following is a description of the controls and indicators associated with the Histogram Window (Figure 11). Many of the control icons are usable from the Histogram Window, the Frequency Domain Window, and the Time Domain Window. For brevity, they are only described in this section. 16 Collect Initiates the data conversion collection process. COLLECT has two modes of operation: collect from file or collect from converter. To collect from a file an appropriate file from the SETUPDISK menu bar option must be selected. Once a file is selected, its content is displayed in the graph. If the user is collecting real-time conversions to analyze, the appropriate COM port must be selected. The user is then free to collect the preset number of conversions (preset by the CONFIG pop-up menu discussed below). Notice, there is a significant acquisition time difference between the two methods. Data FIFO Boxes When using the CS5521/23, these boxes will contain the conversion channel information returned with the data word. When using the CS5522/24/28, these boxes will be inactive. Channel Selects the Setup that will be accessed to perform conversions when COLLECT is activated. These boxes display the information returned from the data FIFO buffer when MC = 1. For MC = 0, the single conversion will be displayed in box number 1. • Cancel Once selected, it allows a user to exit from the COLLECT algorithm. If data conversion sample sets larger than 64 are being collected and the CANCEL button is selected, it is recommended that the user reset the evaluation board. The board will eventually recover from the continuous collection mode, but the recovery time could be as long as 10 minutes. Selects the Setup that will be accessed for single conversions (MC = 0). For MC = 1, this box is ignored. • Bin Displays the x-axis value of the cursor on the Histogram. MC/LP/RC Selection This box allows the user to select between the different types of conversion cycles available by modifying the MC, LP, and RC bits in the configuration register (refer to the CS5521/22/23/24/28 data sheet for more information). • • • Config Opens a pop-up panel to configure how much data is to be collected, and how to process the data once it is collected. The following are controls and indicators associated with the CONFIG panel. - Samples - User selection of 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, or 8192 conversions. DS317DB2 CDB5521/22/23/24/28 - • Window - Used in the Power Spectrum Window to calculate the FFT. Windowing algorithms include the Blackman, Blackman-Harris, Hand, 5-term Hodie, and 7term Hodie. The 5-term Hodie and 7-term Hodie are windowing algorithms developed at Crystal Semiconductor. If information concerning these algorithms is needed, call technical support. - Average - Sets the number of consecutive FFT’s to perform and average. - Limited Noise Bandwidth - Limits the amount of noise in the converters bandwidth. When set to zero, no limited noise calculations are done. - FFT Bandwidth - Used in the Power Spectrum Window to allow user-scalability of the frequency axis. When set to zero, the axis is auto-scaled to one-half the output word rate. - OK - Accept the changes • 3) print current graph. • MAXIMUM • • VARIANCE Indicates the Variance for the current data set. • ZOOM Control icon that allows the operator to zoom in on a specific portion of the current graph. To zoom, click on the ZOOM icon, then click on the graph to select the first point (the 1st point is the top left corner of the zoom box). Then click on the graph again to select the second point (the 2nd point is the bottom right corner of the zoom box). Once an area has been zoomed in to, the OUTPUT functions can be used to print a hard copy of that region. Click on RESTORE when done with the zoom function. 2.7 Frequency Domain Window (i.e. FFT) Indicator for the maximum value of the collected data set. The following describe the controls and indicators associated with the Frequency Domain Analysis (Figure 8). MEAN • • 1) save current data set to a file with the CDBCAPTURE format DS317DB2 Channel See description in Section 2.6, Histogram Window Overview. Output Control that calls a pop-up menu. This menu controls three options: CANCEL See description in Section 2.6, Histogram Window Overview. MINIMUM Indicator for the minimum value of the collected data set. • STD. DEV. Indicator for the Standard Deviation of the collected data set. Indicator for the mean of the data sample set. • RESTORE Restores the display of the graph after zoom has been entered. MAGNITUDE Displays the y-axis value of the cursor on the Histogram. • 2) print current screen, or • COLLECT See description in Section 2.6, Histogram Window Overview. 17 CDB5521/22/23/24/28 • • Config 2.8 Time Domain Window Overview See description in Section 2.6, Histogram Window Overview. The following controls and indicators are associated with the Time Domain Analysis (Figure 10). FREQUENCY • Displays the x-axis value of the cursor on the FFT display. • MAGNITUDE See description in Section 2.6, Histogram Window Overview. • Output • See description in Section 2.6, Histogram Window Overview. • S/D Indicator for the Signal-to-Distortion Ratio, 4 harmonics are used in the calculations (decibels). • • • • • • MAGNITUDE Displays current y-position of the cursor on the time domain display. • MAXIMUM Indicator for the maximum value of the collected data set. • MINIMUM Indicator for the minimum value of the collected data set. • # of AVG Displays the number of FFT’s averaged in the current display. COUNT Displays current x-position of the cursor on the time domain display. ZOOM See description in Section 2.6, Histogram Window Overview. Config See description in Section 2.6, Histogram Window Overview. S/PN Indicator for the Signal-to-Peak Noise Ratio (decibels). • • SNR Indicator for the Signal-to-Noise Ratio, first 4 harmonics are not included (decibels). COLLECT See description in Section 2.6, Histogram Window Overview. S/N+D Indicator for the Signal-to-Noise + Distortion Ratio (decibels). Channel See description in Section 2.6, Histogram Window Overview. Displays the y-axis value of the cursor on the FFT display. • CANCEL Output See description in Section 2.6, Histogram Window Overview. • ZOOM See description in Section 2.6, Histogram Window Overview. 18 DS317DB2 CDB5521/22/23/24/28 2.9 Calibration Window Overview • The following controls and indicators are associated with the Calibration Menu (Figure 9). • • Gain Hexadecimal Icons Eight input/display icons that allow a user to set/clear the 24 bits in the eight gain registers via 6 hexadecimal nibbles. If the upper nibbles in the registers are zero’s, then leading zero nibbles need to be entered. • This is a control icon. When pressed the offset and gain registers are read. Then, the register content icons are updated. GAIN DECODE Eight display boxes that displays the decoded meaning of each gain register. Offset Hexadecimal Icons 2.10 Trouble Shooting the Evaluation Board This section describes special test modes incorporated in the microcontroller software to diagnose hardware problems with the evaluation board. Note: • Self-Gain Used to perform a self-gain calibration using the chosen Setup. • • Self-Offset Shift Gain Register Sixteen input icons used to shift the contents on the gain registers either 1 bit left or right. Once shifted the data at the respective gain registers ends is lost. • System-Gain Used to perform a system-gain calibration using the chosen Setup. • System-Offset Used to perform a system-offset calibration using the chosen Setup. DS317DB2 Test Mode 0, Normal Mode Test Mode 1, Loop Back Test This test mode checks the microcontroller’s onchip UART. To enter this mode, set test switches to 001, set HDR7 for loop back, and then reset the board. If the communication works, all the LED's toggle. Otherwise, only 1/2 of the LED’s toggle to indicate a communication problem. Used to perform a self-offset calibration using the chosen Setup. • To enter these modes, set the test switches to the appropriate position and reset the evaluation board. To re-enter the normal operation mode, set the switches back to binary zero and reset the board again. This is the default mode of operation. To enter this mode, set the test switches to 000 and reset the board. The evaluation board allows normal read/writes to the ADC’s registers. All the LED’s toggle on then off after reset, and then only when communicating with the PC. Eight input/display icons that allow a user to set/clear the 24 bits in the eight offset registers via 6 hexadecimal nibbles. If the upper nibbles in the registers are zero’s, then leading zero nibbles need to be entered. • Update Icons • Test Mode 2, Read/Write to ADC This test mode tests the microcontroller’s ability to read and write to the ADC. To enter this mode, set the switches to 010 and reset the board. In this test mode, the ADC’s configuration, offset, and gain registers are written to and then read from. If the correct data is read back, all the LED's toggle. Otherwise, only half of them toggle to indicate an error. 19 CDB5521/22/23/24/28 • • Test Mode 3, Continuously Acquire Single Conversion 2) test the RS-232 link between the PC and the microcontroller. This test mode repetitively acquires a single conversion. To enter this mode, set the test switches to 011 and press reset. A binary three is indicated on the LED’s. By probing HDR6 and using CS as a triggering pin, an oscilloscope or logic analyzer will display in real-time how the microcontroller reads conversion data. HDR7 distinguishes these two subtests. Set HDR7 to Normal to test the complete communication link. Or set HDR7 to Loop Back to test the link between the RS-232 Circuitry and the PC. Then, set the test switches to 110 and reset the evaluation board. The LED’s should indicate a binary six signifying that the hardware is ready to initiate the test. To complete the test, the user must initialize the PC. First, use the SETUP menu to select a communications port and then select the TESTRS232 option. From there, user prompts navigate the user through the test. The PC indicates if the test passes or fails. Once either test is complete, the LED’s toggle to indicate that the test mode is complete. Test Mode 4 Reserved for future modifications. • Test Mode 5, Continuously Read Gain Register This test mode repetitively acquires the gain registers default contents (0x800000 HEX). To enter this mode, set the test switches to 101 and press reset. The LED’s should indicate a binary five. By probing HDR6 and using CS as a triggering pin, an oscilloscope or logic analyzer will display in real-time how the microcontroller acquires a conversion. • Test Mode 6, PC to Microcontroller RS-232 Communication Link Test This test mode tests the ability of the PC to communicate to the evaluation board. It consists of two subtests: • Test Mode 7, Toggle LED’s This test mode tests the evaluation board LED’s. To enter this mode, set the test switches to 111 and reset the board. If the mode passes, the LED’s toggle. Note: Remember, to return to the normal operating mode, set the test switches to binary zero, return HDR7 to Normal, and reset the evaluation board. 1) test the link between the PC and the RS-232 interface circuitry; and 20 DS317DB2 CDB5521/22/23/24/28 Figure 5. Main Menu Figure 6. Setup Window DS317DB2 21 CDB5521/22/23/24/28 Figure 7. Data FIFO Window Figure 8. Frequency Domain Analysis 22 DS317DB2 CDB5521/22/23/24/28 Figure 9. Calibration Menu Figure 10. Time Domain Analysis DS317DB2 23 CDB5521/22/23/24/28 Figure 11. Histogram Analysis (Using the CS5524 with default register settings and 24-bit output words) 24 DS317DB2 CDB5521/22/23/24/28 Figure 12. CDB5521/22/23/24/28 Component Side Silkscreen DS317DB2 25 CDB5521/22/23/24/28 Figure 13. CDB5521/22/23/24/28 Component Side (top) 26 DS317DB2 CDB5521/22/23/24/28 Figure 14. CDB5521/22/23/24/28 Solder Side (bottom) DS317DB2 27