IRF AUIRF7665S2TR Directfet power mosfet Datasheet

PD - 96286
AUTOMOTIVE GRADE
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Advanced Process Technology
Optimized for Class D Audio Amplifier Applications
Low Rds(on) for Improved Efficiency
Low Qg for Better THD and Improved Efficiency
Low Qrr for Better THD and Lower EMI
Low Parasitic Inductance for Reduced Ringing and Lower EMI
Delivers up to 100W per Channel into 8Ω with No Heatsink
Dual Sided Cooling
175°C Operating Temperature
Repetitive Avalanche Capability for Robustness and Reliability
Lead free, RoHS and Halogen free
SC
M2
DirectFET™ Power MOSFET ‚
V(BR)DSS
100V
RDS(on) typ.
51mΩ
max.
62mΩ
RG (typical)
3.5Ω
Qg (typical)
8.3nC
DirectFET™ ISOMETRIC
SB
Applicable DirectFET Outline and Substrate Outline 
SB
AUIRF7665S2TR
AUIRF7665S2TR1
M4
L4
L6
L8
Description
The AUIRF7665S2TR/TR1 combines the latest Automotive HEXFET® Power MOSFET Silicon technology with the advanced DirectFET
packaging platform to produce a best in class part for Automotive Class D audio amplifier applications. The DirectFET package is compatible
with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering
techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package
allows dual sided cooling to maximize thermal transfer in automotive power systems.
This HEXFET Power MOSFET optimizes gate charge, body diode reverse recovery and internal gate resistance to improve key Class D
audio amplifier performance factors such as efficiency, THD and EMI. Moreover the DirectFET packaging platform offers low parasitic
inductance and resistance when compared to conventional wire bonded SOIC packages which improves EMI performance by reducing the
voltage ringing that accompanies current transients.
These features combine to make this MOSFET a highly desirable component in Automotive Class D audio amplifier systems.
Absolute Maximum Ratings
Parameter
Max.
VDS
Drain-to-Source Voltage
100
VGS
Gate-to-Source Voltage
± 20
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TA = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)f
Power Dissipation
PD @TA = 25°C
EAS
EAS(tested)
TJ
Power Dissipation
Single Pulse Avalanche Energy (Thermally Limited)
Single Pulse Avalanche Energy (Tested Value)
Avalanche Current
Repetitive Avalanche Energy
Peak Soldering Temperature
Operating Junction and
TSTG
Storage Temperature Range
RθJA
Junction-to-Ambient
RθJA
Junction-to-Ambient
RθJA
Junction-to-Ambient
RθJ-Can
Junction-to-Can
RθJ-PCB
Junction-to-PCB Mounted
f
e
A
4.1
Continuous Drain Current, VGS @ 10V (Package Limited)
PD @TC = 25°C
IAR
EAR
TP
10.2
Continuous Drain Current, VGS @ 10V (Silicon Limited)e
Pulsed Drain Current
V
14.4
Continuous Drain Current, VGS @ 10V (Silicon Limited)f
ID @ TC = 25°C
IDM
Units
77
58
f
30
h
g
g
W
2.4
37
56
h
mJ
See Fig. 18a,18b,16,17
270
-55 to + 175
A
mJ
°C
Thermal Resistance
Parameter
fl
e
j
k
f
Linear Derating Factor
HEXFET® is a registered trademark of International Rectifier.
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Typ.
Max.
–––
63
12.5
–––
20
–––
–––
5.0
1.4
Units
°C/W
–––
0.2
W/°C
1
01/05/10
AUIRF7665S2TR/TR1
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Conditions
Min.
Typ.
Max.
Units
V(BR)DSS
Drain-to-Source Breakdown Voltage
100
–––
–––
V
∆V(BR)DSS/∆TJ
RDS(on)
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
–––
–––
0.10
51
–––
62
VGS(th)
Gate Threshold Voltage
Gate Threshold Voltage Coefficient
3.0
–––
4.0
-13
5.0
–––
Forward Transconductance
8.8
–––
–––
Internal Gate Resistance
Drain-to-Source Leakage Current
–––
–––
3.5
–––
5.0
20
Ω
µA
VDS = 100V, VGS = 0V
Gate-to-Source Forward Leakage
–––
–––
–––
–––
250
100
nA
VDS = 80V, VGS = 0V, TJ = 125°C
VGS = 20V
Gate-to-Source Reverse Leakage
–––
–––
-100
∆VGS(th)/∆TJ
gfs
RG(int)
IDSS
IGSS
VGS = 0V, ID = 250µA
Reference to 25°C, ID = 1mA
VGS = 10V, ID = 8.9A
mΩ
V
VDS = VGS, ID = 25µA
mV/°C
VDS = 25V, ID = 8.9A
S
V/°C
i
VGS = -20V
Dynamic @ TJ = 25°C (unless otherwise specified)
Parameter
Conditions
Min.
Typ.
Max.
Total Gate Charge
–––
8.3
13
VDS = 50V
Qgs1
Pre-Vth Gate-to-Source Charge
–––
1.9
–––
VGS = 10V
Qgs2
Qgd
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
–––
–––
0.77
3.2
–––
–––
Qgodr
Qsw
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
–––
–––
2.4
4.0
–––
–––
Qoss
td(on)
Output Charge
Turn-On Delay Time
–––
–––
4.7
3.8
–––
–––
tr
td(off)
Rise Time
Turn-Off Delay Time
–––
–––
6.4
7.1
–––
–––
tf
Fall Time
–––
3.6
Ciss
Coss
Input Capacitance
Output Capacitance
–––
–––
515
110
Crss
Coss
Reverse Transfer Capacitance
Output Capacitance
–––
–––
30
530
–––
–––
Coss
Coss eff.
Output Capacitance
Effective Output Capacitance
–––
–––
70
115
–––
–––
Min.
Typ.
Max.
Qg
Units
nC
ID = 8.9A
See Fig. 11
nC
VDS = 16V, VGS = 0V
VDD = 50V
ns
–––
RG = 6.8Ω
VGS = 10V
–––
–––
VGS = 0V
VDS = 25V
ID = 8.9A
pF
i
ƒ = 1.0MHz
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 80V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 80V
Diode Characteristics
Parameter
IS
Continuous Source Current
ISM
(Body Diode)
Pulsed Source Current
VSD
trr
Qrr
g
–––
–––
14.4
Units
A
(Body Diode)
Diode Forward Voltage
–––
–––
58
–––
–––
1.3
V
Reverse Recovery Time
Reverse Recovery Charge
–––
–––
33
38
–––
–––
ns
nC
ƒ Surface mounted on 1 in. square Cu
(still air).
‰ Mounted to a PCB with small
clip heatsink (still air)
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 8.9A, VGS = 0V
TJ = 25°C, IF = 8.9A, VDD = 25V
di/dt = 100A/µs
i
i
‰ Mounted on minimum footprint full size
board with metalized back and with small
clip heatsink (still air)
Notes  through Š are on page 11
2
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AUIRF7665S2TR/TR1
Qualification Information†
Automotive
(per AEC-Q101)
Qualification Level
††
Comments: This part number(s) passed Automotive qualification.
IR’s Industrial and Consumer qualification level is granted by
extension of the higher Automotive level.
Moisture Sensitivity Level
Machine Model
DFET2
MSL1
Class B
AEC-Q101-002
ESD
Human Body Model
Class 2
AEC-Q101-001
Charged Device Model
Class IV
AEC-Q101-005
RoHS Compliant
†
Qualification standards can be found at International Rectifier’s web site:
Yes
http://www.irf.com
†† Exceptions to AEC-Q101 requirements are noted in the qualification report.
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3
AUIRF7665S2TR/TR1
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
10
1
100
VGS
15V
10V
8.0V
7.0V
6.5V
6.0V
5.5V
5.0V
TOP
0.1
0.01
5.0V
10
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.5V
6.0V
5.5V
5.0V
1
5.0V
≤60µs PULSE WIDTH
≤60µs PULSE WIDTH
Tj = 175°C
Tj = 25°C
0.001
0.1
1
10
0.1
100
0.1
V DS, Drain-to-Source Voltage (V)
RDS(on), Drain-to -Source On Resistance ( mΩ)
RDS(on), Drain-to -Source On Resistance (m Ω)
ID = 8.9A
120
100
T J = 125°C
80
T J = 25°C
40
7
8
9
10
11
12
13
14
320
Vgs = 10V
280
240
200
120
15
T J = 25°C
80
40
0
10
20
30
40
ID, Drain Current (A)
VGS, Gate -to -Source Voltage (V)
Fig 4. Typical On-Resistance vs. Drain Current
100
2.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
T J = 125°C
160
Fig 3. Typical On-Resistance vs. Gate Voltage
10
1
T J = -40°C
TJ = 25°C
TJ = 175°C
0.1
VDS = 25V
≤60µs PULSE WIDTH
0.01
ID = 8.9A
VGS = 10V
2.0
1.5
1.0
0.5
2
4
6
8
10
12
14
VGS, Gate-to-Source Voltage (V)
Fig 5. Typical Transfer Characteristics
4
100
Fig 2. Typical Output Characteristics
140
6
10
V DS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
60
1
16
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
Fig 6. Normalized On-Resistance vs. Temperature
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AUIRF7665S2TR/TR1
T J = -40°C
TJ = 25°C
TJ = 175°C
6.5
ISD, Reverse Drain Current (A)
VGS(th) , Gate threshold Voltage (V)
100
5.5
4.5
3.5
ID = 25µA
ID = 250µA
ID = 1.0mA
D = 1.0A
2.5
10
1
0.1
VGS = 0V
0.01
1.5
-75 -50 -25
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
25 50 75 100 125 150 175
VSD, Source-to-Drain Voltage (V)
T J , Temperature ( °C )
Fig 7. Typical Threshold Voltage vs. Junction Temperature
Fig 8. Typical Source-Drain Diode Forward Voltage
10000
18
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
T J = 25°C
16
C oss = C ds + C gd
14
C, Capacitance (pF)
Gfs, Forward Transconductance (S)
20
12
10
T J = 175°C
8
6
4
1000
Ciss
Coss
100
Crss
V DS = 10V
2
380µs PULSE WIDTH
0
10
0
2
4
6
8
10
12
14
16
18
1
ID,Drain-to-Source Current (A)
100
Fig 10. Typical Capacitance vs.Drain-to-Source Voltage
Fig 9. Typical Forward Transconductance Vs. Drain Current
14.0
16
ID= 8.9A
12.0
14
VDS= 80V
VDS= 50V
10.0
ID, Drain Current (A)
VGS, Gate-to-Source Voltage (V)
10
VDS, Drain-to-Source Voltage (V)
VDS= 20V
8.0
6.0
4.0
2.0
12
10
8
6
4
2
0.0
0
0
2
4
6
8
10
12
25
50
75
100
125
150
175
QG, Total Gate Charge (nC)
T C , Case Temperature (°C)
Fig.11 Typical Gate Charge vs.Gate-to-Source Voltage
Fig 12. Maximum Drain Current vs. Case Temperature
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5
AUIRF7665S2TR/TR1
EAS , Single Pulse Avalanche Energy (mJ)
160
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
10
100µsec
1msec
10msec
1
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
DC
ID
1.64A
3.04A
BOTTOM 8.90A
140
TOP
120
100
80
60
40
20
0.01
0
0
1
10
100
1000
25
VDS, Drain-to-Source Voltage (V)
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 13. Maximum Safe Operating Area
Fig 14. Maximum Avalanche Energy vs. Temperature
Thermal Response ( Z thJC ) °C/W
10
D = 0.50
1
0.20
0.10
0.05
0.02
0.01
0.1
τJ
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
R1
R1
τJ
τ1
R2
R2
R3
R3
Ri (°C/W)
R4
R4
τC
τ1
τ2
τ2
τ3
τ3
Ci= τi/Ri
Ci i/Ri
0.0001
τ4
τ4
τ
τi (sec)
0.49687
0.000119
0.00517
8.231486
2.55852
0.018926
1.94004
0.002741
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 15. Maximum Effective Transient Thermal Impedance, Junction-to-Case
100
Duty Cycle = Single Pulse
Avalanche Current (A)
ID, Drain-to-Source Current (A)
1000
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Tj = 150°C and
Tstart =25°C (Single Pulse)
10
0.01
0.05
1
0.10
0.1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Τ j = 25°C and
Tstart = 150°C.
0.01
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 16. Typical Avalanche Current Vs.Pulsewidth
6
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AUIRF7665S2TR/TR1
40
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 8.9A
EAR , Avalanche Energy (mJ)
35
30
25
20
15
10
5
0
25
50
75
100
125
150
175
Notes on Repetitive Avalanche Curves , Figures 16, 17:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 18a, 18b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 16, 17).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
Starting T J , Junction Temperature (°C)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Fig 17. Maximum Avalanche Energy Vs. Temperature
V(BR)DSS
15V
tp
DRIVER
L
VDS
D.U.T
RG
VGS
20V
+
- VDD
IAS
tp
A
0.01Ω
I AS
Fig 18a. Unclamped Inductive Test Circuit
Fig 18b. Unclamped Inductive Waveforms
Id
Vds
L
VCC
DUT
0
20K
1K
Vgs
S
Vgs(th)
Fig 19a. Gate Charge Test Circuit
VDS
VGS
RG
Qgodr
RD
Qgd
Qgs2 Qgs1
Fig 19b. Gate Charge Waveform
D.U.T.
VDS
+
-
V DD
90%
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
10%
VGS
td(on)
Fig 20a. Switching Time Test Circuit
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tr
t d(off)
tf
Fig 20b. Switching Time Waveforms
7
AUIRF7665S2TR/TR1
Automotive DirectFET™ Board Footprint, SB (Small Size Can).
Please see AN-1035 for DirectFET assembly details and stencil and substrate design recommendations
CL
G = GATE
D = DRAIN
S = SOURCE
D
D
G
D
8
S
D
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AUIRF7665S2TR/TR1
Automotive DirectFET™ Outline Dimension, SB Outline (Small Size Can).
Please see AN-1035 for DirectFET assembly details and stencil and substrate design recommendations
Automotive DirectFET™ Part Marking
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9
AUIRF7665S2TR/TR1
Automotive DirectFET™ Tape & Reel Dimension (Showing component orientation).
10
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AUIRF7665S2TR/TR1
Notes:
 Click on this section to link to the appropriate technical paper.
‚ Click on this section to link to the DirectFET Website.
ƒ Surface mounted on 1 in. square Cu board, steady state.
„ TC measured with thermocouple mounted to top (Drain) of part.
† Starting TJ = 25°C, L = 0.944mH, RG = 25Ω, IAS = 8.9A.
‡ Pulse width ≤ 400µs; duty cycle ≤ 2%.
ˆ Used double sided cooling, mounting pad with large heatsink.
‰ Mounted on minimum footprint full size board with metalized
back and with small clip heatsink.
Repetitive rating; pulse width limited by max. junction temperature. Š Rθ is measured at TJ of approximately 90°C.
IMPORTANT NOTICE
Unless specifically designated for the automotive market, International Rectifier Corporation and its subsidiaries (IR) reserve the
right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time
and to discontinue any product or services without notice. Part numbers designated with the “AU” prefix follow automotive industry
and / or customer specific requirements with regards to product discontinuance and process change notification. All products are
sold subject to IR’s terms and conditions of sale supplied at the time of order acknowledgment.
IR warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with IR’s standard
warranty. Testing and other quality control techniques are used to the extent IR deems necessary to support this warranty. Except
where mandated by government requirements, testing of all parameters of each product is not necessarily performed.
IR assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using IR components. To minimize the risks with customer products and applications, customers should provide adequate design and operating safeguards.
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voids all express and any implied warranties for the associated IR product or service and is an unfair and deceptive business
practice. IR is not responsible or liable for any such statements.
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or in other applications intended to support or sustain life, or in any other application in which the failure of the IR product could
create a situation where personal injury or death may occur. Should Buyer purchase or use IR products for any such unintended or
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