Bourns CAT16-LV4F12LF Concave chip array Datasheet

PL
IA
NT
Features
oH
S
CO
M
■
*R
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HIGH PERFORMANCE TERMINATION
NETWORK
Miniaturized circuitry and packaging
for space reduction
Designed for gigabit communication
networks
■
■
Controlled impedance
RoHS compliant*
CAT16-LV4F12LF - Concave Chip Array
Electrical Characteristics
Product Dimensions
Resistance
R1 .............................................165 ohms
R2 .............................................140 ohms
Tolerance ............................................±1 %
TCR........................................±200 ppm/ ˚C
Temperature Range .........-55 ˚C to +125 ˚C
Max. Operating Voltage ....................5 VDC
Max. Power Resistance ................ .0625 W
Solderability .....................>95 % Coverage
For Standard Values Used in Capacitors,
Inductors, and Resistors, click here.
.45 ± .10
(.018 ± .004)
.60 ± .10
(.024 ± .004)
16
15
14
13
12
11
10
9
.30 ± .10 DIA.
(.012 ± .004)
.40 ± .10
(.016 ± .004)
1.60 ± .15
(.063 ± .060)
.80 ± .10
(.031 ± .004)
1
DIMENSIONS ARE:
2
3
6.40 ± .15
(.253 ± .006)
4
5
.40 ± .10
(.016 ± .004)
6
7
8
MM
(INCHES)
Packaging Specifications
4000 pcs - per 7 " reel
4.0 ± .10
(.157 ± .004)
2.00 ± 0.20
(.079 ± .008)
0.9 ± 0.1
(.035 ± .004)
6.9 ± 0.2
(.272 ± .008)
13 ± 0.5
DIA.
(.512 ± .020)
5.5 ± 0.1
(.217 ± .004)
4.0 ±.10
(.158 ±.004)
1.5 +.10/-0
(.060 +.004/-0)
60.0 ± 1.0
DIA.
(2.36 ± .039)
12.0 ± 0.2
(.472 ± .008)
178.0 ± 2.0
(7.008 ± .080)
21 ± 0.5
(.827 ± .020)
1.75 ± .10
(.069 ± .004)
12.5 ± 2
(.492 ± .079)
10.0 ± 1.5
(.394 ± .059)
Land Pattern
Derating Curve
Rated power in percentage (%)
2.0 ± .05
(.079 ± .002)
Solder resist
100
Land
0.7 to 0.9
(.028 to .035)
80
60
Chip resistor array CAT
40
20
0
-55
0
125
70
2.0 to 2.2
(.079 to .087)
(°C) Ambient temperature
0.4 to 0.45
(.016 to .0178)
0.80
(.032)
Schematic
16
15
14
R2
R1
1
13
12
R2
R1
R1
2
10
R2
R1
3
11
R1
4
R2
R1
5
9
R1
6
R1
7
8
REV. 11/06
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex.
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
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