REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R120-92. 92-01-27 Michael A. Frye B Drawing updated to reflect current requirements. - lgt 01-12-17 Raymond Monnin C Redrawn. Update paragraphs to MIL-PRF-38535 requirements. - drw 13-09-20 Charles F. Saffle THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV SHEET REV STATUS REV C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Rick C. Officer STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http://www.landandmaritime.dla.mil CHECKED BY Charles E. Besore APPROVED BY THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A Michael A. Frye DRAWING APPROVAL DATE MICROCIRCUIT, LIINEAR, DUAL, CMOS, 12-BIT, D/A CONVERTER, MONOLITHIC SILICON 89-12-28 REVISION LEVEL C SIZE CAGE CODE A 67268 SHEET DSCC FORM 2233 APR 97 5962-89657 1 OF 11 5962-E575-13 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89657 01 L A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device types. The device types identify the circuit function as follows: Device type Generic number 01 02 03 7547S 7547T 7547U Circuit function Gain error Dual, CMOS, 12-bit D/A converter Dual, CMOS, 12-bit D/A converter Dual, CMOS, 12-bit D/A converter ±6.0 LSB ±3.0 LSB ±2.0 LSB 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 as follows: Outline letter L 3 Descriptive designator GDIP3-T24 or CDIP4-T24 CQCC1-N28 Terminals Package style 24 28 Dual-in-line Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. VDD to DGND ......................................................................................... VREFA, VREFB, to AGND .......................................................................... VRFBA, VRFBB, to AGND .......................................................................... Digital input voltage to DGND ............................................................... Voltage at IOUTA, IOUTB to DGND ............................................................ AGND to DGND .................................................................................... Storage temperature range ................................................................... Lead temperature (soldering, 10 seconds)............................................ Power dissipation (PD) .......................................................................... Thermal resistance, junction to case (θJC)............................................. Thermal resistance, junction to ambient (θJA) ....................................... Junction temperature (TJ)...................................................................... 0.3 V dc to +17 V dc ±25 V dc ±25 V dc 0.3 V dc to VDD +0.3 V -0.3 V dc to VDD +0.3 V -0.3 V dc to VDD +0.3 V -65°C to +150°C +300°C 450 mW 1/ See MIL-STD-1835 120°C C/W +175°C 1.4 Recommended operating conditions. Supply voltage range (VDD) ................................................................... Minimum high level input voltage .......................................................... Maximum low level input voltage........................................................... Ambient operating temperature range (TA) ........................................... Voltage at VREFA, VREFB ......................................................................... Voltage at AGND, IOUTA ......................................................................... Voltage at AGND, IOUTB ......................................................................... 10.8 V dc to 16.5 V dc 2.4 V dc 0.8 V dc -55°C to +125°C 10 V dc 0 V dc 0 V dc ______ 1/ Derate above TA = +75°C at 6.0 mW/°C. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-89657 A REVISION LEVEL C SHEET 2 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at http://quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for nonJAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-89657 A REVISION LEVEL C SHEET 3 TABLE I. Electrical performance characteristics. Test Resolution Symbol 2/ RES RA Relative accuracy Conditions 1/ -55°C ≤ TA ≤+125°C unless otherwise specified Group A subgroups Device type Guaranteed minimum resolution 1, 2, 3 All VDD = 10.8 V and 16.5 V 1, 2, 3 01 ±1.0 1 02, 03 ±1.0 Gain error 2/ Power supply rejection ratio, VREFB to IOUTB LSB 1, 2, 3 All ±1.0 LSB AE Measured using RFBA and RFBB. Both DAC registers loaded with all 1’s, VDD = 10.8 V. 1, 2, 3 01 ±6.0 LSB 1 02 ±3.0 03 ±2.0 02 ±3.0 03 ±2.0 4 All ±5.0 ppm/°C 1 All ±0.01 %/% ∆AE ∆T PSRR VDD = 10.8 V and 16.5 V IOUTA ±0.02 2, 3 DAC A loaded with all 0’s, VDD = 16.5 V 1 All IOUTB DAC B loaded with all 0’s, VDD = 16.5 V 1 All 9 IOUT load = 100Ω, CEXT = 13 pF, DAC output measured from falling edge nA ±10 nA ±250 2, 3 tSL ±10 ±250 2, 3 Output current settling 2/ time to 0.01% of FSR Bits Guaranteed monotonic to 12-bits , VDD = 10.8 V and 16.5 V VDD = 10.8 V Output leakage current Max DNL 2, 3, 12 Gain temperature coefficient Min 12 Unit ±0.5 2, 3, 12 Differential nonlinearity Limits All µs 1.5 of WR 10, 11 Feedthrough error, 2/ VREFA to IOUTA or VREFB to IOUTB FT VREFA = VREFB = ±20 Vpp, 10 kHz sine wave, DAC register loaded with all 0’s 4 1.5 All 5, 6 -65 dB -65 See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-89657 A REVISION LEVEL C SHEET 4 TABLE I. Electrical performance characteristics – continued. Test Symbol Reference input resistance Reference input resistance match (VREFA/VREFB) Conditions 1/ -55°C ≤ TA ≤+125°C unless otherwise specified Group A subgroups Device type Limits Max 20 kΩ 01, 02 ±3.0 % 03 ±3.0 RIN VDD = 10.8 V 1, 2, 3 All RMIN VDD = 10.8 V 1, 2, 3 1 Min 9.0 Unit ±1.0 2, 3 Digital input high voltage VIH VDD = 10.8 V and 16.5 V 1, 2, 3 All Digital input low voltage VIL VDD = 10.8 V and 16.5 V 1, 2, 3 All 0.8 V Input current IIN VIN = VDD = 16.5 V 1 All 1.0 µA 2.4 2, 3 Digital input capacitance 2/ Output capacitance 2/ CIN COUTA 10 TA = +25°C 4 All 10 pF DAC A = all 0’s, TA = +25°C 4 All 70 pF DAC A = all 1’s, TA = +25°C Output capacitance 2/ COUTB 140 DAC B = all 0’s, TA = +25°C 4 All 70 DAC B = all 1’s, TA = +25°C Functional test Data setup time See figure 3 7 All 9 All 10, 11 2/ Data hold time tDH See figure 3 9 tCWS See figure 3 All Chip select or update to write hold time tCWH See figure 3 Write pulse width tWR See figure 3 Supply current IDD VDD = 16.5 V 9 10, 11 2/ All 80 ns ns 100 All 2/ If not tested, shall be guaranteed to the limits specified in table I herein. DSCC FORM 2234 APR 97 ns 0 VDD = 10.8 V to 16.5 V, unless otherwise specified. VREFA = VREFB = 10 V, voltage at AGND = 0 V, voltage at IOUTA = IOUTB = 0 V. DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 80 0 1/ STANDARD MICROCIRCUIT DRAWING ns 100 10, 11 2/ 1, 2, 3 25 All 10, 11 2/ 9 ns 25 All 9 60 80 10, 11 2/ Chip select or update to write setup time pf 140 See 4.3.1c tDS V 2.0 mA SIZE 5962-89657 A REVISION LEVEL C SHEET 5 Device type 01, 02, 03 02 Case outline L 3 Terminal number Terminal symbol Terminal symbol 1 AGND NC 2 IOUTA AGND 3 RFBA IOUTA 4 VREFA RFBA 5 CSA VREFA 6 DB0(LSB) CSA 7 DB1 DB0(LSB) 8 DB2 NC 9 DB3 DB1 10 DB4 DB2 11 DB5 DB3 12 DGND DB4 13 DB6 DB5 14 DB7 DGND 15 DB8 NC 16 DB9 DB6 17 DB10 DB7 18 DB11(MSB) DB8 19 WR DB9 20 CSB DB10 21 VDD DB11(MSB) 22 VREFB NC 23 RFBB WR 24 IOUTB CSB 25 ------ VDD 26 ------ VREFB 27 ------ RFBB 28 ------ IOUTB FIGURE 1. Terminal connections. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-89657 A REVISION LEVEL C SHEET 6 Function CSA CSB WR X X 1 No data transfer 1 1 X No data transfer 0 A rising edge on CSA or CSB loads data to the respective DAC from data bus 0 1 DACA register loaded from data bus 1 0 DACB register loaded from data bus 0 0 DACA and DACB register loaded from data bus 0 = Logic low level 1 = Logic high level X = Irrelevant = Rising edge triggered FIGURE 2. Truth table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-89657 A REVISION LEVEL C SHEET 7 Notes All input signal rise and fall times are measured from 10% to 90% of +5.0 V, tr = tf = 20 ns. 1. VIH + VIL Timing measurement reference level is 2. 2 FIGURE 3. Timing diagram. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-89657 A REVISION LEVEL C SHEET 8 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a "Q" or "QML" certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA = +125°C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. c. Subgroup 12 test is used for grading and part selection at +25°C and is not included in PDA calculations. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-89657 A REVISION LEVEL C SHEET 9 TABLE II. Electrical test requirements. MIL-STD-883 test requirements Interim electrical parameters (method 5004) Final electrical test parameters (method 5004) Group A test requirements (method 5005) Groups C and D end-point electrical parameters (method 5005) Subgroups (in accordance with MIL-STD-883, method 5005, table I) --1*, 2, 3, 7, 12 1, 2, 3, 4**, 5**, 6**, 7, 9, 10**, 11**, 12** 1 * PDA applies to subgroup 1. **Subgroups 10 and 11, if not tested, shall be guaranteed to the limits specified in table I herein. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroup 8 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroups 7 shall include verification of the truth table. d. Subgroup 12 test is used for grading and part selection at +25°C. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. (2) TA = +125°C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-89657 A REVISION LEVEL C SHEET 10 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractorprepared specification or drawing. 6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.4 Record of users. Military and industrial users shall inform DLA Land and Maritime when a system application requires configuration control and the applicable SMD to that system. DLA Land and Maritime will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices (FSC 5962) should contact DLA Land and Maritime-VA, telephone (614) 692-8108. 6.5 Comments. Comments on this drawing should be directed to DLA Land and Maritime-VA, Columbus, Ohio 43218-3990, or telephone (614) 692-0540. 6.6 Approved sources of supply. Approved sources of supply are listed in MIL-HDBK-103 and QML-38535. The vendors listed in MIL-HDBK-103 and QML-38535 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DLA Land and Maritime-VA. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-89657 A REVISION LEVEL C SHEET 11 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 13-09-20 Approved sources of supply for SMD 5962-89657 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DLA Land and Maritime-VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DLA Land and Maritime maintains an online database of all current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/. Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 2/ 5962-8965701LA 1ES66 MX7547SQ/883B 5962-8965702LA 1ES66 MX7547TQ/883B 24355 AD7547TQ/883B 5962-89657023A 24355 AD7547TE/883B 5962-8965703LA 1ES66 MX7547UQ/883B 24355 AD7547UQ/883B 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. Vendor CAGE number Vendor name and address 1ES66 Maxim Integrated 160 Rio Robles San Jose, CA 95134 24355 Analog Devices Rt 1 Industrial Park PO Box 9106 Norwood, MA 02062 Point of contact: Raheen Business Park Limerick, Ireland The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.