Dallas DS1258W-150-IND 3.3v 128k x 16 nonvolatile Datasheet

DS1258W
3.3V 128k x 16 Nonvolatile
SRAM
www.maxim-ic.com
FEATURES
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PIN ASSIGNMENT
10-Year Minimum Data Retention in the
Absence of External Power
Data is Automatically Protected During a
Power Loss
Separate Upper Byte and Lower Byte Chip
Select Inputs
Unlimited Write Cycles
Low-Power CMOS
Read and Write Access Times as Fast as
100ns
Lithium Energy Source is Electrically
Disconnected to Retain Freshness Until
Power is Applied for the First Time
Optional Industrial Temperature Range of
-40°C to +85°C, Designated IND
CEU
CEL
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
GND
40
39
38
37
36
35
34
33
32
31
30
29
VCC
WE
A16
A15
A14
A13
A12
A11
A10
A9
GND
DQ7
1
2
3
4
5
6
7
8
9
10
11
12
DQ6
13
28
A7
DQ5
DQ4
14
27
15
A6
A5
DQ3
16
26
25
DQ2
17
24
A3
DQ1
DQ0
18
23
19
A2
A1
OE
20
22
21
A8
A4
A0
40-Pin Encapsulated Package
740mil Extended
PIN DESCRIPTION
A0 - A16
DQ0 - DQ15
CEU
CEL
WE
OE
VCC
GND
- Address Inputs
- Data In/Data Out
- Chip Enable Upper Byte
- Chip Enable Lower Byte
- Write Enable
- Output Enable
- Power (+3.3V)
- Ground
DESCRIPTION
The DS1258W 3.3V 128k x 16 Nonvolatile SRAM is a 2,097,152-bit, fully static, nonvolatile (NV)
SRAM, organized as 131,072 words by 16 bits. Each NV SRAM has a self-contained lithium energy
source and control circuitry, which constantly monitors VCC for an out-of-tolerance condition. When such
a condition occurs, the lithium energy source is automatically switched on and write protection is
unconditionally enabled to prevent data corruption. DIP-package DS1258W devices can be used in place
of solutions which build nonvolatile 128k x 16 memory by utilizing a variety of discrete components.
There is no limit on the number of write cycles that can be executed and no additional support circuitry is
required for microprocessor interfacing.
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052902
DS1258W
READ MODE
The DS1258W executes a read cycle whenever WE (Write Enable) is inactive (high) and either/both of
CEU or CEL (Chip Enables) are active (low) and OE (Output Enable)is active (low). The unique address
specified by the 17 address inputs (A0-A16) defines which of the 131,072 words of data is accessed. The
status of CEU and CEL determines whether all or part of the addressed word is accessed. If CEU is active
with CEL inactive, then only the upper byte of the addressed word is accessed. If CEU is inactive with
CEL active, then only the lower byte of the addressed word is accessed. If both the CEU and CEL inputs
are active (low), then the entire 16-bit word is accessed. Valid data will be available to the 16 data output
drivers within tACC (Access Time) after the last address input signal is stable, providing that CEU , CEL
and OE access times are also satisfied. If CEU , CEL , and OE access times are not satisfied, then data
access must be measured from the later-occurring signal, and the limiting parameter is either tCO for CEU ,
CEL , or tOE for OE rather than address access.
WRITE MODE
The DS1258W executes a write cycle whenever WE and either/both of CEU or CEL are active (low)
after address inputs are stable. The unique address specified by the 17 address inputs (A0-A16) defines
which of the 131,072 words of data is accessed. The status of CEU and CEL determines whether all or
part of the addressed word is accessed. If CEU is active with CEL inactive, then only the upper byte of
the addressed word is accessed. If CEU is inactive with CEL active, then only the lower byte of the
addressed word is accessed. If both the CEU and CEL inputs are active (low), then the entire 16-bit word
is accessed. The write cycle is terminated by the earlier rising edge of CEU and/or CEL , or WE . All
address inputs must be kept valid throughout the write cycle. WE must return to the high state for a
minimum recovery time (tWR) before another cycle can be initiated. The OE control signal should be kept
inactive (high) during write cycles to avoid bus contention. However, if the output drivers are enabled
( CEU and/or CEL , and OE active) then WE will disable the outputs in tODW from its falling edge.
READ/WRITE FUNCTION Table 1
OE
WE
CEL
CEU
VCC
CURRENT
H
H
X
X
ICCO
L
H
L
L
L
H
L
H
L
H
H
L
High-Z
Output
X
L
L
L
Input
Input
X
L
L
H
Input
High-Z
X
L
H
L
High-Z
Input
X
X
H
H
High-Z
High-Z
ICCO
ICCO
ICCS
DQ0-DQ7
DQ8-DQ15
CYCLE
PERFORMED
High-Z
High-Z
Output Disabled
Output
Output
Output
High-Z
Read Cycle
Write Cycle
Output Disabled
DATA RETENTION MODE
The DS1258W provides full functional capability for VCC greater than 3.0V, and write-protects by 2.8V.
Data is maintained in the absence of VCC without any additional support circuitry. The nonvolatile static
RAMs constantly monitor VCC. Should the supply voltage decay, the NV SRAMs automatically writeprotect themselves, all inputs become “don’t care,” and all outputs become high impedance. As VCC falls
below approximately 2.5V, a power-switching circuit connects the lithium energy source to RAM to
retain data. During power-up, when VCC rises above approximately 2.5V, the power switching circuit
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DS1258W
connects external VCC to RAM and disconnects the lithium energy source. Normal RAM operation can
resume after VCC exceeds 3.0V.
FRESHNESS SEAL
Each DS1258W device is shipped from Dallas Semiconductor with its lithium energy source
disconnected, guaranteeing full energy capacity. When VCC is first applied at a level greater than 3.0V,
the lithium energy source is enabled for battery backup operation.
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DS1258W
ABSOLUTE MAXIMUM RATINGS*
Voltage on Any Pin Relative to Ground
Operating Temperature Range
Storage Temperature Range
Soldering Temperature
-0.3V to +4.6V
0°C to 70°C, -40°C to +85°C for Industrial Parts
-40°C to +70°C, -40°C to +85°C for Industrial Parts
See IPC/JEDEC J-STD-020A Specification
* This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operation sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
PARAMETER
(tA: See Note 10)
SYMBOL
MIN
TYP
MAX
UNITS
Power Supply Voltage
VCC
3.0
3.3
3.6
V
Logic 1
VIH
2.2
VCC
V
Logic 0
VIL
0.0
0.4
V
DC ELECTRICAL CHARACTERISTICS
PARAMETER
Input Leakage Current
(tA: See Note 10) (VCC = 3.3V ± 0.3V)
SYMBOL
IIL
MIN
-2.0
I/O Leakage Current CE ³ VIH £ VCC
IIO
-1.0
Output Current @ 2.2V
IOH
-1.0
mA
Output Current @ 0.4V
IOL
2.0
mA
TYP
MAX
+2.0
UNITS
+1.0
mA
ICCS1
100
450
mA
Standby Current CEU , CEL =VCC-0.2V
ICCS2
60
250
mA
Operating Current
ICCO1
100
mA
Write Protection Voltage
VTP
3.0
V
2.8
2.9
CAPACITANCE
NOTES
mA
Standby Current CEU , CEL =2.2V
PARAMETER
NOTES
(tA = +25°C)
SYMBOL
MIN
TYP
MAX
UNITS
Input Capacitance
CIN
20
25
pF
Input/Output Capacitance
CI/O
5
10
pF
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NOTES
DS1258W
(tA: See Note 10) (VCC = 3.3V ± 0.3V)
DC ELECTRICAL CHARACTERISTICS
PARAMETER
SYMBOL
DS1258W-100
DS1258W-150
MIN
MIN
MAX
100
MAX
150
UNITS
Read Cycle Time
tRC
Access Time
tACC
100
150
ns
ns
OE
to Output Valid
tOE
50
70
ns
CE
to Output Valid
tCO
100
150
ns
OE
or CE to Output Valid
tCOE
5
5
35
NOTES
35
ns
5
ns
5
Output High-Z from Deselection
tOD
Output Hold from Address
Change
tOH
5
5
ns
Write Cycle Time
tWC
100
150
ns
Write Pulse Width
tWP
75
100
ns
Address Setup Time
tAW
0
0
ns
Write Recovery Time
tWR1
tWR2
5
20
5
20
ns
ns
12
13
Output High Z from WE
tODW
ns
5
Output Active from WE
tOEW
5
5
ns
5
Data Setup Time
tDS
40
60
ns
4
Data Hold Time
tDH1
tDH2
0
20
0
20
ns
ns
12
13
35
READ CYCLE
SEE NOTE 1
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35
3
DS1258W
WRITE CYCLE 1
SEE NOTE 2, 3, 4, 6, 7, 8 AND 12
WRITE CYCLE 2
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DS1258W
POWER-DOWN/POWER-UP CONDITION
POWER-DOWN/POWER-UP TIMING
(tA: See Note 10)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
VCC Fail Detect to CE and WE Inactive
tPD
1.5
ms
11
VCC slew from VTP to 0V
tF
150
ms
VCC slew from 0V to VTP
tR
150
ms
VCC Valid to CE and WE Inactive
tPU
2
ms
VCC Valid to End of Write Protection
tREC
125
ms
(tA = +25°C)
PARAMETER
Expected Data Retention Time
SYMBOL
tDR
MIN
10
TYP
MAX
UNITS
years
NOTES
9
WARNING:
Under no circumstance are negative undershoots, of any amplitude, allowed when device is in battery
backup mode.
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DS1258W
NOTES:
1) WE is high for a Read Cycle.
2) OE = VIH or VIL. If OE = VIH during write cycle, the output buffers remain in a high impedance state.
3) tWP is specified as the logical AND of CEU or CEL and WE . tWP is measured from the latter of CEU ,
CEL or WE going low to the earlier of CEU , CEL or WE going high.
4) tDS is measured from the earlier of CEU or CEL or WE going high.
5) These parameters are sampled with a 5pF load and are not 100% tested.
6) If the CEU or CEL low transition occurs simultaneously with or later than the WE low transition in
the output buffers remain in a high impedance state during this period.
7) If the CEU or CEL high transition occurs prior to or simultaneously with the WE high transition, the
output buffers remain in high impedance state during this period.
8) If WE is low or the WE low transition occurs prior to or simultaneously with the CEU or CEL low
transition, the output buffers remain in a high impedance state during this period.
9) Each DS1258W has a built-in switch that disconnects the lithium source until VCC is first applied by
the user. The expected tDR is defined as accumulative time in the absence of VCC starting from the
time power is first applied by the user.
10) All AC and DC electrical characteristics are valid over the full operating temperature range. For
commercial products, this range is 0 to +70°C. For industrial products, this range is -40°C to +85°C.
11) In a power-down condition the voltage on any pin may not exceed the voltage on VCC.
12) tWR1, tDH1 are measured from WE going high.
13) tWR2, tDH2 are measured from CEU OR CEL going high.
14) DS1258W DIP modules are recognized by Underwriters Laboratory (U.L.®) under file E99151.
DC TEST CONDITIONS
AC TEST CONDITIONS
Outputs Open
Cycle = 200ns
All voltages are referenced to ground
Output Load: 100pF + 1TTL Gate
Input Pulse Levels:
0.0V to 2.7V
Timing Measurement Reference Levels
Input: 1.5V
Output: 1.5V
Input pulse Rise and Fall Times: 5ns
ORDERING INFORMATION
DS1258 WP - SSS - III
Operating Temperature Range
blank: 0° to +70°C
IND: -40° to +85°C
Access Speed
100: 100ns
150: 150ns
Package Type
blank: 40-pin (600mil) DIP
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DS1258W
DS1258W NONVOLATILE SRAM 40-PIN, 740-MIL EXTENDED MODULE
PKG
9 of 9
40-PIN
DIM
MIN
MAX
A IN.
MM
2.080
52.83
2.100
53.34
B IN.
MM
0.715
18.16
0.740
18.80
C IN.
MM
0.345
8.76
0.365
9.27
D IN.
MM
0.085
2.16
0.115
2.92
E IN.
MM
0.015
0.38
0.030
0.76
F IN.
MM
0.120
3.05
0.160
4.06
G IN.
MM
0.090
2.29
0.110
2.79
H IN.
MM
0.590
14.99
0.630
16.00
J IN.
MM
0.008
0.20
0.012
0.30
K IN.
MM
0.015
0.43
0.025
0.58
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