LINER LT1001 Precision operational amplifier Datasheet

LT1001
Precision Operational
Amplifier
DESCRIPTION
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FEATURES
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The LT ®1001 significantly advances the state-of-theart of precision operational amplifiers. In the design,
processing, and testing of the device, particular attention has been paid to the optimization of the entire
distribution of several key parameters. Consequently,
the specifications of the lowest cost, commercial temperature device, the LT1001C, have been dramatically
improved when compared to equivalent grades of competing precision amplifiers.
Guaranteed Low Offset Voltage
LT1001AM
15µV max
LT1001C
60µV max
Guaranteed Low Drift
LT1001AM
0.6µV/°C max
LT1001C
1.0µV/°C max
Guaranteed Low Bias Current
LT1001AM
2nA max
LT1001C
4nA max
Guaranteed CMRR
LT1001AM
114dB min
LT1001C
110dB min
Guaranteed PSRR
LT1001AM
110dB min
LT1001C
106dB min
Low Power Dissipation
LT1001AM
75mW max
LT1001C
80mW max
Low Noise 0.3µVP-P
Essentially, the input offset voltage of all units is less
than 50µV (see distribution plot below). This allows the
LT1001AM/883 to be specified at 15µV. Input bias and
offset currents, common-mode and power supply rejection of the LT1001C offer guaranteed performance
which were previously attainable only with expensive,
selected grades of other devices. Power dissipation is
nearly halved compared to the most popular precision
op amps, without adversely affecting noise or speed
performance. A beneficial by-product of lower dissipation is decreased warm-up drift. Output drive capability
of the LT1001 is also enhanced with voltage gain
guaranteed at 10 mA of load current. For similar performance in a dual precision op amp, with guaranteed
matching specifications, see the LT1002. Shown below
is a platinum resistance thermometer application.
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APPLICATIONS
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Thermocouple amplifiers
Strain gauge amplifiers
Low level signal processing
High accuracy data acquisition
, LTC and LT are registered trademarks of Linear Technology Corporation.
Linearized Platinum Resistance Thermometer
with ±0.025°C Accuracy Over 0 to 100°C
Typical Distribution
of Offset Voltage
VS = ±15V, TA = 25°C
1MEG.**
+15
R plat. †
20k
330k*
GAIN
TRIM
10k*
2
1 µf
–
2
6
LT1001
3
200
–
10k*
+
LT1001
3
+
6
OUTPUT
200Ω
LINEARITY
TRIM
0 TO 10V =
0 TO 100°C
NUMBER OF UNITS
1kΩ = 0°C
1.2k**
954 UNITS
FROM THREE RUNS
150
100
50
LM129
90k*
* ULTRONIX 105A WIREWOUND
** 1% FILM
† PLATINUM RTD
118MF (ROSEMOUNT, INC.)
20k
OFFSET TRIM
10k*
‡ Trim sequence: trim offset (0 °C = 1000.0Ω),
trim linearity (35 °C = 1138.7Ω), trim gain
(100 °C = 1392.6Ω). Repeat until all three
points are fixed with ±0.025°C.
0
–60
–40
0
20
40
60
–20
INPUT OFFSET VOLTAGE (MICROVOLTS)
1001 TA02
1001 TA01
1
LT1001
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PACKAGE/ORDER INFORMATION
TOP VIEW
OFFSET ADJUST
ORDER PART NUMBER
8
7
1
–
–IN 2
LT1001AMH/883
LT1001MH
LT1001ACH
LT1001CH
V+
6 OUT
+
5
3
NC
4
+IN
V– (CASE)
H PACKAGE
METAL CAN
LT1001AMJ8/883
LT1001MJ8
LT1001ACJ8
LT1001CJ8
LT1001ACN8
LT1001CN8
LT1001CS8
W W
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W
TOP VIEW
VOS
TRIM 1
VOS
8 TRIM
–IN 2
–
7 V+
+IN 3
+
6 OUT
V– 4
5 NC
J8 PACKAGE
N8 PACKAGE
8 PIN HERMETIC DIP 8 PIN PLASTIC DIP
S8 PACKAGE
8 PIN PLASTIC SO
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
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Supply Voltage ...................................................... ±22V
Differential Input Voltage ...................................... ±30V
Input Voltage ........................................................ ±22V
Output Short Circuit Duration ......................... Indefinite
Operating Temperature Range
LT1001AM/LT1001M ....................... – 55°C to 150°C
LT1001AC/LT1001C .............................. 0°C to 125°C
Storage: All Devices.......................... – 65°C to 150°C
Lead Temperature (Soldering, 10 sec.)................. 300°C
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ABSOLUTE MAXIMUM RATINGS
S8 PART MARKING
1001
VS = ±15V, TA = 25°C, unless otherwise noted
LT1001AM/883
LT1001AC
MIN TYP
MAX
7
15
LT1001M/LT1001C
MIN
TYP
MAX
VOS
Input Offset Voltage
CONDITIONS
LT1001AM/883
Note 1
∆VOS
∆Time
IOS
Long Term Input Offset Voltage
Stability
Notes 2 and 3
Ib
Input Bias Current
en
Input Noise Voltage
0.1Hz to 10Hz (Note 2)
en
Input Noise Voltage Density
fO = 10Hz (Note 5)
fO = 1000Hz (Note 2)
AVOL
Large Signal Voltage Gain
RL ≥ 2kΩ, VO = ±12V
RL ≥ 1kΩ VO = ±10V
450
300
800
500
400
250
800
500
V/mV
CMRR
Common Mode Rejection Ratio
VCM = ±13V
114
126
110
126
dB
PSRR
Power Supply Rejection Ratio
VS = ±3V to ±18V
110
123
106
123
dB
Rin
Input Resistance Differential Mode
LT1001AC
Input Offset Current
30
Input Voltage Range
18
60
µV
1.0
0.3
1.5
µV/month
2.0
0.4
3.8
nA
±0.5
±2.0
±0.7
±4.0
nA
0.3
0.6
0.3
0.6
µVp-p
10.3
9.6
18.0
11.0
10.5
9.8
18.0
11.0
nV√Hz
10
25
0.2
0.3
15
80
MΩ
±13
±14
100
±13
±14
V
±13
±12
±14
±13.5
±13
±12
±14
±13.5
V
V
0.25
V/µs
VOUT
Maximum Output Voltage Swing
RL ≥ 2kΩ
RL ≥ 1kΩ
SR
Slew Rate
RL ≥ 2kΩ (Note 4)
0.1
0.25
GBW
Gain-Bandwidth Product
(Note 4)
0.4
0.8
Pd
Power Dissipation
No load
No load, VS = ±3V
See Notes on page 3.
2
UNITS
46
4
0.1
0.4
75
6
0.8
48
4
MHz
80
8
mW
LT1001
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
VOS
Input Offset Voltage
VS = ±15V, – 55°C ≤ TA ≤ 125°C, unless otherwise noted
●
LT1001AM/883
MIN TYP
MAX
30
60
CONDITIONS
MIN
LT1001M
TYP
MAX
45
160
UNITS
µV
∆VOS
∆Temp
IOS
Average Offset Voltage Drift
●
0.2
0.6
0.3
1.0
µV/°C
Input Offset Current
●
0.8
4.0
1.2
7.6
nA
IB
Input Bias Current
±1.0
±4.0
±1.5
±8.0
AVOL
Large Signal Voltage Gain
RL ≥ 2kΩ, VO = ±10V
●
300
700
200
700
V/mV
CMRR
Common Mode Rejection Ratio
VCM = ±13V
●
110
122
106
120
dB
Power Supply Rejection Ratio
VS = ±3 to ±18V
●
117
dB
PSRR
●
Input Voltage Range
104
117
●
±13
±12.5 ±13.5
VOUT
Output Voltage Swing
RL ≥ 2kΩ
●
Pd
Power Dissipation
No load
●
100
±14
55
±13
±14
±12.0
±13.5
90
60
nA
V
V
100
mW
LT1001C
TYP
MAX
30
110
UNITS
µV
VS = ±15V, 0°C ≤ TA ≤ 70°C, unless otherwise noted
SYMBOL PARAMETER
VOS
Input Offset Voltage
CONDITIONS
MIN
●
LT1001AC
TYP
MAX
20
60
MIN
∆VOS
∆Temp
IOS
Average Offset Voltage Drift
●
0.2
0.6
0.3
1.0
µV/°C
Input Offset Current
●
0.5
3.5
0.6
5.3
nA
IB
Input Bias Current
±0.7
±3.5
±1.0
±5.5
AVOL
Large Signal Voltage Gain
CMRR
PSRR
●
nA
RL ≥ 2kΩ, VO = ±10V
●
350
750
250
750
V/mV
Common Mode Rejection Ratio
VCM = ±13V
●
110
124
106
123
dB
Power Supply Rejection Ratio
VS = ±3V to ±18V
●
106
120
103
120
dB
●
±13
VOUT
Output Voltage Swing
RL ≥ 2kΩ
●
±12.5 ±13.8
Pd
Power Dissipation
No load
●
Input Voltage Range
The ● denotes the specifications which apply over the full operating
temperature range.
Note 1: Offset voltage for the LT1001AM/883 and LT1001AC are measured
after power is applied and the device is fully warmed up. All other grades
are measured with high speed test equipment, approximately 1 second
after power is applied. The LT1001AM/883 receives 168 hr. burn-in at
125°C. or equivalent.
±14
50
85
±13
±14
V
±12.5
±13.8
V
55
90
mW
Note 2: This parameter is tested on a sample basis only.
Note 3: Long Term Input Offset Voltage Stability refers to the averaged
trend line of VOS versus Time over extended periods after the first 30 days
of operation. Excluding the initial hour of operation, changes in VOS during
the first 30 days are typically 2.5µV.
Note 4: Parameter is guaranteed by design.
Note 5: 10Hz noise voltage density is sample tested on every lot. Devices
100% tested at 10Hz are available on request.
3
LT1001
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TYPICAL PERFORMANCE CHARACTERISTICS
Typical Distribution of Offset
Voltage Drift with Temperature
Offset Voltage Drift withTemperature
of Representative Units
100
60
40
LT1001
VS = ±15V
30
OFFSET VOLTAGE (µV)
80
20
LT1001A
10
0
LT1001A
–10
–20
20
LT1001
–30
–40
–1.0
–50
–50
–0.6 –0.2 0 +0.2 +0.6 +1.0
OFFSET VOLTAGE DRIFT (µV/°C)
–25
50
25
0
75
TEMPERATURE (°C)
1001 G01
3
METAL CAN (H) PACKAGE
2
DUAL-IN-LINE PACKAGE
PLASTIC (N) OR CERDIP (J)
1
0
1
3
4
2
TIME AFTER POWER ON (MINUTES)
1001 G02
0.1Hz to 10Hz Noise
Long Term Stability of Four
Representative Units
100
10
10
VOLTAGE NOISE nV/√Hz
3
1/f CORNER
4Hz
VOLTAGE
10
1.0
1/f CORNER
70Hz
3
0.3
CURRENT NOISE pA/√Hz
TA = 25°C
VS = ±3 TO ±18V
30
5
1001 G03
Noise Spectrum
NOISE VOLTAGE 100nV/DIV
VS = ±15V
TA = 25°C
4
125
100
OFFSET VOLTAGE CHANGE (µV)
NUMBER OF UNITS
40
265 UNITS
TESTED
Warm-Up Drift
CHANGE IN OFFSET VOLTAGE (MICROVOLTS)
50
5
0
–5
CURRENT
1
2
6
4
TIME (SECONDS)
8
1
10
Input Bias and Offset Current
vs Temperature
0.6
BIAS CURRENT
0.4
–50 –25
125
1001 G07
4
0.5
0
DEVICE WITH POSITIVE INPUT CURRENT
VS = ±15V
TA = 25°C
–.5
DEVICE WITH NEGATIVE INPUT CURRENT
–1.0
100
Ib
–
+
VCM
OFFSET CURRENT
50
25
75
0
TEMPERATURE (°C)
4
–1.5
–15
5
30
1.0
INPUT BIAS CURRENT (nA)
INPUT BIAS AND OFFSET CURRENTS (nA)
1.2
0.8
3
2
TIME (MONTHS)
Input Bias Current vs
Differential Input Voltage
1.5
1.4
VS = ±15V
1
1001 G06
Input Bias Current
Over the Common Mode Range
1.0
0
1001 G05
1001 G04
0.2
–10
0.1
1000
10
100
FREQUENCY (Hz)
INVERTING OR NON-INVERTING
INPUT BIAS CURRENT (mA)
0
20
10
IB ≈ 1 nA to VDIFF = 0.7V
COMMON-MODE
INPUT RESISTANCE = 28V = 280G Ω
0.1nA
10
–5
0
5
–10
COMMON-MODE INPUT VOLTAGE
VS = ±15V
TA = 25°C
15
1001 G08
0
0.1
0.3
1.0
3.0
10
± DIFFERENTIAL INPUT (VOLTS)
30
1001 G09
LT1001
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TYPICAL PERFORMANCE CHARACTERISTICS
Open Loop Voltage Gain
Frequency Response
Gain, Phase Shift vs Frequency
VS = ±15V, VO = ±12V
800k
VS = ±3V, VO = ±1V
600k
400k
200k
120
100
80
VS = ±15V
60
40
VS = ±3V
20
50
25
75
0
TEMPERATURE (°C)
100
–20
0.1
125
1
10
100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
1001 G10
4
0
V – = –12 to –18V
V – = –1.2 to –4V
50
25
75
TEMPERATURE °C
100
100
80
VS = ±15V
TA = 25°C
60
40
1
10
100k
100
1k
10k
FREQUENCY (Hz)
12
8
POSITIVE SWING
4
VS = ±15V
TA = 25°C
1001 G16
POSITIVE SUPPLY
60
40
20
1
10
100
1k
FREQUENCY (Hz)
10k
100k
Output Short-Circuit Current
vs Time
50
0.5
± 6 ± 9 ± 12 ± 15 ± 18 ± 21
SUPPLY VOLTAGE (V)
NEGATIVE SUPPLY
80
1001 G15
SHORT CIRCUIT CURRENT (mA)
SINKING
SOURCING
1.0
100
Output Swing vs Load Resistance
OUTPUT SWING (VOLTS)
SUPPLY CURRENT (mA)
125°C
VS = ±15V ±1V p-p
TA = 25°C
120
0
0.1
1M
NEGATIVE SWING
1.5
220
2
1
0.5
FREQUENCY (MHz)
1001 G12
16
±3
0.2
1001 G14
Supply Current vs Supply Voltage
25°C
200
PHASE MARGIN –55°C = 63°
125°C = 57°
140
1001 G13
–55°C
180
Power Supply Rejection Ratio
vs Frequency
120
20
125
2.0
160
VS = ±15V
–8
0.1
POWER SUPPLY REJECTION (dB)
COMMON MODE REJECTION (dB)
V + = 12 to 18V
0
GAIN 125°C
140
GAIN 25°C & –55°C
Common Mode Rejection Ratio
vs Frequency
V + = 1.2 to 4V
25°C
PHASE
MARGIN
= 60°
8
140
+1.0
+0.8
+0.6
+0.4
+0.2
V–
–50 –25
120
1001 G11
Common Mode Limit
vs Temperature
V+
–0.2
–0.4
–0.6
–0.8
–1.0
100
PHASE 25°C
12
–4
0
0
–50 –25
COMMON MODE LIMIT (VOLTS)
REFERRED TO POWER SUPPLY
16
TA = 25°C
VOLTAGE GAIN (dB)
1000k
OPEN LOOP VOLTAGE GAIN (dB)
OPEN LOOP VOLTAGE GAIN (V/V)
1200k
80
20
140
PHASE SHIFT (DEGREES)
Open Loop Voltage Gain
vs Temperature
0
100
1000
3k
300
LOAD RESISTANCE (Ω)
10k
1001 G17
40
–55°C
30
20
25°C
125°C
10
VS = ±15V
–10
125°C
–20
25°C
–30
–55°C
–40
–50
0
1
3
4
2
TIME FROM OPUTPUT SHORT (MINUTES)
1001 G18
5
LT1001
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TYPICAL PERFORMANCE CHARACTERISTICS
Voltage Follower Overshoot
vs Capacitive Load
Small Signal Transient Response
Small Signal Transient Response
100
VS = ±15V
TA = 25°C
VIN = 100mV
RL > 50k
PERCENT OVERSHOOT
80
60
40
20
0
100
AV = +1, CL = 50pF
10,000
1000
CAPACITIVE LOAD (PICOFARADS)
1001 G19
100,000
AV = +1, CL = 1000pF
1001 G21
1001 G20
Maximum Undistorted
Output vs. Frequency
Closed Loop Output Impedance
28
100
VS = ±15V
TA = 25°C
24
OUTPUT IMPEDANCE (Ω)
OUTPUT VOLTAGE, PEAK-TO-PEAK (VOLTS)
Large Signal Transient Response
20
16
12
8
10
AV = 1000
1
AV = +1
0.1
IO = ±1mA
VS = ±15V
TA = 25°C
0.01
4
0
0.001
10
100
FREQUENCY (kHz)
1
1000
1001 G22
1
10
1k
100
FREQUENCY (Hz)
1001 G23
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APPLICATIONS INFORMATION
Application Notes and Test Circuits
The LT1001 series units may be inserted directly into
OP-07, OP-05, 725, 108A or 101A sockets with or without
removal of external frequency compensation or nulling
components. The LT1001 can also be used in 741, LF156
or OP-15 applications provided that the nulling circuitry is
removed.
The LT1001 is specified over a wide range of power supply
voltages from ±3V to ±18V. Operation with lower supplies
is possible down to ±1.2V (two Ni-Cad batteries). However, with ±1.2V supplies, the device is stable only in
closed loop gains of +2 or higher (or inverting gain of one
or higher).
10k
100k
1001 G24
Unless proper care is exercised, thermocouple effects
caused by temperature gradients across dissimilar metals
at the contacts to the input terminals, can exceed the
inherent drift of the amplifier. Air currents over device
leads should be minimized, package leads should be
short, and the two input leads should be as close together
as possible and maintained at the same temperature.
Test Circuit for Offset Voltage and its Drift with Temperature
*50k
+15V
2
100Ω
*
50k
*
–
+
3
7
LT1001
6
VO
4
–15V
VO = 1000VOS
* RESISTORS MUST HAVE LOW
THERMOELECTRIC POTENTIAL.
** THIS CIRCUIT IS ALSO USED AS THE BURN-IN
CONFIGURATION FOR THE LT1001, WITH SUPPLY
VOLTAGES INCREASED TO ±20V.
1001 F01
6
LT1001
Offset Voltage Adjustment
The input offset voltage of the LT1001, and its drift with temperature, are permanently trimmed at wafer test to a low level.
However, if further adjustment of Vos is necessary, nulling with
a 10k or 20k potentiometer will not degrade drift with temperature. Trimming to a value other than zero creates a drift of (Vos/
300)µV/°C, e.g., if Vos is adjusted to 300 µV, the change in drift
will be 1 µV/°C. The adjustment range with a 10k or 20k pot is
approximately ±2.5mV. If less adjustment range is needed, the
sensitivity and resolution of the nulling can be improved by using
a smaller pot in conjunction with fixed resistors. The example
below has an approximate null range of ±100 µV.
0.1Hz to 10Hz Noise Test Circuit
0.1µF
VOLTAGE GAIN = 50,000
100kΩ
–
10Ω
2kΩ
+
+
LT1001
4.3k
22µF
LT1001
DEVICE
UNDER
TEST
4.7 µF
SCOPE
×1
RIN = 1MΩ
–
2.2µF
100k
Improved Sensitivity Adjustment
110k
0.1 µF
24.3k
1001 F03
7.5k
(Peak-to-Peak noise measured in 10 sec interval)
+15V
1k
1
2
The device under test should be warmed up for three minutes and
shielded from air currents.
7.5k
–
8
7
INPUT
3
+
6
LT1001
OUTPUT
4
–15V
1001 F02
DC Stabilized
1000v/µsec Op Amp
2.2µF
TANTALUM
+15V
+
300
3.9k
1N914
2N5486
.1µF
200Ω*
200pf
2N5160
0.01 µF
22µF TANTALUM
+
2N3866
33
1k
RIN
1k
10k
INPUT
3
+
LT1001
15pF
2
2N4440
1.8k
30k
–15V
6
.001
µF
390Ω
2N3904
–
30k
2N3904
.5Ω
OUTPUT
470
.5Ω
22
2N5160
2N3906
0.01µF
2N3866
2N4440
22µF TANTALUM
200pF
15-60pF
TUSONIX # 519-3188
–
1.2k
3.9k
+
200Ω*
1N914
300
0.1µF
–15V
1001 F04
1k
Rf
FULL POWER
BANDWIDTH 8MHz
*ADJUST FOR
BEST SQUARE WAVE
AT OUTPUT
7
LT1001
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TYPICAL APPLICATIONS
Photodiode Amplifier
Microvolt Comparator with TTL Output
+5V
100pF
39.2 Ω 1%
1.21M
1%
7
NON
INVERTING
INPUT
2
INVERTING
INPUT
3
5k 5%
–
500k 1%
4.99k 1%
8
OUTPUT
2
20k
LT1001
+
5%
IN914
4
λ
2N3904
3
1001 TA04
Precision Current Sink
V + = 2 to 35V
5k
R
5V
VIN
5k
7
2
–
0 to (V – + 1V)
VIN
3
0 to (V + – 1V)
6
2N3685
7
+
LT1001
2
2N2219
4
–
6
2N3685
2N2219
4
10K
–5V
10k
1000pF
V
IOUT = IN
R
C
RC ≈ 10 –4
LT1001
+
1001 TA03
Precision Current Source
+
OUTPUT
1V/µA
500k
1%
100pF
3
6
LT1001
–5V
Positive feedback to one of the nulling terminals
creates 5 µ to 20 µV of hysteresis. Input offset
voltage is typically changed by less than 5 µV due
to the feedback.
–
V – = –2 to –35V
V
IOUT = IN
R
R
1001 TA05
1001 TA06
Strain Gauge Signal Conditioner with Bridge Excitation
+15V
+15V
8.2k
2.0k*
LM329
3
4.99k*
100Ω
+
LT1001
2
6
–
REFERENCE OUT
TO MONITORING
A/D CONVERTER
2k
2N2219
IN4148
350Ω BRIDGE
3
*
301k
10k
ZERO
+
LT1001
2
6
–
1µF
2
–
IN4148
LT1001
3
+
6
0 TO 10V
OUT
340k*
1.1k*
2N2907
2k
100Ω
5W
GAIN
TRIM
*RN60C FILM RESISTORS
1001 TA07
–15V
8
LT1001
Large Signal Voltage Follower
With 0.001% Worst-Case Accuracy
rejections. Worst-case summation of guaranteed
specifications is tabulated below.
OUTPUT ACCURACY
+12 to +18V
2
INPUT
–10 to +10V
–
3
LT1001C
LT1001AM
/883
LT1001C
Error
25°C
Max.
25°C
Max.
–55 to 125 °C
Max.
0 to 70°C
Max.
+
0 to 10kΩ
Offset Voltage
Bias Current
Common-Mode Rejection
Power Supply Rejection
Voltage Gain
15µV
20µV
20µV
18µV
22µV
60µV
40µV
30µV
30µV
25µV
60µV
40µV
30µV
36µV
33µV
110µV
55µV
50µV
42µV
40µV
Worst-case Sum
Percent of Full Scale
(=20V)
95µV
185µV
199µV
297µV
0.0005%
0.0009%
0.0010%
0.0015%
OUTPUT
6
LT1001
RS
LT1001AM
/883
7
–10 to +10V
4
–12 to –18V
1001 TA08
The voltage follower is an ideal example illustrating
the overall excellence of the LT1001. The contributing
error terms are due to offset voltage, input bias current, voltage gain, common-mode and power-supply
Thermally Controlled NiCad Charger
10V, 1.2 AMP HR
NICAD STACK
+15V
+ –
*
– +
BATTERY
3
AMBIENT
7
+
LT1001
620k
2
–15V
IN4001
6
2k
–
2N6387
IN4148
4
–15V
CIRCUIT USES TEMPERATURE DIFFERENCE
BETWEEN BATTERY PACK MOUNTED
THERMOCOUPLE AND AMBIENT THERMOCOUPLE TO SET BATTERY CHARGE
CURRENT. PEAK CHARGING
CURRENT IS 1 AMP.
0.1µF
43k
0.6Ω
5W
10Ω
1µF
*
* SINGLE POINT GROUND
THERMOCOUPLES ARE
40 µV/°C CHROMEL-ALUMEL
(TYPE K)
*
1001 TA09
Precision Absolute Value Circuit
10k
0.1%
INPUT
–10 to 10V
10k
2
0.1%
LT1001
3
0.1%
0.1%
IN4148
–
10k
10k
2
6
LT1001
3
+
–
+
6
OUTPUT
0 to 10V
IN4148
10k
1001 TA10
0.1%
9
LT1001
Precision Power Supply with Two Outputs
(1) 0V to 10V in 100µV STEPS
(2) 0V to 100V in 1mV STEPS
22k*
43k*
(select)
100Ω
2
+15V
100Ω 5W
–
2k
LT1001
+15V
3
2N2219
6
+
OUTPUT 1
0-10V
25mA
IN
914
8.2k
TRIAD TY-90
VN-46
LM399
DIODES =
SEMTECH #
FF-15
KVD
00000 –
99999 + 1
+
KELVIN-VARLEY
DIVIDER
ESI#DP311
–15V
4
VN-46
0.1
*JULIE RSCH. LABS
#R-44
25k
90k*
2.2
10k* (select)
+
TRIM–100V
100Ω
680pF
2
–
D
CLK
6
LT301A
3
OUTPUT 2
0-100V, 25mA
Q
2N6533
33k
6
+
74C74
IN914
22µF
1.8k
LT1001
+
3
+15
+15V
+15V
2
15Ω
33k
33k
–
2k
Q
+
2N2907
CLAMP SET
5k
IN914
1001 TA11
Dead Zone Generator
BIPOLAR SYMMETRY IS EXCELLENT BECAUSE ONE DEVICE, Q2, SETS BOTH LIMITS
INPUT
Q4
**
100k
**
100k
2
10k*
6
LM301A
3
8
+
100k
Q3
Q2
–
VSET
DEAD ZONE
CONTROL INPUT
0 to 5V
2k
1
2
30pF
2N4393
Q1
47pF
10k*
4.7k
10k**
–
LT1001
3
6
+
IN914
10k**
2
10k
3
+15V
100k
15pF
2
–
LM301A
3
+
6
4.7k
VOUT
+
IN914
VSET
VOUT
1k
VIN
–15V
10
6
2N4393
Q6
3.3k
Q5
LT1001
10k
4.7k
15pF
–
* 1% FILM
** RATIO MATCH 0.05%
Q2, 3, 4, 5 CA 3096 TRANSISTOR ARRAY
VSET
1001 TA12
LT1001
Instrumentation Amplifier with ±300V
Common Mode Range and CMRR > 150dB
+15V
820Ω
820Ω
3
+
10k
6
LT1001
2
–
OUTPUT
+
330k*
0.1µF
S1
S3
**
1µF
INPUT
0.2µF
**
909Ω*
S2
200Ω
GAIN
TRIM
S4
(ACQUIRE)
(READ)
01
02
OUT
OUT
A
74C906
IN
IN
74C04
2k*
74C86
2k*
1
C
4022
EN
2
6
CLK
R
10k
1k
+
3
–
2
LM301A
5.6k*
R1
0.1µF
1k
LM329
1) ALL DIODES IN4148
2) S1–S4 OPTO MOS SWITCH OFM-1A, THETA-J CORP.
3) *FILM RESISTOR
4) **POLYPROPYLENE CAPACITORS
5) ADJUST R1 for 93 Hz AT TEST POINT A
A FLYING CAPACITOR CHARGED BY CLOCKED
PHOTO DRIVEN FET SWITCHES CONVERTS A
DIFFERENTIAL SIGNAL AT A HIGH COMMON
MODE VOLTAGE TO A SINGLE ENDED SIGNAL
AT THE LT1001 OUTPUT.
Information furnished by Linear Technology Corporation is believed to be accurate and
reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein
will not infringe on existing patent rights.
1001 TA13
11
LT1001
W
W
SCHE ATIC DIAGRA
V+
7
6k
6k
1
8
Q29
Q27
40k
Q24
Q25
Q28
40k
1.5k
Q13
Q11
Q5
Q14
25k
Q12
Q6
3k
Q8
Q7
Q31
Q4
Q3
55pF
20pF
Q33
20Ω
+
Q1A
500
Q2B
Q1B
30pF
Q2A
3k
OUT
Q26
3
6
20Ω
Q21
–
Q34
Q16
Q10
500
Q15
2
2k
180Ω
Q20
2k
Q17
Q23
Q18
Q30
Q9
120Ω
8k
Q19
V–
Q32
Q22
T1
240Ω
1001 SS
4
U
PACKAGE DESCRIPTION
H Package
8-Lead TO-5 Metal Can (0.200 PCD)
Dimensions in inches (millimeters) unless otherwise noted.
J8 Package
8-Lead CERDIP (Narrow 0.300, Hermetic)
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1110)
(LTC DWG # 05-08-1510)
(LTC DWG # 05-08-1320)
CORNER LEADS OPTION
(4 PLCS)
0.335 – 0.370
(8.509 – 9.398)
DIA
0.305 – 0.335
(7.747 – 8.509)
0.040
(1.016)
MAX
0.050
(1.270)
MAX
SEATING
PLANE
0.023 – 0.045
(0.584 – 1.143)
HALF LEAD
OPTION
0.165 – 0.185
(4.191 – 4.699)
GAUGE
PLANE
0.010 – 0.045*
(0.254 – 1.143)
0.005
(0.127)
MIN
0.045 – 0.068
(1.143 – 1.727)
FULL LEAD
OPTION
REFERENCE
PLANE
0.500 – 0.750
(12.700 – 19.050)
0.405
(10.287)
MAX
8
7
0.400*
(10.160)
MAX
6
5
0.025
(0.635)
RAD TYP
2
3
0.016 – 0.021**
(0.406 – 0.533)
0.008 – 0.018
(0.203 – 0.457)
0.027 – 0.034
(0.686 – 0.864)
0.385 ± 0.025
(9.779 ± 0.635)
0.200
(5.080)
TYP
0.110 – 0.160
(2.794 – 4.064)
INSULATING
STANDOFF
0.300 – 0.325
(7.620 – 8.255)
0.009 – 0.015
(0.229 – 0.381)
0° – 15°
0.045 – 0.068
(1.143 – 1.727)
0.125
3.175
0.100 ± 0.010 MIN
(2.540 ± 0.254)
0.014 – 0.026
(0.360 – 0.660)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS.
5
1
2
3
4
0.045 – 0.065
(1.143 – 1.651)
0.130 ± 0.005
(3.302 ± 0.127)
(
+0.025
0.325 –0.015
8.255
+0.635
–0.381
)
0.065
(1.651)
TYP
0.005
(0.127)
MIN
0.100 ± 0.010
(2.540 ± 0.254)
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
J8 0694
0.125
(3.175)
MIN
0.015
(0.380)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
N8 0695
H8(TO-5) 0.200 PCD 0595
Tjmax
θja
150°C 100°C/W
*LEAD DIAMETER IS UNCONTROLLED BETWEEN THE REFERENCE PLANE
AND 0.045" BELOW THE REFERENCE PLANE
0.016 – 0.024
(0.406 – 0.610)
**FOR SOLDER DIP LEAD FINISH, LEAD DIAMETER IS
Tjmax
θja
θjc
150°C 150°C/W 45°C/W
Tjmax
θja
150°C 130°C/W
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
0.053 – 0.069
(1.346 – 1.752)
0°– 8° TYP
0.016 – 0.050
0.406 – 1.270
0.014 – 0.019
(0.355 – 0.483)
Linear Technology Corporation
0.189 – 0.197*
(4.801 – 5.004)
8
7
6
5
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
BSC
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
12
6
0.015 – 0.060
(0.381 – 1.524)
0.027 – 0.045
(0.686 – 1.143)
45°TYP
0.200
(5.080)
MAX
4
7
0.255 ± 0.015*
(6.477 ± 0.381)
0.220 – 0.310
(5.588 – 7.874)
1
0.300 BSC
(0.762 BSC)
8
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
2
3
4
Tjmax
θja
150°C 150°C/W
SO8 0695
LT/GP 0396 2K REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977
 LINEAR TECHNOLOGY CORPORATION 1983