UMS CHA5050-QDG 17-24ghz medium power amplifier Datasheet

CHA5050-QDG
RoHS COMPLIANT
17-24GHz Medium Power Amplifier
GaAs Monolithic Microwave IC in SMD leadless package
Description
The CHA5050-QDG is a medium power
amplifier four stages monolithic circuit.
It is designed for a wide range of
applications, from military to commercial
communication systems.
The circuit is manufactured with a pHEMT
process, 0.15µm gate length, via holes
through the substrate, air bridges and
electron beam gate lithography.
It is supplied in RoHS compliant SMD
package.
UMS
UMS
A5050
A3667A
A3688A
YYWW
YYWWG
Main Features
■ Broadband performances: 17-24GHz
■ 22dB Linear Gain
■ 25dBm Pout @ 1dB comp
■ 30dBm Output IP3
■ DC bias: Vd=6.0Volt@Id=230mA
■ 24L-QFN4x4
■ MSL1
Main Electrical Characteristics
Tamb.= +25°C, Vd = Vd1 = Vd2 = Vd3 = Vd4 = 6.0V, Id = 230mA
Symbol
Parameter
Min
Freq
Frequency range
17
Gain
Linear Gain
P1dB
Output power @ 1dB compression
Psat
Saturated output power
OIP3
Output IP3
Ref. : DSCHA5050QDG1216 - 04 Aug 11
1/14
Typ
22
25
26
30
Max
24
Unit
GHz
dB
dBm
dBm
dBm
Specifications subject to change without notice
United Monolithic Semiconductors S.A.S.
Route Départementale 128 - BP46 - 91401 Orsay Cedex France
Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
CHA5050-QDG
17-24GHz Medium Power Amplifier
Electrical Characteristics
Tamb.= +25°C, Vd = Vd1 = Vd2 = Vd3 = Vd4 = 6.0V
Symbol
Parameter
Min
Typ
Max
Unit
Fop
Operating frequency range
17
24
GHz
G
Small Signal Gain
22
dB
P1dB
Output power @ 1dB compression
25
dBm
Psat
Saturated output power
26
dBm
OIP3
Output IP3
30
dBm
Rlin
Input Return Loss
-7
dB
Rlout
Output Return Loss
-9
dB
Vg
DC gate voltage
-0.5
V
Id
Total drain current
230
mA
These values are representative of onboard measurements as defined on the drawing in
paragraph "Evaluation mother board".
Absolute Maximum Ratings (1)
Tamb.= +25°C
Symbol
Parameter
Vd
Drain bias voltage
Id
Drain bias current
Vg
Gate bias voltage
Pin
Maximum peak input power overdrive (2)
Tj
Junction temperature
Ta
Operating temperature range
Tstg
Storage temperature range
(1)
Operation of this device above anyone of these parameters
damage.
(2)
Duration < 1s.
Values
Unit
6.5
V
300
mA
-2 to +0.4
V
+8
dBm
175
°C
-40 to +85
°C
-55 to +150
°C
may cause permanent
Typical Bias Conditions
Tamb.= +25°C
Symbol
Vd4, Vd3, Vd2, Vd1
Id
Vg
Pad No
7, 9, 10, 12
7, 9, 10, 12
22
Ref. : DSCHA5050QDG1216 - 04 Aug 11
Parameter
Drain voltage
Drain current controlled with Vg
Gate voltage
2/14
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Values
6.0
230
-0.5
Unit
V
mA
V
Specifications subject to change without notice
CHA5050-QDG
17-24GHz Medium Power Amplifier
Device thermal performances
All the figures given in this section are obtained assuming that the QFN device is cooled
down only by conduction through the package thermal pad (no convection mode considered).
The temperature is monitored at the package back-side interface (Tcase) as shown below.
The system maximum temperature must be adjusted in order to guarantee that Tcase
remains below than the maximum value specified in the next table. So, the system PCB must
be designed to comply with this requirement.
A derating must be applied on the dissipated power if the Tcase temperature can not be
maintained below than the maximum temperature specified (see the curve Pdiss. Max) in
order to guarantee the nominal device life time (MTTF).
DEVICE THERMAL SPECIFICATION : CHA5050-QDG
Recommended max. junction temperature (Tj max)
:
141
Junction temperature absolute maximum rating
:
175
Max. continuous dissipated power (Pdiss. Max.)
:
1.4
=> Pdiss. Max. derating above Tcase(1)= 85
°C :
24
Junction-Case thermal resistance (Rth J-C)(2)
:
<40
Minimum Tcase operating temperature(3)
:
-40
(3)
Maximum Tcase operating temperature
:
85
Minimum storage temperature
:
-55
Maximum storage temperature
:
150
°C
°C
W
mW/°C
°C/W
°C
°C
°C
°C
(1) Derating at junctio n temperature co nstant = Tj max.
(2) Rth J-C is calculated fo r a wo rst case co nsidering the ho t t e s t junc t io n o f the M M IC and all the devices biased.
(3) Tcase=P ackage back side temperature measured under the die-attach-pad (see the drawing belo w).
1.6
1.2
1
0.8
0.6
0.4
Pdiss. Max. @Tj <Tj max (W)
0.2
0
-50
-25
0
25
50
75
100
125
150
175
Tcase
Pdiss. Max. @Tj <Tj max (W)
1.4
Example: QFN 16L 3x3
Location of temeprature
reference point (Tcase)
on package's bottom side
Tcase (°C)
6.1
Ref. : DSCHA5050QDG1216 - 04 Aug 11
3/14
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Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
Specifications subject to change without notice
CHA5050-QDG
17-24GHz Medium Power Amplifier
Typical Package Sij parameters
Tamb.= +25°C, Vd = Vd1 = Vd2 = Vd3 = Vd4 = 6.0V, Id = 230mA
Freq
S11
PhS11
S12
PhS12
S21
PhS21
(GHz)
(dB)
(°)
(dB)
(°)
(dB)
(°)
2
-0.15
-43.46
-79.12
82.91
-93.09
164.10
3
-0.26
-65.21
-84.47
139.40
-79.29
25.76
4
-0.34
-86.45
-75.82
-124.90
-76.78
-141.20
5
-0.67
-109.30
-71.70
-131.10
-62.69
-122.80
6
-0.92
-130.50
-69.28
165.70
-51.22
169.10
7
-1.42
-151.70
-67.06
88.13
-39.69
100.50
8
-1.90
-175.20
-62.98
87.70
-28.67
26.75
9
-2.89
154.90
-65.44
44.97
-19.03
-56.92
10
-4.10
131.00
-66.59
-63.19
-12.25
-138.70
11
-6.29
110.20
-64.11
-74.28
-6.13
149.80
12
-10.06
82.48
-76.01
145.90
-1.12
78.12
13
-18.87
53.88
-58.93
114.50
3.47
15.51
14
-21.88
-162.80
-54.27
105.60
9.91
-44.55
15
-13.42
158.20
-52.66
87.41
16.80
-118.70
16
-16.95
115.40
-51.19
57.99
21.93
144.40
17
-15.06
177.90
-49.55
21.75
22.82
55.31
18
-9.61
150.10
-58.59
14.67
22.84
-23.65
19
-7.45
124.80
-58.33
7.12
22.45
-95.31
20
-6.66
100.90
-58.49
6.88
21.84
-158.90
21
-6.47
79.07
-55.71
49.41
21.94
140.30
22
-6.65
56.92
-64.74
17.23
22.25
79.89
23
-7.77
38.68
-52.31
77.06
22.66
18.99
24
-8.73
19.38
-49.00
47.85
23.47
-44.50
25
-11.58
12.05
-46.33
12.35
24.08
-115.30
26
-9.64
17.46
-48.81
-7.73
23.83
170.80
27
-6.74
-1.09
-48.77
-9.68
22.20
94.00
28
-4.45
-25.01
-45.91
13.83
19.73
19.57
29
-2.70
-54.65
-43.31
0.89
16.01
-53.66
30
-1.71
-84.20
-40.58
-23.57
11.45
-120.30
31
-1.09
-110.70
-38.13
-40.14
6.53
176.90
32
-0.43
-135.10
-36.52
-79.36
1.40
116.70
33
0.07
-157.60
-38.59
-141.90
-4.67
58.50
34
0.48
-178.40
-55.80
-143.50
-11.29
3.64
35
0.42
162.70
-54.29
-123.80
-19.26
-45.30
36
0.10
147.10
-50.38
-59.24
-27.82
-83.84
37
-0.19
133.00
-48.15
-44.33
-37.07
-93.46
38
-0.40
121.10
-44.07
-51.65
-40.71
-72.72
39
-0.50
108.50
-39.58
-75.49
-38.32
-78.30
40
-0.47
95.99
-38.86
-102.30
-38.42
-95.95
Ref. : DSCHA5050QDG1216 - 04 Aug 11
4/14
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Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
S22
(dB)
-0.10
-0.17
-0.19
-0.41
-0.83
-1.61
-3.05
-5.89
-9.39
-19.41
-14.19
-9.91
-7.87
-6.51
-6.85
-9.02
-12.37
-19.02
-22.77
-21.18
-19.53
-18.83
-19.50
-28.26
-13.90
-8.81
-6.77
-5.28
-4.57
-4.14
-3.81
-3.30
-2.54
-1.92
-1.32
-0.94
-0.81
-0.71
-0.73
PhS22
(°)
-42.52
-64.72
-88.18
-110.60
-138.00
-165.60
167.40
149.10
130.70
118.30
-153.90
-170.10
-179.50
158.40
128.00
102.40
68.24
40.89
31.90
11.18
-14.93
-45.54
-58.31
-19.30
14.74
-13.81
-37.10
-62.66
-92.53
-127.00
-165.60
158.70
128.80
104.80
86.13
70.42
57.16
44.64
30.49
Specifications subject to change without notice
CHA5050-QDG
17-24GHz Medium Power Amplifier
Typical Board Measurements
Tamb.= +25°C, Vd = +6.0V, Vg = -0.5V, Id = 230mA
If no specific mention, the following values are representative of on board measurements (in
QFN access planes) as defined on the paragraph ”Evaluation mother board”.
Linear Gain & Return Loss versus frequency at room temperature
25
S21
20
Gain & Return Loss (dB)
15
10
5
0
-5
S11
-10
-15
S22
-20
-25
-30
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Frequency (GHz)
Linear Gain versus frequency & temperature
(-0.016dB/°C and per stage)
30
-40 °C
+25 °C
28
+85 °C
Linear Gain (dB)
26
24
22
20
18
16
17
18
19
20
21
22
23
24
25
26
Frequency (GHz)
Ref. : DSCHA5050QDG1216 - 04 Aug 11
5/14
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Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
Specifications subject to change without notice
CHA5050-QDG
17-24GHz Medium Power Amplifier
Typical Board Measurements
Tamb.= +25°C, Vd = +6.0V, Vg = -0.5V, Id = 230mA
Output Power at 1dB compression versus frequency
30
Ouput power at 1 dB compression (dBm)
29
28
27
26
25
24
23
22
21
20
17
18
19
20
21
22
23
24
25
26
Frequency (GHz)
Gain & Output Power versus input power & frequency
Gain (dB) & Output Power (dBm)
30
25
20
15
10
17 GHz
19 GHz
21 GHz
24 GHz
5
0
-20
-18
-16
-14
-12
-10
-8
-6
-4
-2
0
2
4
6
8
Pin (dBm)
Ref. : DSCHA5050QDG1216 - 04 Aug 11
6/14
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Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
Specifications subject to change without notice
CHA5050-QDG
17-24GHz Medium Power Amplifier
Typical Board Measurements
Vd = +6.0V, Vg = -0.5V, Id = 230mA
Output IP3 versus frequency & temperature
35
34
33
0IP3 (dBm)
32
31
30
29
28
+25°C
27
-40°C
+85°C
26
25
16
17
18
19
20
21
22
23
24
25
Frequency (GHz)
Drain current versus Input Power & temperature @ 20GHz
0,35
-40°C
+25°C
0,3
+85°C
0,25
Id (A)
0,2
0,15
0,1
0,05
0
-20
-18
-16
-14
-12
-10
-8
-6
-4
-2
0
2
4
6
8
Pin (dBm)
Ref. : DSCHA5050QDG1216 - 04 Aug 11
7/14
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Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
Specifications subject to change without notice
CHA5050-QDG
17-24GHz Medium Power Amplifier
Typical Board Measurements
Tamb.= +25°C, Vd = +6.0V, Vg = -0.5V, Id = 230mA
C/I3 versus Pout DCL & frequency at ambient temperature
55
50
45
C/I3 (dB)
40
35
30
25
20
17 GHz
19 GHz
21 GHz
24 GHz
15
10
7
9
11
13
15
17
19
21
23
25
Pout DCL (dBm)
C/I3 versus Pout DCL at 17GHz
C/I3 versus Pout DCL at 19GHz
55
55
-40 °C
50
50
+25 °C
+85 °C
45
45
40
C/I3 (dB)
C/I3 (dB)
40
35
30
35
30
25
25
20
20
15
15
10
10
-40 °C
+25 °C
7
9
11
13
15
17
19
21
23
25
+85 °C
7
9
11
13
Pout DCL (dBm)
C/I3 versus Pout DCL at 21GHz
17
19
21
23
25
C/I3 versus Pout DCL at 24GHz
55
55
50
50
45
45
40
40
C/I3 (dB)
C/I3 (dB)
15
Pout DCL (dBm)
35
30
25
35
30
25
20
20
-40 °C
-40 °C
+25 °C
15
+25 °C
15
+85 °C
10
+85 °C
10
7
9
11
13
15
17
19
21
23
25
7
Pout DCL (dBm)
Ref. : DSCHA5050QDG1216 - 04 Aug 11
9
11
13
15
17
19
21
23
25
Pout DCL (dBm)
8/14
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Specifications subject to change without notice
CHA5050-QDG
17-24GHz Medium Power Amplifier
Package outline (1)
Matt tin, Lead Free
Units :
From the standard :
(Green)
mm
JEDEC MO-220
(VGGD)
25- GND
12345678-
Nc
GND(2)
GND(2)
RF out
GND(2)
GND(2)
Vd4
GND(2)
910111213141516-
Vd3
Vd2
GND(2)
Vd1
GND(2)
GND(2)
RF in
GND(2)
1718192021222324-
GND(2)
Nc
Nc
Nc
Nc
Vg
Nc
Nc
(1)
The package outline drawing included to this data-sheet is given for indication. Refer to the
application note AN0017 (http://www.ums-gaas.com) for exact package dimensions.
(2)
It is strongly recommended to ground all pins marked “Gnd” through the PCB board.
Ensure that the PCB board is designed to provide the best possible ground to the package.
Ref. : DSCHA5050QDG1216 - 04 Aug 11
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Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
Specifications subject to change without notice
CHA5050-QDG
17-24GHz Medium Power Amplifier
Definition of the Sij reference planes
The reference planes used for Sij
measurements given above are symmetrical
from the symmetrical axis of the package
(see drawing beside). The input and output
reference planes are located at 3.18mm
offset (input wise and output wise
respectively) from this axis. Then, the given
Sij parameters incorporate the land pattern of
the evaluation motherboard recommended in
paragraph "Evaluation mother board".
3.18
Ref. : DSCHA5050QDG1216 - 04 Aug 11
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3.18
Specifications subject to change without notice
17-24GHz Medium Power Amplifier
CHA5050-QDG
Evaluation mother board
■ Compatible with the proposed footprint.
■ Based on typically Ro4003 / 8mils or equivalent.
■ Using a micro-strip to coplanar transition to access the package.
■ Recommended for the implementation of this product on a module board.
■ Decoupling capacitors of 10nF 10%, 100pF 5% and 1µF 10% are recommended
for all DC access.
■ See application note AN0017 for details.
Ref. : DSCHA5050QDG1216 - 04 Aug 11
11/14
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Specifications subject to change without notice
CHA5050-QDG
17-24GHz Medium Power Amplifier
Notes
Ref. : DSCHA5050QDG1216 - 04 Aug 11
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Specifications subject to change without notice
17-24GHz Medium Power Amplifier
CHA5050-QDG
DC Schematic
Id=230mA
Ref. : DSCHA5050QDG1216 - 04 Aug 11
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Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
Specifications subject to change without notice
CHA5050-QDG
17-24GHz Medium Power Amplifier
Recommended package footprint
Refer to the application note AN0017 available at http://www.ums-gaas.com for package foot
print recommendations.
SMD mounting procedure
For the mounting process standard techniques involving solder paste and a suitable reflow
process can be used. For further details, see application note AN0017.
Recommended environmental management
Refer to the application note AN0019 available at http://www.ums-gaas.com for
environmental data on UMS package products.
Recommended ESD management
Refer to the application note AN0020 available at http://www.ums-gaas.com for ESD
sensitivity and handling recommendations for the UMS package products.
Ordering Information
QFN 4x4 RoHS compliant package:
CHA5050-QDG/XY
Stick: XY = 20
Tape & reel: XY = 21
Information furnished is believed to be accurate and reliable. However United Monolithic Semiconductors
S.A.S. assumes no responsibility for the consequences of use of such information nor for any infringement of
patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of United Monolithic Semiconductors S.A.S.. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all
information previously supplied. United Monolithic Semiconductors S.A.S. products are not authorised for use
as critical components in life support devices or systems without express written approval from United
Monolithic Semiconductors S.A.S.
Ref. : DSCHA5050QDG1216 - 04 Aug 11
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Specifications subject to change without notice
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