QFET TM FQB55N06 / FQI55N06 60V N-Channel MOSFET General Description Features These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for low voltage applications such as automotive, DC/ DC converters, and high efficiency switching for power management in portable and battery operated products. • • • • • • • 55A, 60V, RDS(on) = 0.020Ω @VGS = 10 V Low gate charge ( typical 35 nC) Low Crss ( typical 85 pF) Fast switching 100% avalanche tested Improved dv/dt capability 175°C maximum junction temperature rating D D ! " G S D2-PAK G D S FQB Series Absolute Maximum Ratings Symbol VDSS ID ! " " " G! I2-PAK ! FQI Series S TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current FQB55N06 / FQI55N06 60 Units V 55 A - Continuous (TC = 100°C) IDM Drain Current - Pulsed (Note 1) 38.9 A 220 A VGSS Gate-Source Voltage ± 25 V EAS Single Pulsed Avalanche Energy (Note 2) 545 mJ IAR Avalanche Current (Note 1) 55 A EAR Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TA = 25°C) * (Note 1) 13.3 7.0 3.75 mJ V/ns W 133 0.89 -55 to +175 W W/°C °C 300 °C dv/dt PD TJ, TSTG TL (Note 3) Power Dissipation (TC = 25°C) - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds Thermal Characteristics Symbol RθJC Parameter Thermal Resistance, Junction-to-Case Typ -- Max 1.13 Units °C/W RθJA Thermal Resistance, Junction-to-Ambient * -- 40 °C/W RθJA Thermal Resistance, Junction-to-Ambient -- 62.5 °C/W * When mounted on the minimum pad size recommended (PCB Mount) ©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001 FQB55N06 / FQI55N06 May 2001 Symbol TC = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 60 -- -- V ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C -- 0.06 -- V/°C IDSS IGSSF IGSSR VDS = 60 V, VGS = 0 V -- -- 1 µA VDS = 48 V, TC = 150°C -- -- 10 µA Gate-Body Leakage Current, Forward VGS = 25 V, VDS = 0 V -- -- 100 nA Gate-Body Leakage Current, Reverse VGS = -25 V, VDS = 0 V -- -- -100 nA 2.0 -- 4.0 V -- 0.015 0.020 Ω -- 30 -- S -- 1300 1690 pF -- 490 640 pF -- 85 110 pF Zero Gate Voltage Drain Current On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 27.5 A gFS Forward Transconductance VDS = 25 V, ID = 27.5 A (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 30 V, ID = 27.5 A, RG = 25 Ω (Note 4, 5) VDS = 48 V, ID = 55 A, VGS = 10 V (Note 4, 5) -- 15 40 ns -- 130 270 ns -- 60 130 ns -- 75 160 ns -- 35 46 nC -- 9.5 -- nC -- 15.5 -- nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 55 A ISM -- -- 220 A VSD Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 55 A Drain-Source Diode Forward Voltage -- -- 1.5 V trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = 55 A, dIF / dt = 100 A/µs (Note 4) -- 55 -- ns -- 80 -- nC Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 210µH, IAS = 55A, VDD = 25V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ 55A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2% 5. Essentially independent of operating temperature ©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001 FQB55N06 / FQI55N06 Electrical Characteristics FQB55N06 / FQI55N06 Typical Characteristics VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom : 4.5 V Top : ID, Drain Current [A] 2 10 ID, Drain Current [A] 2 10 1 10 1 10 175℃ 25℃ ※ Notes : 1. 250μ s Pulse Test 2. TC = 25℃ 0 10 ※ Notes : 1. VDS = 25V 2. 250μ s Pulse Test -55℃ 0 -1 0 10 10 1 10 2 10 4 6 8 10 VGS, Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 50 2 10 VGS = 10V IDR, Reverse Drain Current [A] R DS(ON) [mΩ ], Drain-Source On-Resistance 40 30 VGS = 20V 20 1 10 10 ※ Note : TJ = 25℃ 175℃ ※ Notes : 1. VGS = 0V 2. 250μ s Pulse Test 25℃ 0 0 50 100 150 200 0 10 ID, Drain Current [A] 0.2 0.6 0.8 Coss ※ Notes : 1. VGS = 0 V 2. f = 1 MHz Ciss Crss V GS , Gate-Source Voltage [V] Capacitance [pF] 1.4 1.6 12 10 1000 1.2 Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 3000 2000 1.0 VSD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage 4000 0.4 VDS = 30V VDS = 48V 8 6 4 2 ※ Note : ID = 55A 0 0 0 -1 10 0 10 VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics ©2001 Fairchild Semiconductor Corporation 5 10 15 20 25 30 35 40 1 10 QG, Total Gate Charge [nC] Figure 6. Gate Charge Characteristics Rev. A1. May 2001 (Continued) 1.2 2.5 2.0 1.1 RDS(ON) , (Normalized) Drain-Source On-Resistance BV DSS , (Normalized) Drain-Source Breakdown Voltage FQB55N06 / FQI55N06 Typical Characteristics 1.5 1.0 1.0 ※ Notes : 1. VGS = 0 V 2. ID = 250 μ A 0.9 0.8 -100 -50 0 50 100 ※ Notes : 1. VGS = 10 V 2. ID = 27.5 A 0.5 150 200 0.0 -100 -50 10 Figure 8. On-Resistance Variation vs. Temperature 3 50 100 µ s 2 DC 1 ※ Notes : 40 30 20 10 o 1. TC = 25 C o 2. TJ = 175 C 3. Single Pulse 0 10 200 60 ID , Drain Current [A] ID , Drain Current [A] 150 Figure 7. Breakdown Voltage Variation vs. Temperature 1 ms 10 100 TJ, Junction Temperature [ C] 10 ms 10 50 TJ, Junction Temperature [ C] Operation in This Area is Limited by R DS(on) 10 0 o o -1 10 0 1 10 10 2 0 25 50 Figure 9. Maximum Safe Operating Area 75 100 125 150 175 TC, Case Temperature [℃] VDS, Drain-Source Voltage [V] Figure 10. Maximum Drain Current vs. Case Temperature PDM t1 t2 Figure 11. Transient Thermal Response Curve ©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001 FQB55N06 / FQI55N06 Gate Charge Test Circuit & Waveform VGS Same Type as DUT 50KΩ Qg 200nF 12V 10V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Resistive Switching Test Circuit & Waveforms VDS RL VDS 90% VDD VGS RG VGS DUT 10V 10% tr td(on) td(off) t on tf t off Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L VDS BVDSS IAS ID RG VDD DUT 10V tp ©2001 Fairchild Semiconductor Corporation ID (t) VDS (t) VDD tp Time Rev. A1. May 2001 FQB55N06 / FQI55N06 Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current I SD ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop ©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001 FQB55N06 / FQI55N06 Package Dimensions 4.50 ±0.20 9.90 ±0.20 +0.10 2.00 ±0.10 2.54 TYP (0.75) ° ~3 0° 0.80 ±0.10 1.27 ±0.10 2.54 ±0.30 15.30 ±0.30 0.10 ±0.15 2.40 ±0.20 4.90 ±0.20 1.40 ±0.20 9.20 ±0.20 1.30 –0.05 1.20 ±0.20 (0.40) D2PAK +0.10 0.50 –0.05 2.54 TYP 9.20 ±0.20 (2XR0.45) 4.90 ±0.20 15.30 ±0.30 10.00 ±0.20 (7.20) (1.75) 10.00 ±0.20 (8.00) (4.40) 0.80 ±0.10 ©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001 (Continued) I2PAK 4.50 ±0.20 (0.40) 9.90 ±0.20 +0.10 MAX13.40 9.20 ±0.20 (1.46) 1.20 ±0.20 1.30 –0.05 0.80 ±0.10 2.54 TYP 2.54 TYP 10.08 ±0.20 1.47 ±0.10 MAX 3.00 (0.94) 13.08 ±0.20 ) 5° (4 1.27 ±0.10 +0.10 0.50 –0.05 2.40 ±0.20 10.00 ±0.20 ©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001 FQB55N06 / FQI55N06 Package Dimensions TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOS™ EnSigna™ FACT™ FACT Quiet Series™ FAST® FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ PowerTrench® QFET™ QS™ QT Optoelectronics™ Quiet Series™ SLIENT SWITCHER® SMART START™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ UltraFET® VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. ©2001 Fairchild Semiconductor Corporation Rev. H2