MC74AC240, MC74ACT240 Octal Buffer/Line Driver with 3−State Outputs The MC74AC240/74ACT240 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved PC board density. http://onsemi.com • 3−State Outputs Drive Bus Lines or Buffer Memory Address • • Registers Outputs Source/Sink 24 mA ′ACT240 Has TTL Compatible Inputs PDIP−20 N SUFFIX CASE 738 20 1 VCC OE2 20 19 18 17 16 15 14 13 12 SO−20 DW SUFFIX CASE 751D 20 11 1 20 1 1 2 3 4 5 6 OE1 7 8 9 EIAJ−20 M SUFFIX CASE 967 10 20 GND 1 Figure 1. Pinout: 20−Lead Packages Conductors (Top View) ORDERING INFORMATION TRUTH TABLE Inputs TSSOP−20 DT SUFFIX CASE 948E Outputs Device Package Shipping† MC74AC240N PDIP−20 18 Units/Rail OE1 D (Pins 12, 14, 16, 18) MC74ACT240N PDIP−20 18 Units/Rail L L H L H X H L Z MC74AC240DW SOIC−20 38 Units/Rail MC74AC240DWR2 SOIC−20 1000 Tape & Reel MC74ACT240DW SOIC−20 38 Units/Rail MC74ACT240DWR2 SOIC−20 1000 Tape & Reel NOTE: H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance TRUTH TABLE Inputs TSSOP−20 2500 Tape & Reel MC74ACT240DTR2 TSSOP−20 2500 Tape & Reel Outputs OE2 D (Pins 3, 5, 7, 9) L L H L H X H L Z NOTE: MC74AC240DTR2 July, 2004 − Rev. 6 EIAJ−20 2000 Tape & Reel MC74ACT240MEL EIAJ−20 2000 Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance Semiconductor Components Industries, LLC, 2004 MC74AC240MEL DEVICE MARKING INFORMATION See general marking information in the device marking section on page 5 of this data sheet. 1 Publication Order Number: MC74AC240/D MC74AC240, MC74ACT240 MAXIMUM RATINGS Symbol Parameter Value Unit −0.5 to +7.0 V DC Input Voltage (Referenced to GND) −0.5 to VCC +0.5 V VOUT DC Output Voltage (Referenced to GND) −0.5 to VCC +0.5 V IIN DC Input Current, per Pin ±20 mA IOUT DC Output Sink/Source Current, per Pin ±50 mA ICC DC VCC or GND Current per Output Pin ±50 mA Tstg Storage Temperature −65 to +150 °C VCC DC Supply Voltage (Referenced to GND) VIN Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. RECOMMENDED OPERATING CONDITIONS Symbol Parameter VCC Supply Voltage VIN, VOUT DC Input Voltage, Output Voltage (Ref. to GND) tr, tf Input Rise and Fall Time (Note 1) ′AC Devices except Schmitt Inputs Min Typ Max ′AC 2.0 5.0 6.0 Unit ′ACT 4.5 5.0 5.5 0 − VCC VCC @ 3.0 V − 150 − VCC @ 4.5 V − 40 − VCC @ 5.5 V − 25 − VCC @ 4.5 V − 10 − VCC @ 5.5 V − 8.0 − − − 140 °C −40 25 85 °C V V ns/V tr, tf In ut Rise and Fall Time (Note 2) Input ′ACT Devices except Schmitt Inputs TJ Junction Temperature (PDIP) TA Operating Ambient Temperature Range IOH Output Current − High − − −24 mA IOL Output Current − Low − − 24 mA ns/V 1. VIN from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times. 2. VIN from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times. http://onsemi.com 2 MC74AC240, MC74ACT240 DC CHARACTERISTICS 74AC Symbol y Parameter VCC (V) 74AC TA = +25°C Typ VIH VIL VOH VOL TA =−40°C to +85°C Unit Conditions Guaranteed Limits Minimum u High g Level e e Input Voltage 3.0 4.5 5.5 1.5 2.25 2.75 2.1 3.15 3.85 2.1 3.15 3.85 V VOUT = 0.1 V or VCC − 0.1 V Maximum a u Low o Level e e Input Voltage 3.0 4.5 5.5 1.5 2.25 2.75 0.9 1.35 1.65 0.9 1.35 1.65 V VOUT = 0.1 V or VCC − 0.1 V Minimum u High g Level e e Output Voltage 3.0 4.5 5.5 2.99 4.49 5.49 2.9 4.4 5.4 2.9 4.4 5.4 V 3.0 4.5 5.5 − − − 2.56 3.86 4.86 2.46 3.76 4.76 3.0 4.5 5.5 0.002 0.001 0.001 0.1 0.1 0.1 0.1 0.1 0.1 3.0 4.5 5.5 − − − 0.36 0.36 0.36 0.44 0.44 0.44 Maximum a u Low o Level e e Output Voltage IOUT = −50 A V *VIN = VIL or VIH −12 mA IOH −24 mA −24 mA IOUT = 50 A V V *VIN = VIL or VIH 12 mA IOL 24 mA 24 mA IIN Maximum a u Input u Leakage Current 55 5.5 − ±0 1 ±0.1 ±1 0 ±1.0 A VI = VCC, GND IOZ Maximum a u 3−State C Current 5.5 − ±0.5 ±5.0 A VI (OE) = VIL, VIH VI = VCC, GND VO = VCC, GND 5.5 − − 75 mA VOLD = 1.65 V Max 5.5 − − −75 mA VOHD = 3.85 V Min 55 5.5 − 80 8.0 80 A VIN = VCC or GND IOLD IOHD ICC †Minimum Dynamic O t t Current Output C t Maximum a u Quiescent Qu esce Supply Current *All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one output loaded at a time. NOTE: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC. http://onsemi.com 3 MC74AC240, MC74ACT240 AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D) Symbol VCC* (V) Parameter 74AC 74AC TA = +25°C CL = 50 pF TA = −40°C to +85°C CL = 50 pF Min Typ Max Min Max Unit Fig. No. tPLH Propagation Delay Data to Output 3.3 5.0 1.5 1.5 6.0 4.5 8.0 6.5 1.0 1.0 9.0 7.0 ns 3−5 tPHL Propagation Delay Data to Output 3.3 5.0 1.5 1.5 5.5 4.5 8.0 6.0 1.0 1.0 8.5 6.5 ns 3−5 tPZH Output Enable Time 3.3 5.0 1.5 1.5 6.0 5.0 10.5 7.0 1.0 1.0 11.0 8.0 ns 3−7 tPZL Output Enable Time 3.3 5.0 1.5 1.5 7.0 5.5 10.0 8.0 1.0 1.0 11.0 8.5 ns 3−8 tPHZ Output Disable Time 3.3 5.0 1.5 1.5 7.0 6.5 10.0 9.0 1.0 1.0 10.5 9.5 ns 3−7 tPLZ Output Disable Time 3.3 5.0 1.5 1.5 7.5 6.5 10.5 9.0 1.0 1.0 11.5 9.5 ns 3−8 * Voltage Range 3.3 V is 3.3 V ±0.3 V. Voltage Range 5.0 V is 5.0 V ±0.5 V. DC CHARACTERISTICS Symbol y Parameter VCC (V) 74ACT 74ACT TA = +25°C TA = −40°C to +85°C Typ Unit Conditions Guaranteed Limits VIH Minimum u High g Level e e Input Voltage 4.5 5.5 1.5 1.5 2.0 2.0 2.0 2.0 V VOUT = 0.1 V or VCC − 0.1 V VIL Maximum a u Low o Level e e Input Voltage 4.5 5.5 1.5 1.5 0.8 0.8 0.8 0.8 V VOUT = 0.1 V or VCC − 0.1 V VOH Minimum u High g Level e e Output Voltage 4.5 5.5 4.49 5.49 4.4 5.4 4.4 5.4 V 4.5 5.5 − − 3.86 4.86 3.76 4.76 4.5 5.5 0.001 0.001 0.1 0.1 0.1 0.1 4.5 5.5 − − 0.36 0.36 0.44 0.44 V *VIN = VIL or VIH 24 mA IOL 24 mA VOL Maximum a u Low o Level e e Output Voltage V V IOUT = −50 A *VIN = VIL or VIH −24 mA IOH −24 mA IOUT = 50 A IIN Maximum a u Input u Leakage Current 55 5.5 − ±0 1 ±0.1 ±1 0 ±1.0 A VI = VCC, GND ∆ICCT Additional Max. ICC/Input 5.5 0.6 − 1.5 mA VI = VCC − 2.1 V IOZ Maximum a u 3−State C Current 5.5 − ±0.5 ±5.0 A VI (OE) = VIL, VIH VI = VCC, GND VO = VCC, GND 5.5 − − 75 mA VOLD = 1.65 V Max 5.5 − − −75 mA VOHD = 3.85 V Min 55 5.5 − 80 8.0 80 A VIN = VCC or GND IOLD IOHD ICC †Minimum Dynamic O t t Current Output C t Maximum a u Quiescent Qu esce Supply Current *All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one output loaded at a time. http://onsemi.com 4 MC74AC240, MC74ACT240 AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D) Symbol VCC* (V) Parameter 74ACT 74ACT TA = +25°C CL = 50 pF TA = −40°C to +85°C CL = 50 pF Min Typ Max Min Max Unit Fig. No. tPLH Pro agation Delay Propagation Data to Output 50 5.0 15 1.5 60 6.0 85 8.5 15 1.5 95 9.5 ns 3−5 tPHL Propagation Pro agation Delay Data to Output 50 5.0 15 1.5 55 5.5 75 7.5 15 1.5 85 8.5 ns 3−5 tPZH Output Enable Time 5.0 1.5 7.0 8.5 1.0 9.5 ns 3−7 tPZL Output Enable Time 5.0 2.0 7.0 9.5 1.5 10.5 ns 3−8 tPHZ Output Disable Time 5.0 2.0 8.0 9.5 2.0 10.5 ns 3−7 tPLZ Output Disable Time 5.0 2.5 6.5 10.0 2.0 10.5 ns 3−8 *Voltage Range 5.0 V is 5.0 V ±0.5 V. CAPACITANCE Symbol Parameter Value Typ Unit Test Conditions CIN Input Capacitance 4.5 pF VCC = 5.0 V CPD Power Dissipation Capacitance 45 pF VCC = 5.0 V MARKING DIAGRAMS PDIP−20 MC74AC240N AWLYYWW MC74ACT240N AWLYYWW SO−20 TSSOP−20 EIAJ−20 AC240 AWLYYWW AC 240 ALYW 74AC240 AWLYWW ACT240 AWLYYWW ACT 240 ALYW 74ACT240 AWLYWW A WL, L YY, Y WW, W = Assembly Location = Wafer Lot = Year = Work Week http://onsemi.com 5 MC74AC240, MC74ACT240 PACKAGE DIMENSIONS PDIP−20 N SUFFIX 20 PIN PLASTIC DIP PACKAGE CASE 738−03 ISSUE E −A− 20 11 1 10 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. B L C −T− K SEATING PLANE M N E G F J D 20 PL 0.25 (0.010) 20 PL 0.25 (0.010) M T A M M T B M DIM A B C D E F G J K L M N INCHES MIN MAX 1.010 1.070 0.240 0.260 0.150 0.180 0.015 0.022 0.050 BSC 0.050 0.070 0.100 BSC 0.008 0.015 0.110 0.140 0.300 BSC 0 15 0.020 0.040 MILLIMETERS MIN MAX 25.66 27.17 6.10 6.60 3.81 4.57 0.39 0.55 1.27 BSC 1.27 1.77 2.54 BSC 0.21 0.38 2.80 3.55 7.62 BSC 0 15 0.51 1.01 SO−20 DW SUFFIX 20 PIN PLASTIC SOIC PACKAGE CASE 751D−05 ISSUE G A 20 X 45 h 1 10 20X B B 0.25 M T A S B S A L H M E 0.25 10X NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. 11 B M D 18X e A1 SEATING PLANE C T http://onsemi.com 6 DIM A A1 B C D E e H h L MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0 7 MC74AC240, MC74ACT240 PACKAGE DIMENSIONS TSSOP−20 DT SUFFIX 20 PIN PLASTIC TSSOP PACKAGE CASE 948E−02 ISSUE B 20X 0.15 (0.006) T U 2X K REF 0.10 (0.004) S M 20 L/2 T U S V J J1 B −U− PIN 1 IDENT ÍÍÍ ÍÍÍ ÍÍÍ K K1 11 L SECTION N−N 1 10 0.25 (0.010) N 0.15 (0.006) T U NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. S S M A −V− N F DETAIL E −W− C G D H DETAIL E 0.100 (0.004) −T− SEATING DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 6.40 6.60 4.30 4.50 −−− 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0 8 INCHES MIN MAX 0.252 0.260 0.169 0.177 −−− 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0 8 PLANE EIAJ−20 M SUFFIX 20 PIN PLASTIC EIAJ PACKAGE CASE 967−01 ISSUE O 20 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). LE 11 Q1 E HE 1 M L 10 DETAIL P Z D VIEW P e A c A1 b 0.13 (0.005) M 0.10 (0.004) http://onsemi.com 7 DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX −−− 2.05 0.05 0.20 0.35 0.50 0.18 0.27 12.35 12.80 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 0 0.70 0.90 −−− 0.81 INCHES MIN MAX −−− 0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.486 0.504 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 0 0.028 0.035 −−− 0.032 MC74AC240, MC74ACT240 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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