Murata ADS-949GM 14 bit, 12.8mhz sampling a/d converter Datasheet

ADS 949
14 Bit, 12.8MHz
Sampling A/D Converters
FEATURES
14-bit resolution
12.8MHz minimum sampling rate
No missing codes over full military temperature range
Ideal for both time and frequency-domain applications
Excellent THD (–81dB) and SNR (78dB)
Edge-triggered
Small, 32-pin, side-brazed, ceramic TDIP or SMT
Low-power, 2 Watts
Low cost
INPUT/OUTPUT CONNECTIONS
PIN
GENERAL DESCRIPTION
FUNCTION
PIN
1
Vin a
2vin b
3
–5V
4
offset adj.
5
Range Ref.
6
2.5V ref.
7
START CONVERT
8
EOC
9enable
10
BIT 14 (LSB)
11
BIT 13
12
BIT 12
13bit 11
14bit 10
15
BIT 9
16bit 8
The low-cost ADS-949 is a 14-bit, 12.8MHz sampling A/D
converter. This device accurately samples full-scale input
signals up to Nyquist frequencies with no missing codes.
Excellent differential nonlinearity error (DNL), signal-to-noise
ratio (SNR), and total harmonic distortion (THD) make the
ADS-949 the ideal choice for both time-domain (CCD/FPA
imaging, scanners, process control) and frequency-domain
(radar, telecommunications, spectrum analysis) applications.
The functionally complete ADS-949 contains a fast-settling
sample/hold amplifier, a subranging A/D converter, an internal
reference, timing/control logic, and error-correction circuitry.
Digital input and output levels are TTL. The ADS-949 only
requires the rising edge of a start convert pulse to operate.
Requiring only +15V, +5V and –5V supplies, the ADS-949
typically dissipates just 2 Watts. The device is offered with a
Bipolar input range of ±2.5V and Unipolar range of 0 to 5 volts.
Models are available for use in either commercial (0 to +70°C)
or military (–55 to +125°C) operating temperature ranges.
FUNCTION
32
Range
31Gain Adjust
30
+5V Analog
29
Analog GND
28
+15V
27
+5V Digital
26
Digital GND
25Overflow
24msb
23
BIT 1 (MSB)
22bit 2
21
BIT 3
20
BIT 4
19
BIT 5
18
BIT 6
17bit 7
A proprietary, auto-calibrating, error-correcting circuit allows
the device to achieve specified performance over the full
military temperature range.
OFFSET ADJUST 4
BUFFER
VIN A
1
VIN B
2
–
+
9
ENABLE
S/H
10 BIT 14 (LSB)
11 BIT 13
12 BIT 12
POWER AND GROUNDING
GAIN ADJUST
31
+5V ANALOG SUPPLY
30
+5V DIGITAL SUPPLY
27
V RANGE
32
–5.2V SUPPLY
3
+15V SUPPLY
28
ANALOG GROUND
29
DIGITAL GROUND
26
START CONVERT 7
EOC 8
REF
DAC
�
AMP
FLASH
ADC
2
13 BIT 11
OUTPUT REGISTER
DIGITAL CORRECTION LOGIC
FLASH
ADC
1
REGISTER
2.5 V REF 6
REGISTER
•
•
•
•
•
•
•
•
•
14 BIT 10
15 BIT 9
16 BIT 8
17 BIT 7
18 BIT 6
19 BIT 5
20 BIT 4
21 BIT 3
22 BIT 2
23 BIT 1 (MSB)
24 MSB
TIMING AND
CONTROL LOGIC
25 OVERFLOW
Figure 1. ADS-949 Functional Block Diagram
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Technical enquiries email: [email protected], tel: +1 508 339 3000
MDC_ADS-949.B01 Page 1 of 8
ADS 949
14 Bit, 12.8MHz
Sampling A/D Converters
PHYSICAL/ENVIRONMENTAL
PARAMETERS
MIN.
TYP.
MAX.
UNITS
0
–55
—
—
+70
+125
°C
°C
Operating Temp. Range, Case
ADS-949MC, GC
ADS-949MM, GM,
Thermal Impedance
θjc
θca
Storage Temperature Range
Package Type
Weight
—
6
—
°C/Watt
—
23
—
°C/Watt
–65
—
+150
°C
32-pin, side-brazed, ceramic TDIP or SMT
0.46 ounces (13 grams)
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
+5V Supply (Pins 27, 30)
+15V Supply (Pin 28)
–5V Supply (Pin 3)
Digital Input (Pin 7)
Analog Input (Pins 1, 2)
Lead Temperature (10 seconds)
LIMITS
UNITS
0 to +6
0 to +16
0 to –5.5V
–0.3 to +VDD +0.3
±5
+300
Volts
Volts
Volts
Volts
Volts
°C
FUNCTIONAL SPECIFICATIONS
(TA = +25°C, +VDD = +5V, –VDD = –5V, +Vcc = +15V, 12.8MHz sampling rate, ±2.5V input range, and a minimum 3 minute warmup ➀ unless otherwise specified.)
+25°C
0 to +70°C
–55 to +125°C
ANALOG INPUT
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
UNITS
Bipolar Input Voltage Range ➁
Unipolar Input Voltage Range ➁
Input Resistance (Vin A)
Input Capacitance
±1
0 to 2
—
—
—
—
400
6
±2.5
0 to 5
—
15
±1
0 to 2
—
—
—
—
400
6
±2.5
0 to 5
—
15
±1
0 to 2
—
—
—
—
400
6
±2.5
0 to 5
—
15
Volts
Volts
Ω
pF
+2.0
—
—
—
—
—
—
—
—
50
—
+0.8
+20
–20
—
+2.0
—
—
—
—
—
—
—
—
50
—
+0.8
+20
–20
—
+2.0
—
—
—
—
—
—
—
—
50
—
+0.8
+20
–20
—
Volts
Volts
µA
µA
ns
—
—
–0.95
—
—
—
14
14
±0.75
±0.5
±0.15
±0.1
±0.2
—
—
—
+1.25
±0.4
±0.3
±0.4
—
—
—
–0.95
—
—
—
14
14
±0.75
±0.5
±0.15
±0.1
±0.2
—
—
—
+1.25
±0.4
±0.3
±0.4
—
—
—
–0.95
—
—
—
14
14
±1
±0.5
±0.4
±0.3
±0.4
—
—
—
+1.5
±0.8
±0.6
±1.5
—
Bits
LSB
LSB
%FSR
%FSR
%
Bits
—
—
—
–83
–78
–76
–76
–72
–71
—
—
—
–83
–78
–76
–75
–72
–71
—
—
—
–79
–73
–71
–71
–68
–65
dB
dB
dB
—
—
—
–81
–76
–74
–74
–71
–69
—
—
—
–81
–76
–74
–74
–71
–69
—
—
—
–77
–72
–69
–70
–66
–63
dB
dB
dB
72
72
72
78
77
76
—
—
—
72
72
72
78
77
76
—
—
—
70
70
70
78
77
76
—
—
—
dB
dB
dB
70
70
69
—
77
74
73
150
—
—
—
—
70
70
69
—
74
74
73
150
—
—
—
—
68
66
65
—
73
71
70
150
—
—
—
—
dB
dB
dB
µVrms
—
–82
—
—
–82
—
—
–82
—
dB
—
—
—
—
—
—
30
20
85
±400
+5
2
—
—
—
—
—
—
—
—
—
—
—
—
30
20
85
±400
+5
2
—
—
—
—
—
—
—
—
—
—
—
—
30
20
85
±400
+5
2
—
—
—
—
—
—
MHz
MHz
dB
V/µs
ns
ps rms
DIGITAL INPUT
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Start Convert Positive Pulse Width ➂
STATIC PERFORMANCE
Resolution
Integral Nonlinearity
Differential Nonlinearity (fin = 10kHz)
Full Scale Absolute Accuracy
Bipolar Zero Error (Tech Note 2)
Gain Error (Tech Note 2)
No Missing Codes (fin = 10kHz)
DYNAMIC PERFORMANCE
Peak Harmonics (–0.5dB)
dc to 1MHz
1MHz to 2.5MHz
2.5MHz to 5MHz
Total Harmonic Distortion (–0.5dB)
dc to 1MHz
1MHz to 2.5MHz
2.5MHz to 5MHz
Signal-to-Noise Ratio
(w/o distortion, –0.5dB)
dc to 1MHz
1MHz to 2.5MHz
2.5MHz to 5MHz
Signal-to-Noise Ratio ➃
(& distortion, –0.5dB)
dc to 1MHz
1MHz to 2.5MHz
2.5MHz to 5MHz
Noise
Two-tone Intermodulation
Distortion (fin = 2.45MHz,
1.975MHz, fs = 10MHz, –0.5dB)
Input Bandwidth (–3dB)
Small Signal (–20dB input)
Large Signal (–0.5dB input)
Feedthrough Rejection (fin = 5MHz)
Slew Rate
Aperture Delay Time
Aperture Uncertainty
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MDC_ADS-949.B01 Page 2 of 8
ADS 949
14 Bit, 12.8MHz
Sampling A/D Converters
+25°C
0 to +70°C
–55 to +125°C
DYNAMIC PERFORMANCE (Cont.)
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
UNITS
S/H Acquisition Time
( to ±0.003%FSR, 5V step)
Overvoltage Recovery Time
A/D Conversion Rate
—
—
12.8
40
—
—
45
100
—
—
—
12.8
40
—
—
45
100
—
—
—
12.8
40
—
—
45
100
—
ns
ns
MHz
+2.4
—
—
—
—
—
—
—
—
+0.4
–4
+4
+2.4
—
—
—
—
—
—
—
—
+0.4
–4
+4
+2.4
—
—
—
—
—
—
—
—
+0.4
–4
+4
Volts
Volts
mA
mA
DIGITAL OUTPUTS
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Output Coding
Straight Binary, Offset Binary
DIGITAL OUTPUTS
Power Supply Ranges
+5V Supply
–5.2V Supply
+15V Supply
Power Supply Currents
+5V Supply
–5.2V Supply
+15V Supply
Power Dissipation
Power Supply Rejection
+4.75
–4.75
+14.5
+5.0
–5.2
+15
+5.25
–5.45
+15.5
+4.75
–4.75
+14.5
+5.0
–5.2
+15
+5.25
–5.45
+15.5
+4.9
–4.9
+14.5
+5.0
–5.2
+15
+5.25
–5.45
+15.5
Volts
Volts
Volts
—
—
+14.5
—
—
+250
–200
+15
2.0
—
+260
–210
+15.5
2.25
±0.1
—
—
+14.5
—
—
+250
–200
+15
2.0
—
+260
–210
+15.5
2.25
±0.1
—
—
+14.5
—
—
+250
–200
+15
2.0
—
+260
–210
+15.5
2.25
±0.1
mA
mA
Volts
Watts
%FSR/%V
Footnotes:
➀ All power supplies should be on before applying a start convert pulse. All
supplies and the clock (start convert pulses) must be present during warmup
periods. The device must be continuously converting during this time.
➁ Contact Murata Power Solutions for other input voltage ranges.
➃ Effective bits is equal to:
(SNR + Distortion) – 1.76 +
20 log
Full Scale Amplitude
Actual Input Amplitude
6.02
➂ A 50ns wide start convert pulse is used for all production testing. For
applications requiring less than an 12.8MHz sampling rate, wider start convert
pulses can be used. The rising edge of the start convert pulse needs to be as
sharp as possible (<10 ns). Otherwise, a degradation in performance can result
from a slow rising edge pulse.
TECHNICAL NOTES
1.Obtaining fully specified performance from the ADS-949
requires careful attention to pc card layout and power
supply decoupling. The device’s analog and digital
ground systems are connected to each other internally.
For optimal performance, tie all ground pins (26 and 29)
directly to a large analog ground plane beneath the
package.
Bypass all power supplies to ground with 4.7µF tantalum
capacitors in parallel with 0.1µF ceramic capacitors. Locate
the bypass capacitors as close to the unit as possible.
2. The ADS-949 achieves its specified accuracies without
the need for external calibration. It is recommended that
the +5VA and +5VD supplies should be powered up from
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the same source. If required, the device’s small initial
offset and gain errors can be reduced to zero using the
adjustment circuitry shown in Figure 2, 3.
When using this circuitry, or any similar offset and gain
calibration hardware, make adjustments following warmup.
To avoid interaction, always adjust offset before gain.
3. Applying a start convert pulse while a conversion is in
progress (EOC = logic 1) will initiate a new and inaccurate conversion cycle. Data for the interrupted and
subsequent conversions will be invalid.
4. A passive bandpass filter is used at the input of the
A/D for all production testing.
Technical enquiries email: [email protected], tel: +1 508 339 3000
MDC_ADS-949.B01 Page 3 of 8
ADS 949
14 Bit, 12.8MHz
Sampling A/D Converters
CALIBRATION PROCEDURE
Zero/Offset Adjust Procedure
Any offset and/or gain calibration procedures should not be
implemented until devices are fully warmed up. To avoid
interaction, offset must be adjusted before gain. The ranges of
adjustment for the circuits in Figures 2 and 3 are guaranteed to
compensate for the ADS-949’s initial accuracy errors and may not
be able to compensate for additional system errors.
1. Apply a train of pulses to the START CONVERT input
(pin 7) so the converter is continuously converting.
A/D converters are calibrated by positioning their digital outputs
exactly on the transition point between two adjacent digital
output codes. This can be accomplished by connecting LED’s
to the digital outputs and adjusting until certain LED’s “flicker”
equally between on and off. Other approaches employ digital
comparators or microcontrollers to detect when the outputs
change from one code to the next.
Gain Adjust Procedure
2. Apply +153µV to the ANALOG INPUT (pin 1).
3. Adjust the offset potentiometer until the output bits are
10 0000 0000 0000 and the LSB flickers between 0 and 1.
1. Apply +2.49954V to the ANALOG INPUT (pin 1).
2. Adjust the gain potentiometer until all output bits are 1’s and
the LSB flickers between 1 and 0.
3. To confirm proper operation of the device, vary the input signal
to obtain the output coding listed in Table 2.
Offset adjusting for the ADS-949 is normally accomplished at the
point where the MSB is a 1 and all other output bits are 0’s and
the LSB just changes from a 0 to a 1. This digital output transition
ideally occurs when the applied analog input is ­+½ LSB (+153µV).
Table 1. Gain and Zero Adjust
INPUT VOLTAGE
RANGE
Gain adjusting is accomplished when all bits are 1’s and the LSB
just changes from a 1 to a 0. This transition ideally occurs when
the analog input is at +full scale minus 1½ LSB's (+2.49954V).
ZERO ADJUST
+½ LSB
GAIN ADJUST
+FS –1½ LSB
+153µV
+2.49954V
±2.5V
–5V
+5VA
+5VD
+15V
4.7µF
+
4.7µF
+
0.1µF 0.1µF
3
–5V
4.7µF
+
4.7µF
+
0.1µF
0.1µF
28
30
29
+15V AGND +5VA
27
26
+5VD DGND
5 RANGE REF ➀
+5V
GAIN
ADJUST
20K
1VIN A
31 GAIN ADJUST
+5V
ZERO/
OFFSET
ADJUST
–5V
20k
21 BIT 3
20 BIT 4
2 VIN B
BIPOLAR
ANALOG
INPUT
19
18
17
16
15
14
13
12
11
10
8
ADS-949
4 OFFSET ADJUST
20k�
–5V
START
CONVERT
23 BIT 1 (MSB)
22 BIT 2
32 RANGE ➀
6 2.5V REF ➀
7 START CONVERT
9 ENABLE
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12
BIT 13
BIT 14 (LSB)
EOC
➀ Bypass Pins 5, 6, 32, with a 4.7µF to Analog Ground.
Note: The Voltage Value at Pin 32 (Range) sets the input voltage range of the ADS-949
eg: If Pin 6 (2.5V Reference Out) is tied to the Range Pin 32 (20k Pot is shorted), then
the input range of the ADS-949 becomes ±2.5V
If the 20k Pot is set at midrange then the input range of the ADS-949 becomes ±1.25V
Figure 2. Typical ADS-949 Bipolar Connection Diagram
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MDC_ADS-949.B01 Page 4 of 8
ADS 949
14 Bit, 12.8MHz
Sampling A/D Converters
THERMAL REQUIREMENTS
All MPS sampling A/D converters are fully characterized and
specified over operating temperature (case) ranges of 0 to +70°C
and –55 to +125°C. All room temperature (TA = +25°C) production
testing is performed without the use of heat sinks or forced air
cooling. Thermal impedance figures for each device are listed in
their respective specification tables.
These devices do not normally require heat sinks, however,
standard precautionary design and layout procedures should be
used to ensure devices do not overheat. The ground and power
planes beneath the package, as well as all pcb signal runs to and
from the device, should be as heavy as possible to help conduct
heat away from the package.
Electrically-insulating, thermally-conductive "pads" may be
installed underneath the package. Devices should be soldered to
boards rather than socketed, and of course, minimal air flow over
the surface can greatly help reduce the package temperature.
In more severe ambient conditions, the package/junction
temperature of a given device can be reduced dramatically
(typically 35%) by using one of MPS's HS Series heat sinks. See
Ordering Information for the assigned part number. See page
1-183 of the MPS Data Acquisition Components Catalog for more
information on the HS Series. Request MPS Application Note
AN8, "Heat Sinks for DIP Data Converters", or contact Murata
Power Solutions directly, for additional information.
Table 3. Output Coding
StRAIght Bin.
UNIPOLAR
INPUT VOLT. OUTPUT CODING
sCALE 0 TO +5vmsblsbmsblsb
INPUT VOLT.
BIPOLAR
±2.5vsCALE
+FS – 1 LSB
+7/8 FS
+3/4 FS
+1/2 FS
+1/4 FS
+1/8 FS
+1 LSB
0
+2.499695
+1.875000
+1.250000
0.000000
–1.250000
–1.875000
–2.499695
–2.500000
+4.999695
+4.375000
+3.75000
+2.500000
+1.250000
+0.625000
+0.000305
0.000000
11 1111 1111 1111
11 1000 0000 0000
11 0000 0000 0000
10 0000 0000 0000
01 0000 0000 0000
00 1000 0000 0000
00 0000 0000 0001
00 0000 0000 0000
01 1111 1111 1111
01 1000 0000 0000
01 0000 0000 0000
00 0000 0000 0000
11 0000 0000 0000
10 1000 0000 0000
10 0000 0000 0001
10 0000 0000 0000
OFF. BINARY
+FS – 1LSB
+3/4FS
+1/2FS
0
–1/2FS
–3/4FS
–FS+1LSB
–FS
TWO'S COMP.
–5V
+5VA
+5VD
+15V
4.7µF
+
4.7µF
+
0.1µF 0.1µF
+5V
GAIN
ADJUST
20K
5
3
RANGE REF ➀ –5V
1VIN A
UNIPOLAR
ANALOG
INPUT
4.7µF
+
4.7µF
+
0.1µF
0.1µF
28
30
29
+15V AGND +5VA
27
26
+5VD DGND
2 VIN B
31 GAIN ADJUST
+5V
ADS-949
ZERO/
OFFSET
ADJUST
–5V
20k
4 OFFSET ADJUST
20k�
–5V
START
CONVERT
32 RANGE ➀
6 2.5V REF ➀
7 START CONVERT
9 ENABLE
23
22
21
20
19
18
17
16
15
14
13
12
11
10
8
BIT 1 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12
BIT 13
BIT 14 (LSB)
EOC
Figure 3. Typical ADS-949 Unipolar Connection Diagram
➀ Bypass Pins 5, 6, 32 with a 4.7µF to Analog Ground.
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Technical
enquiries
email:
[email protected],
tel: +1 508 339 3000
Note: The Voltage Value at Pin 32 (Range) sets the input
voltage
range
of the
ADS-949
MDC_ADS-949.B01 Page 5 of 8
eg: If Pin 6 (2.5V Reference Out) is tied to the Range Pin 32 (20k Pot is shorted), then
the input range of the ADS-949 becomes 0 to 5V
If the 20k Pot is set at midrange then the input range of the ADS-949 becomes 0 to 2.5V
ADS 949
14 Bit, 12.8MHz
Sampling A/D Converters
Figure 4. FFT Analysis of ADS-949
Figure 5. ADS-949 Histogram
(fs = 12.8MHz, fin = 3.85MHz, Vin = –0.5dB, 16,384 point FFT)
START
CONVERT
Minimum is 40ns
N
N+1
40ns
EOC
40ns
60ns
DATA OUT
DATA N-3
DATA N-2
DATA N-1
DATA N
20ns
ENABLED
30ns
OUTPUT
DATA
ENABLED
DATA N-3
DATA N-2
HZ
DATA N-1
HZ
DATA N
HZ
HZ
20ns
Notes: 1. Scale is approximately 10ns per division. All values are Typical.
2. Rising edge of the start convert needs to be less than 10 ns.
Figure 6. ADS-949 Timing Diagram
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MDC_ADS-949.B01 Page 6 of 8
ADS 949
14 Bit, 12.8MHz
Sampling A/D Converters
CONTACT MURATA POWER SOLUTIONS FOR SCHEMATIC
Figure 7. ADS-949 Evaluation Board Schematic (ADS-B949)
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MDC_ADS-949.B01 Page 7 of 8
ADS 949
14 Bit, 12.8MHz
Sampling A/D Converters
MECHANICAL DIMENSIONS
INCHES (mm)
1.62 MAX.
(41.15)
Dimension Tolerances
(unless otherwise indicated):
2 place decimal (.XX) ±0.010 (±0.254)
3 place decimal (.XXX) ±0.005 (±0.127)
0.92 MAX.
(23.37)
Lead Material: Kovar Alloy
Lead Finish: 50 microinches (minimum)
gold plating over 100 microinches
(nominal) nickel plating
1.50 TYP
(38.10)
SEATING PLANE
0.05 TYP.
(1.27)
0.220 TYP.
(6.86)
PIN 1 INDEX
0.010 TYP.
(0.254)
0.05 TYP.
(1.27)
0.018 TYP.
(0.46)
0.100 TYP.
(2.54)
0.90 TYP.
(22.86)
0.175 TYP
(4.45)
0.05 TYP.
(1.27)
ORDERING INFORMATION
MODEL
ADS-949MC
ADS-949MM
ADS-949/883
ADS-949GC
ADS-949GM
OPERATING
TEMP. RANGE
0 to +70°C
–55 to +125°C
–55 to +125°C
0 to +70°C
–55 to +125°C
32-PIN
PACKAGE
TDIP
TDIP
TDIP
SMT
SMT
ACCESSORIES
ADS-B949
HS-32
Evaluation Board (without ADS-949)
Heat sink for ADS-949 TDIP models
Receptacles for PC board mounting can be ordered through AMP, Inc., Part # 3-331272-8 (Component Lead Socket),
32 required. For MIL-STD-883 product specifcation, contact Murata Power Solutions.
ISO 9001 REGISTERED
Tucson (AZ), Tel: (800) 547 2537, email: [email protected]
Canada:
Toronto, Tel: (866) 740 1232, email: [email protected]
UK:
Milton Keynes, Tel: +44 (0)1908 615232, email: [email protected]
France:
Montigny Le Bretonneux, Tel: +33 (0)1 34 60 01 01, email: [email protected]
Germany: München, Tel: +49 (0)89-544334-0, email: [email protected]
Murata Power Solutions, Inc.
11 Cabot Boulevard, Mansfield, MA 02048-1151 U.S.A.
Tel: (508) 339-3000 (800) 233-2765 Fax: (508) 339-6356
www.murata-ps.com
USA:
email: [email protected]
3/14/08
Japan:
Tokyo, Tel: 3-3779-1031, email: [email protected]
Osaka, Tel: 6-6354-2025, email: [email protected]
Website: www.murata-ps.jp
China:
Shanghai, Tel: +86 215 027 3678, email: [email protected]
Guangzhou, Tel: +86 208 221 8066, email: [email protected]
Murata Power Solutions, Inc. makes no representation that the use of its products in the circuits described herein, or the use of other
technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein do not
imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. Specifications are subject to change
without notice.
© 2008 Murata Power Solutions, Inc.
www.murata-ps.com
Technical enquiries email: [email protected], tel: +1 508 339 3000
MDC_ADS-949.B01 Page 8 of 8
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