IPD50R950CE,IPU50R950CE MOSFET 500VCoolMOSªCEPowerTransistor DPAK CoolMOS™isarevolutionarytechnologyforhighvoltagepower MOSFETs,designedaccordingtothesuperjunction(SJ)principleand pioneeredbyInfineonTechnologies.CoolMOS™CEisa price-performanceoptimizedplatformenablingtotargetcostsensitive applicationsinConsumerandLightingmarketsbystillmeetinghighest efficiencystandards.Thenewseriesprovidesallbenefitsofafast switchingSuperjunctionMOSFETwhilenotsacrificingeaseofuseand offeringthebestcostdownperformanceratioavailableonthemarket. Features IPAK tab 1 tab 2 1 3 2 3 Drain Pin 2 Gate Pin 1 •ExtremelylowlossesduetoverylowFOMRdson*QgandEoss •Veryhighcommutationruggedness •Easytouse/drive •Pb-freeplating,Halogenfreemoldcompound •Qualifiedforstandardgradeapplications Source Pin 3 Applications PFCstages,hardswitchingPWMstagesandresonantswitchingstages fore.g.PCSilverbox,Adapter,LCD&PDPTVandindoorlighting. Pleasenote:ForMOSFETparallelingtheuseofferritebeadsonthegate orseparatetotempolesisgenerallyrecommended. Table1KeyPerformanceParameters Parameter Value Unit VDS @ Tj,max 550 V RDS(on),max 0.95 Ω ID 6.6 A Qg,typ 10.5 nC ID,pulse 12.8 A Eoss @ 400V 1.28 µJ Type/OrderingCode Package IPD50R950CE PG-TO 252 IPU50R950CE PG-TO 251 Final Data Sheet Marking 50S950CE 1 RelatedLinks see Appendix A Rev.2.3,2016-06-13 500VCoolMOSªCEPowerTransistor IPD50R950CE,IPU50R950CE TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Test Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Appendix A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Final Data Sheet 2 Rev.2.3,2016-06-13 500VCoolMOSªCEPowerTransistor IPD50R950CE,IPU50R950CE 1Maximumratings atTj=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Continuous drain current1) Values Unit Note/TestCondition 6.6 4.2 A TC = 25°C TC = 100°C - 12.8 A TC=25°C - - 68 mJ ID =1.6A; VDD = 50V EAR - - 0.10 mJ ID =1.6A; VDD = 50V Avalanche current, repetitive IAR - - 1.6 A - MOSFET dv/dt ruggedness dv/dt - - 50 V/ns VDS=0...400V Gate source voltage VGS -20 -30 - 20 30 V static; AC (f>1 Hz) Power dissipation (non FullPAK) TO-252, TO-251 Ptot - - 53 W TC=25°C Operating and storage temperature Tj,Tstg -55 - 150 °C - Continuous diode forward current IS - - 4.6 A TC=25°C Diode pulse current IS,pulse - - 12.8 A TC = 25°C Reverse diode dv/dt3) dv/dt - - 15 V/ns VDS=0...400V,ISD<=IS,Tj=25°C, tcond<2µs Maximum diode commutation speed3) dif/dt - - 500 A/µs VDS=0...400V,ISD<=IS,Tj=25°C, tcond<2µs Unit Note/TestCondition Min. Typ. Max. ID - - Pulsed drain current2) ID,pulse - Avalanche energy, single pulse EAS Avalanche energy, repetitive 2) 2Thermalcharacteristics Table3ThermalcharacteristicsDPAK,IPAK Parameter Symbol Thermal resistance, junction - case Values Min. Typ. Max. RthJC - - 2.35 °C/W - Thermal resistance, junction - ambient RthJA - 35 62 - SMD version, device on PCB, minimal footprint °C/W SMD version, device on PCB, 6cm2 cooling area4) Soldering temperature, wave- & reflowsoldering allowed - - 260 °C 4) Tsold reflow MSL 1 1) Limited by Tj max <150°C, Maximum Duty Cycle D = 0.5 Pulse width tp limited by Tj,max 3) VDClink=400V;VDS,peak<V(BR)DSS;identicallowsideandhighsideswitchwithidenticalRG 4) Device on 40mm*40mm*1.5mm one layer epoxy PCB FR4 with 6cm2 copper area (thickness 70µm) for drain connection. PCB is vertical without air stream cooling. 2) Final Data Sheet 3 Rev.2.3,2016-06-13 500VCoolMOSªCEPowerTransistor IPD50R950CE,IPU50R950CE 3Electricalcharacteristics Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=1mA 3 3.50 V VDS=VGS,ID=0.1mA - 10 1 - µA VDS=500V,VGS=0V,Tj=25°C VDS=500V,VGS=0V,Tj=150°C IGSS - - 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 0.86 2.25 0.95 - Ω VGS=13V,ID=1.2A,Tj=25°C VGS=13V,ID=1.2A,Tj=150°C Gate resistance RG - 3 - Ω f=1MHz,opendrain Unit Note/TestCondition Min. Typ. Max. V(BR)DSS 500 - Gate threshold voltage V(GS)th 2.50 Zero gate voltage drain current IDSS Gate-source leakage curent Table5Dynamiccharacteristics Parameter Symbol Input capacitance Values Min. Typ. Max. Ciss - 231 - pF VGS=0V,VDS=100V,f=1MHz Output capacitance Coss - 19 - pF VGS=0V,VDS=100V,f=1MHz Effective output capacitance, energy related1) Co(er) - 16 - pF VGS=0V,VDS=0...400V Effective output capacitance, time related2) Co(tr) - 62 - pF ID=constant,VGS=0V,VDS=0...400V Turn-on delay time td(on) - 7 - ns VDD=400V,VGS=13V,ID=1.6A, RG=5.3Ω Rise time tr - 4.9 - ns VDD=400V,VGS=13V,ID=1.6A, RG=5.3Ω Turn-off delay time td(off) - 25 - ns VDD=400V,VGS=13V,ID=1.6A, RG=5.3Ω Fall time tf - 19.5 - ns VDD=400V,VGS=13V,ID=1.6A, RG=5.3Ω Unit Note/TestCondition Table6Gatechargecharacteristics Parameter Symbol Gate to source charge Values Min. Typ. Max. Qgs - 1.3 - nC VDD=400V,ID=1.6A,VGS=0to10V Gate to drain charge Qgd - 5.9 - nC VDD=400V,ID=1.6A,VGS=0to10V Gate charge total Qg - 10.5 - nC VDD=400V,ID=1.6A,VGS=0to10V Gate plateau voltage Vplateau - 5.4 - V VDD=400V,ID=1.6A,VGS=0to10V 1) Co(er)isafixedcapacitancethatgivesthesamestoredenergyasCosswhileVDSisrisingfrom0to80%V(BR)DSS Co(tr)isafixedcapacitancethatgivesthesamechargingtimeasCosswhileVDSisrisingfrom0to80%V(BR)DSS 2) Final Data Sheet 4 Rev.2.3,2016-06-13 500VCoolMOSªCEPowerTransistor IPD50R950CE,IPU50R950CE Table7Reversediodecharacteristics Parameter Symbol Diode forward voltage Values Unit Note/TestCondition - V VGS=0V,IF=1.6A,Tf=25°C 140 - ns VR=400V,IF=1.6A,diF/dt=100A/µs - 0.7 - µC VR=400V,IF=1.6A,diF/dt=100A/µs - 8.5 - A VR=400V,IF=1.6A,diF/dt=100A/µs Min. Typ. Max. VSD - 0.83 Reverse recovery time trr - Reverse recovery charge Qrr Peak reverse recovery current Irrm Final Data Sheet 5 Rev.2.3,2016-06-13 500VCoolMOSªCEPowerTransistor IPD50R950CE,IPU50R950CE 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation Diagram2:Safeoperatingarea 102 60 50 101 1 µs 40 ID[A] Ptot[W] 10 µs 30 100 1 ms 100 µs 10 ms 20 DC 10-1 10 0 0 40 80 120 10-2 160 100 101 TC[°C] 102 103 VDS[V] Ptot=f(TC) ID=f(VDS);TC=25°C;D=0;parameter:tp Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 2 101 10 101 0.5 100 10 µs 100 1 ms 100 µs 10 ms 10-1 10-2 0.2 0.1 ZthJC[K/W] ID[A] 1 µs 0.05 0.02 0.01 10-1 single pulse DC 100 101 102 103 10-2 10-5 10-4 VDS[V] 10-2 10-1 tp[s] ID=f(VDS);TC=80°C;D=0;parameter:tp Final Data Sheet 10-3 ZthJC=f(tP);parameter:D=tp/T 6 Rev.2.3,2016-06-13 500VCoolMOSªCEPowerTransistor IPD50R950CE,IPU50R950CE Typ.outputcharacteristicsTj=25°C Typ.outputcharacteristicsTj=125°C 16 10 9 14 20 V 10 V 20 V 8 12 10 V 7 10 6 ID[A] ID[A] 8V 8V 8 7V 7V 5 4 6 6V 3 4 5.5 V 6V 2 5.5 V 2 5V 5V 4.5 V 1 4.5 V 0 0 5 10 15 0 20 0 5 10 VDS[V] 15 20 VDS[V] ID=f(VDS);Tj=25°C;parameter:VGS ID=f(VDS);Tj=125°C;parameter:VGS Typ.drain-sourceon-stateresistance Drain-sourceon-stateresistance 3.40 3.00 2.80 3.20 2.60 5V 5.5 V 6V 6.5 V 3.00 7V 2.40 2.20 2.80 2.00 RDS(on)[Ω] RDS(on)[Ω] 1.80 2.60 10 V 2.40 2.20 98% 1.60 typ 1.40 1.20 1.00 0.80 2.00 0.60 0.40 1.80 0.20 1.60 0 2 4 6 8 0.00 -50 -25 0 25 ID[A] 75 100 125 150 175 Tj[°C] RDS(on)=f(ID);Tj=125°C;parameter:VGS Final Data Sheet 50 RDS(on)=f(Tj);ID=1.2A;VGS=13V 7 Rev.2.3,2016-06-13 500VCoolMOSªCEPowerTransistor IPD50R950CE,IPU50R950CE Typ.transfercharacteristics Typ.gatecharge 14 10 9 25 °C 12 120 V 8 10 7 400 V 6 VGS[V] ID[A] 8 150 °C 6 5 4 3 4 2 2 1 0 0 2 4 6 8 0 10 0 4 VGS[V] 8 12 Qgate[nC] ID=f(VGS);VDS=20V;parameter:Tj VGS=f(Qgate);ID=1.6Apulsed;parameter:VDD Avalancheenergy Drain-sourcebreakdownvoltage 80 580 560 540 VBR(DSS)[V] EAS[mJ] 60 40 520 500 480 20 460 0 0 25 50 75 100 125 150 175 440 -60 -20 Tj[°C] 60 100 140 180 Tj[°C] EAS=f(Tj);ID=1.6A;VDD=50V Final Data Sheet 20 VBR(DSS)=f(Tj);ID=1mA 8 Rev.2.3,2016-06-13 500VCoolMOSªCEPowerTransistor IPD50R950CE,IPU50R950CE Typ.capacitances Typ.Cossstoredenergy 4 10 2.00 1.80 1.60 103 1.40 1.20 Eoss[µJ] C[pF] Ciss 102 1.00 0.80 Coss 0.60 101 0.40 Crss 0.20 100 0 100 200 300 400 500 0.00 0 VDS[V] 100 200 300 400 500 VDS[V] C=f(VDS);VGS=0V;f=1MHz Eoss=f(VDS) Forwardcharacteristicsofreversediode 102 IF[A] 101 125 °C 25 °C 100 10-1 0.4 0.6 0.8 1.0 1.2 1.4 VSD[V] IF=f(VSD);parameter:Tj Final Data Sheet 9 Rev.2.3,2016-06-13 500VCoolMOSªCEPowerTransistor IPD50R950CE,IPU50R950CE 5TestCircuits Table8Diodecharacteristics Test circuit for diode characteristics Diode recovery waveform V ,I Rg1 VDS( peak) VDS VDS VDS trr IF Rg 2 tF tS dIF / dt IF QF IF dIrr / dt trr =tF +tS Qrr = QF + QS Irrm Rg1 = Rg 2 t 10 %Irrm QS Table9Switchingtimes Switching times test circuit for inductive load Switching times waveform VDS 90% VDS VGS VGS 10% td(on) ton tr td(off) tf toff Table10Unclampedinductiveload Unclamped inductive load test circuit Unclamped inductive waveform V(BR)DS ID VDS VDS Final Data Sheet 10 ID VDS Rev.2.3,2016-06-13 500VCoolMOSªCEPowerTransistor IPD50R950CE,IPU50R950CE 6PackageOutlines *) mold flash not included DIM A A1 b b2 b3 c c2 D D1 E E1 e e1 N H L L3 L4 F1 F2 F3 F4 F5 F6 MILLIMETERS MIN MAX 2.16 2.41 0.00 0.15 0.64 0.89 0.65 1.15 5.00 5.50 0.46 0.60 0.46 0.98 5.97 6.22 5.02 5.84 6.40 6.73 4.70 5.60 2.29 (BSC) 4.57 (BSC) 3 9.40 10.48 1.18 1.70 0.90 1.25 0.51 1.00 10.60 6.40 2.20 5.80 5.76 1.20 INCHES MIN 0.085 0.000 0.025 0.026 0.197 0.018 0.018 0.235 0.198 0.252 0.185 0.370 0.046 0.035 0.020 MAX 0.095 0.006 0.035 0.045 0.217 0.024 0.039 0.245 0.230 0.265 0.220 0.090 (BSC) 0.180 (BSC) 3 0.413 0.067 0.049 0.039 0.417 0.252 0.087 0.228 0.227 0.047 DOCUMENT NO. Z8B00003328 SCALE 0 2.0 0 2.0 4mm EUROPEAN PROJECTION ISSUE DATE 01-09-2015 REVISION 05 Figure1OutlinePG-TO252,dimensionsinmm/inches Final Data Sheet 11 Rev.2.3,2016-06-13 500VCoolMOSªCEPowerTransistor IPD50R950CE,IPU50R950CE TO251-3-21/-341/-345 DOCUMENT NO. Z8B00003330 DIM A A1 b b2 b4 c c2 D D1 E E1 e e1 N L L1 L2 MILLIMETERS MIN 2.16 0.90 0.64 0.65 4.95 0.46 0.46 5.97 5.04 6.35 4.70 INCHES MAX 2.41 1.14 0.89 1.15 5.50 0.60 0.89 6.22 5.77 6.73 5.21 MIN 0.085 0.035 0.025 0.026 0.195 0.018 0.018 0.235 0.198 0.250 0.185 2.29 4.57 3 8.89 0.85 0.89 MAX 0.095 0.045 0.035 0.045 0.217 0.024 0.035 0.245 0.227 0.265 0.205 0.090 0.180 3 9.65 2.29 1.37 0.350 0.033 0.035 SCALE 0 2.0 0 2.0 4mm EUROPEAN PROJECTION ISSUE DATE 31-08-2015 0.380 0.090 0.054 REVISION 04 Figure2OutlinePG-TO251,dimensionsinmm/inches Final Data Sheet 12 Rev.2.3,2016-06-13 500VCoolMOSªCEPowerTransistor IPD50R950CE,IPU50R950CE 7AppendixA Table11RelatedLinks • IFXCoolMOSWebpage:www.infineon.com • IFXDesigntools:www.infineon.com Final Data Sheet 13 Rev.2.3,2016-06-13 500VCoolMOSªCEPowerTransistor IPD50R950CE,IPU50R950CE RevisionHistory IPD50R950CE, IPU50R950CE Revision:2016-06-13,Rev.2.3 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2012-08-24 Release of final version 2.1 2013-07-16 update to Halogen free mold compound 2.2 2015-11-17 Updated to standard grade qualification & updated package drawing 2.3 2016-06-13 Updated ID ratings, Zth, SOA and Pd curves TrademarksofInfineonTechnologiesAG AURIX™,C166™,CanPAK™,CIPOS™,CoolGaN™,CoolMOS™,CoolSET™,CoolSiC™,CORECONTROL™,CROSSAVE™,DAVE™,DI-POL™,DrBlade™, EasyPIM™,EconoBRIDGE™,EconoDUAL™,EconoPACK™,EconoPIM™,EiceDRIVER™,eupec™,FCOS™,HITFET™,HybridPACK™,Infineon™, ISOFACE™,IsoPACK™,i-Wafer™,MIPAQ™,ModSTACK™,my-d™,NovalithIC™,OmniTune™,OPTIGA™,OptiMOS™,ORIGA™,POWERCODE™, PRIMARION™,PrimePACK™,PrimeSTACK™,PROFET™,PRO-SIL™,RASIC™,REAL3™,ReverSave™,SatRIC™,SIEGET™,SIPMOS™,SmartLEWIS™, SOLIDFLASH™,SPOC™,TEMPFET™,thinQ™,TRENCHSTOP™,TriCore™. TrademarksupdatedAugust2015 OtherTrademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. WeListentoYourComments Anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?Yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.Pleasesendyourproposal(includingareferencetothisdocument)to: [email protected] Publishedby InfineonTechnologiesAG 81726München,Germany ©2016InfineonTechnologiesAG AllRightsReserved. LegalDisclaimer Theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics.With respecttoanyexamplesorhintsgivenherein,anytypicalvaluesstatedhereinand/oranyinformationregardingtheapplication ofthedevice,InfineonTechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithout limitation,warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty. Information Forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestInfineon TechnologiesOffice(www.infineon.com). Warnings Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion, pleasecontactthenearestInfineonTechnologiesOffice. TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 14 Rev.2.3,2016-06-13