PulseCore ASM3P2775A Low power peak emi reducing solution Datasheet

ASM3P2775A
November 2006
rev 0.3
Low Power Peak EMI Reducing Solution
Features
•
The ASM3P2775A uses the most efficient and optimized
modulation profile approved by the FCC and is
Generates an EMI optimized clock signal at the
implemented by using a proprietary all digital method.
output.
•
Integrated loop filter components.
•
Operates with a 3.3V Supply.
•
Operating current less than 4mA.
•
Low power CMOS design.
•
Input frequency range: 13MHz to 30MHz
•
Generates a 1X low EMI spread spectrum clock
The ASM3P2775A modulates the output of a single PLL
in order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
of the input frequency.
•
EMI by increasing a signal’s bandwidth is called ‘spread
Frequency deviation: ±1.75% (Typ) @14.7MHz
spectrum clock generation’.
Input Frequency.
Available in 6-pin TSOT-23, 8-pin SOIC and 8-
•
Applications
pin TSSOP packages.
The ASM3P2775A is targeted towards all portable
Product Description
devices with very low power requirements like MP3
players and digital still cameras.
The ASM3P2775A is a versatile spread spectrum
frequency modulator designed specifically for a wide
Key Specifications
range of clock frequencies. The ASM3P2775A reduces
electromagnetic interference (EMI) at the clock source,
allowing system wide reduction of EMI of
Description
all clock
Specification
dependent signals. The ASM3P2775A allows significant
Supply voltages
VDD = 3.3V ± 0.3V
system cost savings by reducing the number of circuit
Cycle-to-Cycle Jitter
200pS (Max)
board layers, ferrite beads and shielding that are
Output Duty Cycle
45/55% (worst case)
traditionally required to pass EMI regulations.
Modulation Rate Equation
FIN/640
Frequency Deviation
±1.75% (Typ) @ 14.7MHz
Block Diagram
VDD
PD
PLL
Modulation
XIN/CLKIN
XOUT
Crystal
Oscillator
Frequency
Divider
Feedback
Divider
Phase
Detector
Loop
Filter
VCO
Output
Divider
VSS
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200 Campbell, CA 95008 • Tel: 408-879-9077 • Fax: 408-879-9018
www.pulsecoresemi.com
Notice: The information in this document is subject to change without notice.
ModOUT
ASM3P2775A
November 2006
rev 0.3
Pin Configuration (6-pin TSOT- 23 Package)
PD 1
XOUT
2
6
VSS
5
ModOUT
4
VDD
ASM3P2775A
XIN / CLKIN 3
Pin Description
Pin#
Pin Name
Type
Description
Power-down control pin. Pull low to enable power-down mode. Connect to VDD if not
used.
1
PD
I
2
XOUT
O
Crystal connection. If using an external reference, this pin must be left unconnected.
3
XIN / CLKIN
I
Crystal connection or external reference frequency input. This pin has dual functions. It
can be connected either to an external crystal or an external reference clock.
4
VDD
P
Power supply for the entire chip.
5
ModOUT
O
Spread spectrum clock output.
6
VSS
P
Ground connection.
Pin Configuration (8-pin SOIC and TSSOP Package)
8
VDD
7
NC
PD 3
6
ModOUT
NC 4
5
VSS
XIN / CLKIN 1
XOUT 2
ASM3P2775A
Pin Description
Pin#
Pin Name
Type
Description
1
XIN/CLKIN
I
Crystal connection or external reference frequency input. This pin has dual functions. It
can be connected either to an external crystal or an external reference clock.
2
XOUT
O
Crystal connection. If using an external reference, this pin must be left unconnected.
3
PD
I
Power-down control pin. Pull low to enable power-down mode. Connect to VDD if not
used.
4
NC
–
No connect.
5
VSS
P
Ground connection.
6
ModOUT
O
Spread spectrum clock output.
7
NC
–
No connect.
8
VDD
P
Power supply for the entire chip.
Low Power Peak EMI Reducing Solution
Notice: The information in this document is subject to change without notice.
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ASM3P2775A
November 2006
rev 0.3
Modulation Profile
Specifications
Description
Specification
Frequency Range
13MHz < CLKIN < 30MHz
Modulation Equation
FIN/640
Frequency Deviation
±1.75% (Typ) @ 14.7MHz
Absolute Maximum Ratings
Symbol
Parameter
Rating
Unit
VDD, VIN
Voltage on any pin with respect to Ground
-0.5 to +4.6
V
Storage temperature
-65 to +125
°C
TA
Operating temperature
-40 to +85
°C
Ts
Max. Soldering Temperature (10 sec)
260
°C
TJ
Junction Temperature
150
°C
2
KV
TSTG
TDV
Static Discharge Voltage
(As per JEDEC STD22- A114-B)
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
Low Power Peak EMI Reducing Solution
Notice: The information in this document is subject to change without notice.
3 of 10
ASM3P2775A
November 2006
rev 0.3
DC Electrical Characteristics
(Test condition: All parameters are measured at room temperature (+25°C) unless otherwise stated)
Symbol
Parameter
Min
Typ
Max
Unit
VIL
Input low voltage
VSS - 0.3
–
0.8
V
VIH
Input high voltage
2.0
–
VDD + 0.3
V
IIL
Input low current
–
–
-35
µA
IIH
Input high current
–
–
35
µA
IXOL
XOUT output low current (@0.4V, VDD=3.3V)
–
3
–
mA
IXOH
XOUT output high current (@2.5V, VDD=3.3V)
–
3
–
mA
VOL
Output low voltage (VDD = 3.3 V, IOL = 8 mA)
–
–
0.4
V
VOH
Output high voltage (VDD = 3.3 V, IOH = 8 mA)
2.5
–
–
V
IDD
Static supply current*
–
–
10
uA
ICC
Dynamic supply current (3.3V, 16MHz and no load)
–
3.5
–
mA
3.0
3.3
3.6
V
VDD
tON
ZOUT
Operating voltage
Power-up time (first locked cycle after power-up)**
–
–
5
mS
Output impedance
–
45
–
Ω
* XIN /CLKIN pin and PD pin are pulled low
** VDD and XIN/CLKIN input are stable, PD pin is made high from low.
AC Electrical Characteristics
Symbol
CLKIN
ModOUT
fd
Parameter
Input frequency
Output frequency
Frequency Deviation
Input Frequency = 13MHz
Input Frequency = 30MHz
Min
Typ
Max
Unit
13
–
30
MHz
13
–
30
MHz
–
–
±1.8%
±1.1%
–
–
%
tLH*
Output rise time (measured from 0.8 to 2.0V)
0.5
1.1
1.3
nS
tHL *
Output fall time (measured at 2.0V to 0.8V)
0.3
0.8
1.0
nS
tJC
Jitter (cycle to cycle)
–
200
–
pS
tD
Output duty cycle
45
50
55
%
*tLH and tHL are measured into a capacitive load of 15pF
Low Power Peak EMI Reducing Solution
Notice: The information in this document is subject to change without notice.
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ASM3P2775A
November 2006
rev 0.3
Typical Crystal Oscillator Circuit
Crystal
C1 = 27 pF
R1 = 510Ω
C2 = 27 pF
Typical Crystal Specifications
Fundamental AT cut parallel resonant crystal
Nominal frequency
14.31818MHz
Frequency tolerance
± 50 ppm or better at 25°C
Operating temperature range
-25°C to +85°C
Storage temperature
-40°C to +85°C
Load capacitance
18pF
Shunt capacitance
7pF maximum
ESR
25 Ω
Low Power Peak EMI Reducing Solution
Notice: The information in this document is subject to change without notice.
5 of 10
ASM3P2775A
November 2006
rev 0.3
Package Information
6-pin TSOT-23 Package
Dimensions
Symbol
Inches
Min
Max
Millimeters
Min
Max
A
…..
0.04
……
1.00
A1
0.00
0.004
0.00
0.10
A2
0.033
0.036
0.84
0.90
b
0.012
0.02
0.30
0.50
H
0.005 BSC
0.127 BSC
D
0.114 BSC
2.90 BSC
B
0.06 BSC
1.60 BSC
e
0.0374 BSC
0.950 BSC
C
0.11 BSC
2.80 BSC
L
0.0118
0.02
0.30
0.50
θ
0°
4°
0°
4°
Low Power Peak EMI Reducing Solution
Notice: The information in this document is subject to change without notice.
6 of 10
ASM3P2775A
November 2006
rev 0.3
8-Pin SOIC Package
H
E
D
A2
A
C
A1
D
θ
e
L
B
Dimensions
Symbol
Inches
Millimeters
Min
Max
Min
Max
A1
0.004
0.010
0.10
0.25
A
0.053
0.069
1.35
1.75
A2
0.049
0.059
1.25
1.50
B
0.012
0.020
0.31
0.51
C
0.007
0.010
0.18
0.25
D
0.193 BSC
4.90 BSC
E
0.154 BSC
3.91 BSC
e
0.050 BSC
1.27 BSC
H
0.236 BSC
6.00 BSC
L
0.016
0.050
0.41
1.27
θ
0°
8°
0°
8°
Low Power Peak EMI Reducing Solution
Notice: The information in this document is subject to change without notice.
7 of 10
ASM3P2775A
November 2006
rev 0.3
8-Pin TSSOP Package
H
E
D
A2
A
C
θ
e
A1
L
B
Dimensions
Symbol
Inches
Millimeters
Min
Max
Min
Max
A
……
0.043
……
1.10
A1
0.002
0.006
0.05
0.15
A2
0.033
0.037
0.85
0.95
B
0.008
0.012
0.19
0.30
c
0.004
0.008
0.09
0.20
D
0.114
0.122
2.90
3.10
E
0.169
0.177
4.30
4.50
e
0.026 BSC
0.65 BSC
H
0.252 BSC
6.40 BSC
L
0.020
0.028
0.50
0.70
θ
0°
8°
0°
8°
Low Power Peak EMI Reducing Solution
Notice: The information in this document is subject to change without notice.
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ASM3P2775A
November 2006
rev 0.3
Ordering Information
Part Number
Marking
Package Type
Temperature
ASM3P2775AF-06OR
X4LL
6-Pin TSOT-23, TAPE & REEL, Pb Free
Commercial
ASM3P2775AF-08TT
3P2775AF
8-Pin TSSOP, TUBE, Pb Free
Commercial
ASM3P2775AF-08TR
3P2775AF
8-Pin TSSOP, TAPE & REEL, Pb Free
Commercial
ASM3P2775AF-08ST
3P2775AF
8-Pin SOIC, TUBE, Pb Free
Commercial
ASM3P2775AF-08SR
3P2775AF
8-Pin SOIC, TAPE & REEL, Pb Free
Commercial
ASM3P2775AG-06OR
X3LL
6-Pin TSOT-23, TAPE & REEL, Green
Commercial
ASM3P2775AG-08TT
3P2775AG
8-Pin TSSOP, TUBE, Green
Commercial
ASM3P2775AG-08TR
3P2775AG
8-Pin TSSOP, TAPE & REEL, Green
Commercial
ASM3P2775AG-08ST
3P2775AG
8-Pin SOIC, TUBE, Green
Commercial
ASM3P2775AG-08SR
3P2775AG
8-Pin SOIC, TAPE & REEL, Green
Commercial
Device Ordering Information
A S M 3 P 2 7 7 5 A G - 0 8 T R
R = Tape & Reel, T = Tube or Tray
O = SOT
S = SOIC
T = TSSOP
A = SSOP
V = TVSOP
B = BGA
Q = QFN
U = MSOP
E = TQFP
L = LQFP
U = MSOP
P = PDIP
D = QSOP
X = SC-70
DEVICE PIN COUNT
F = LEAD FREE AND RoHS COMPLIANT PART
G = GREEN PACKAGE, LEAD FREE, and RoHS
PART NUMBER
X= Automotive
I= Industrial
P or n/c = Commercial
(-40C to +125C) (-40C to +85C)
(0C to +70C)
1 = Reserved
2 = Non PLL based
3 = EMI Reduction
4 = DDR support products
5 = STD Zero Delay Buffer
6 = Power Management
7 = Power Management
8 = Power Management
9 = Hi Performance
0 = Reserved
PulseCore Semiconductor Mixed Signal Product
Licensed under U.S Patent Nos 5,488,627 and 5,631,921
Low Power Peak EMI Reducing Solution
Notice: The information in this document is subject to change without notice.
9 of 10
ASM3P2775A
November 2006
rev 0.3
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200
Campbell, CA 95008.
Tel: 408-879-9077
Fax: 408-879-9018
www.pulsecoresemi.com
Copyright © Alliance Semiconductor
All Rights Reserved
Preliminary Information
Part Number: ASM3P2775A
Document Version: v0.3
Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003
© Copyright 2006 PulseCore Semiconductor Corporation. All rights reserved. Our logo and name are trademarks or registered
trademarks of PulseCore Semiconductor. All other brand and product names may be the trademarks of their respective
companies. PulseCore reserves the right to make changes to this document and its products at any time without notice.
PulseCore assumes no responsibility for any errors that may appear in this document. The data contained herein represents
PulseCore’s best data and/or estimates at the time of issuance. PulseCore reserves the right to change or correct this data at
any time, without notice. If the product described herein is under development, significant changes to these specifications are
possible. The information in this product data sheet is intended to be general descriptive information for potential customers
and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. PulseCore does
not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims
any express or implied warranties related to the sale and/or use of PulseCore products including liability or warranties related
to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed
to in PulseCore’s Terms and Conditions of Sale (which are available from PulseCore). All sales of PulseCore products are
made exclusively according to PulseCore’s Terms and Conditions of Sale. The purchase of products from PulseCore does not
convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of
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where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of
PulseCore products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to
indemnify PulseCore against all claims arising from such use.
Low Power Peak EMI Reducing Solution
Notice: The information in this document is subject to change without notice.
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