Fairchild FQI9N50C 500v n-channel mosfet Datasheet

TM
FQB9N50C/FQI9N50C
500V N-Channel MOSFET
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switched mode power supplies,
active power factor correction, electronic lamp ballasts
based on half bridge topology.
•
•
•
•
•
•
9 A, 500V, RDS(on) = 0.8 Ω @VGS = 10 V
Low gate charge ( typical 28 nC)
Low Crss ( typical 24 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
D
!
D
"
G
S
FQB Series
G D S
"
"
G!
I2-PAK
D2-PAK
! "
FQI Series
!
S
Absolute Maximum Ratings
Symbol
VDSS
ID
TC = 25°C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (TC = 25°C)
Drain Current
FQB9N50C/FQI9N50C
500
- Continuous (TC = 100°C)
Units
V
9
A
5.4
A
36
A
IDM
Drain Current
VGSS
Gate-Source Voltage
EAS
Single Pulsed Avalanche Energy
(Note 2)
IAR
Avalanche Current
(Note 1)
9
A
EAR
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TC = 25°C)
(Note 1)
13.5
4.5
135
1.07
-55 to +150
mJ
V/ns
W
W/°C
°C
300
°C
dv/dt
PD
TJ, TSTG
TL
- Pulsed
(Note 1)
(Note 3)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
± 30
V
360
mJ
Thermal Characteristics
Symbol
RθJC
Parameter
Thermal Resistance, Junction-to-Case
RθJA
Thermal Resistance, Junction-to-Ambient *
--
40
°C/W
RθJA
Thermal Resistance, Junction-to-Ambient
--
62.5
°C/W
©2009 Fairchild Semiconductor Corporation
Typ
--
Max
0.93
Units
°C/W
Rev. A, Jun 2009
FQB9N50C/FQI9N50C
QFET
Symbol
TC = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max
Units
500
--
--
V
--
V/°C
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = 250 µA
∆BVDSS
/
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, Referenced to 25°C
--
0.57
IDSS
IGSSF
IGSSR
VDS = 500 V, VGS = 0 V
--
--
1
µA
VDS = 400 V, TC = 125°C
--
--
10
µA
Gate-Body Leakage Current, Forward
VGS = 30 V, VDS = 0 V
--
--
100
nA
Gate-Body Leakage Current, Reverse
VGS = -30 V, VDS = 0 V
--
--
-100
nA
2.0
--
4.0
V
--
0.65
0.8
Ω
--
6.5
--
S
--
790
1030
pF
--
130
170
pF
--
24
30
pF
--
18
45
ns
--
65
140
ns
--
93
195
ns
--
64
125
ns
--
28
35
nC
--
4
--
nC
--
15
--
nC
Zero Gate Voltage Drain Current
On Characteristics
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
RDS(on)
Static Drain-Source
On-Resistance
VGS = 10 V, ID = 4.5 A
gFS
Forward Transconductance
VDS = 40 V, ID = 4.5 A
(Note 4)
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = 250 V, ID = 9 A,
RG = 25 Ω
(Note 4, 5)
VDS = 400 V, ID = 9 A,
VGS = 10 V
(Note 4, 5)
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
--
--
9
A
ISM
--
--
36
A
VSD
Maximum Pulsed Drain-Source Diode Forward Current
VGS = 0 V, IS = 9 A
Drain-Source Diode Forward Voltage
--
--
1.4
V
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 9 A,
dIF / dt = 100 A/µs
(Note 4)
--
335
--
ns
--
2.95
--
µC
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 8 mH, IAS = 9A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ 9A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
©2009 Fairchild Semiconductor Corporation
Rev. A, Jun 2009
FQB9N50C/FQI9N50C
Electrical Characteristics
FQB9N50C/FQI9N50C
Typical Characteristics
VGS
15.0 V
10.0 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
Top :
ID, Drain Current [A]
1
10
o
150 C
ID, Drain Current [A]
1
10
0
10
o
-55 C
o
25 C
0
10
※ Notes :
1. 250μ s Pulse Test
2. TC = 25℃
※ Notes :
1. VDS = 40V
2. 250μ s Pulse Test
-1
-1
10
10
-1
0
10
2
1
10
10
4
6
8
10
VGS, Gate-Source Voltage [V]
VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
2.0
1
10
IDR, Reverse Drain Current [A]
RDS(ON) [Ω ],
Drain-Source On-Resistance
VGS = 10V
1.5
1.0
VGS = 20V
0.5
※ Note : TJ = 25℃
0
10
150℃
※ Notes :
1. VGS = 0V
2. 250μ s Pulse Test
25℃
-1
0
5
10
15
20
25
10
0.2
0.4
ID, Drain Current [A]
Figure 3. On-Resistance Variation vs
Drain Current and Gate Voltage
0.8
1.0
1.2
1.4
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
2000
12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
1200
Coss
800
※ Notes ;
1. VGS = 0 V
2. f = 1 MHz
Crss
400
VGS, Gate-Source Voltage [V]
Ciss
VDS = 100V
10
1600
Capacitance [pF]
0.6
VSD, Source-Drain voltage [V]
VDS = 250V
8
VDS = 400V
6
4
2
※ Note : ID = 9A
0
0
-1
10
0
10
1
10
0
5
10
15
20
25
30
VDS, Drain-Source Voltage [V]
QG, Total Gate Charge [nC]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
©2009 Fairchild Semiconductor Corporation
Rev. A, Jun 2009
FQB9N50C/FQI9N50C
Typical Characteristics
(Continued)
1.2
3.0
RDS(ON) , (Normalized)
Drain-Source On-Resistance
BV DSS , (Normalized)
Drain-Source Breakdown Voltage
2.5
1.1
1.0
※ Notes :
1. VGS = 0 V
2. ID = 250 μ A
0.9
0.8
-100
-50
0
50
100
150
2.0
1.5
1.0
※ Notes :
1. VGS = 10 V
2. ID = 4.5 A
0.5
0.0
-100
200
-50
0
50
100
150
200
o
TJ, Junction Temperature [ C]
o
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation
vs Temperature
Figure 8. On-Resistance Variation
vs Temperature
2
10
10
Operation in This Area
is Limited by R DS(on)
10 µs
8
100 µs
1 ms
ID, Drain Current [A]
ID, Drain Current [A]
1
10
10 ms
100 ms
DC
0
10
※ Notes :
6
4
o
1. TC = 25 C
2
o
2. TJ = 150 C
3. Single Pulse
-1
10
0
1
10
2
10
0
25
3
10
10
50
VDS, Drain-Source Voltage [V]
Figure 9. Maximum Safe Operating Area
100
125
150
Figure 10. Maximum Drain Current
vs Case Temperature
0
D = 0 .5
0 .2
10
※ N o te s :
1 . Z θ J C( t ) = 0 . 9 3 ℃ / W M a x .
2 . D u ty F a c to r , D = t1/t2
3 . T J M - T C = P D M * Z θ J C( t )
0 .1
-1
0 .0 5
0 .0 2
PDM
0 .0 1
JC
Z (t), T h e rm a l R e s p o n s e
10
75
TC, Case Temperature [℃]
t1
θ
s in g le p u ls e
10
t2
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
Figure 11. Transient Thermal Response Curve
©2009 Fairchild Semiconductor Corporation
Rev. A, Jun 2009
FQB9N50C/FQI9N50C
Gate Charge Test Circuit & Waveform
VGS
Same Type
as DUT
50KΩ
Qg
200nF
12V
10V
300nF
VDS
VGS
Qgs
Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS
RL
VDS
90%
VDD
VGS
RG
VGS
DUT
10V
10%
td(on)
tr
td(off)
t on
tf
t off
Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- L IAS2 -------------------2
BVDSS - VDD
L
VDS
BVDSS
IAS
ID
RG
VDD
DUT
10V
tp
©2009 Fairchild Semiconductor Corporation
ID (t)
VDS (t)
VDD
tp
Time
Rev. A, Jun 2009
FQB9N50C/FQI9N50C
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
I SD
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
VSD
VDD
Body Diode
Forward Voltage Drop
©2009 Fairchild Semiconductor Corporation
Rev. A, Jun 2009
FQB9N50C/FQI9N50C
Mechanical Dimensions
D2 - PAK
Dimensions in Millimeters
©2009 Fairchild Semiconductor Corporation
Rev. A, Jun 2009
FQB9N50C/FQI9N50C
Mechanical Dimensions
I2-PAK
4.50 ±0.20
(0.40)
9.90 ±0.20
+0.10
MAX13.40
9.20 ±0.20
(1.46)
1.20 ±0.20
1.30 –0.05
0.80 ±0.10
2.54 TYP
2.54 TYP
10.08 ±0.20
1.47 ±0.10
MAX 3.00
(0.94)
13.08 ±0.20
)
5°
(4
1.27 ±0.10
+0.10
0.50 –0.05
2.40 ±0.20
10.00 ±0.20
Dimensions in Millimeters
©2009 Fairchild Semiconductor Corporation
Rev. A, Jun 2009
tm
FQB9N50C/FQI9N50C
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Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
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First Production
Datasheet contains preliminary data; supplementary data will be published at a later
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Rev. I40
©2009 Fairchild Semiconductor Corporation
Rev. A, Jun 2009