HD74LVC1G53 2–channel Analog Multiplexer/Demultiplexer REJ03D0155–0300Z Rev.3.00 Jul. 02, 2004 Description The HD74LVC1G53 has 2–channel analog multiplexer/demultiplexer in a 6-pin package. Applications include signal gating chopping, modulation or demodulation (modem), and signal multiplexing for analog to digital to analog conversion systems. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life. Features • The basic gate function is lined up as renesas uni logic series. • Supply voltage range: 1.65 to 5.5 V Operating temperature range: –40 to +85°C • Control input: VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) • Ordering Information Part Name HD74LVC1G53CPE Package Type WCSP-6 pin HD74LVC1G53CLE Package Code TBS-6V CP TBS-6AV CL Package Taping Abbreviation Abbreviation (Quantity) E (3,000 pcs/reel) Article Indication Marking Year code Month code KPYM Function Table Control On channel 1 L Y0 H Y1 H: High level L: Low level Rev.3.00 Jul. 02, 2004 page 1 of 12 HD74LVC1G53 Pin Arrangement Height 0.5 mm 0.5 mm pitch 0.17 mm 6–Ball (CP) 0.23 mm 6–Ball (CL) Y0 3 4 COM GND 2 5 VCC Y1 1 6 1.4 mm 0.9 mm Pin#1 INDEX A (Bottom view) (Top view) Logic Diagram Y1 A Y0 Rev.3.00 Jul. 02, 2004 page 2 of 12 1 6 3 4 HD74LVC1G53 Absolute Maximum Ratings Item Symbol Supply voltage range Input voltage range *1 Ratings VCC –0.5 to 6.5 Unit Test Conditions V VI –0.5 to 6.5 V Output voltage range *1, 2 VO –0.5 to VCC +0.5 V Output : H or L Control Input clamp current IIK –50 mA VI < 0 Output clamp current IOK ±50 mA VO < 0 or VO > VCC Continuous output current IO ±50 mA VO = 0 to VCC Continuous current through VCC or GND ICC or IGND ±100 mA Package Thermal impedance θja 143 °C/W 123 Storage temperature Notes: Tstg CP CL –65 to 150 °C The absolute maximum ratings are values, which must not individually be exceeded, and furthermore no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This value is limited to 5.5 V maximum. Recommended Operating Conditions Item Symbol Min Max Unit Supply voltage range VCC 1.65 5.5 V Control Input voltage range VI 0 5.5 V Input/Output voltage range VI/O 0 VCC V Input transition rise or fall rate ∆t / ∆vv 0 20 ns / V Operating free-air temperature Ta VCC = 1.65 to 1.95 V, 2.3 to 2.7 V 0 10 VCC = 3.0 to 3.6 V 0 1 10 VCC = 4.5 to 5.5 V –40 85 Note: Unused or floating inputs must be held high or low. Rev.3.00 Jul. 02, 2004 page 3 of 12 Conditions °C HD74LVC1G53 Electrical Characteristics Ta = –40 to 85°C Item Input voltage Symbol VIH VIL On–state switch resistance Peak on resistance RON RON(P) Difference of on-state resistance between switches ∆RON Off-state switch leakage current IS (OFF) On-state switch leakage current IS (ON) Control input current IIN Quiescent supply current ICC Control input capacitance Switch terminal capacitance Note: VCC (V) Min Typ Max 1.65 to 1.95 VCC×0.65 — — 2.3 to 2.7 VCC×0.7 — — 3.0 to 3.6 VCC×0.7 — — 4.5 to 5.5 VCC×0.7 — — 1.65 to 1.95 — — VCC×0.35 2.3 to 2.7 — — VCC×0.3 3.0 to 3.6 — — VCC×0.3 4.5 to 5.5 — — VCC×0.3 Unit Test condition V Ω 1.65 — 13 30 2.3 — 10 20 IS = 4 mA IS = 8 mA 3.0 — 8.5 17 IS = 24 mA 4.5 — 6.5 13 IS = 32 mA 1.65 — 86.5 120 IS = 4 mA 2.3 — 23 30 IS = 8 mA 3.0 — 13 20 IS = 24 mA 4.5 — 8 15 IS = 32 mA 1.65 — — 7 IS = 4 mA 2.3 — — 5 IS = 8 mA 3.0 — — 3 IS = 24 mA 4.5 — — 2 5.5 — — ±1.0 5.5 5.5 5.5 — ±0.1* — — ±1.0 ± VI = VCC and VO = GND or VI = GND and VO = VCC, VA = VIL, VIH µA VI = VCC or GND, VA = VIH, VIL VO = Open µA VIN = VCC or GND µA VIN = VCC or GND VC = VCC–0.6 V 1 — — ±0.1* — — ±1.0 ± — — ±0.1*1 — 10 1 — 1.0*1 ∆ICC 5.5 — — 500 µA CIC 5.0 — 3.0 — pF CI/O(OFF) 5.0 — 6.0 — pF CI/O(ON) 5.0 — 13 — 1. Ta = 25°C Rev.3.00 Jul. 02, 2004 page 4 of 12 VI=VCC to GND IS = 32 mA — — VI=VCC to GND µA 1 — VI=VCC or GND HD74LVC1G53 Switching Characteristics VCC = 1.8 ± 0.15 V Item Symbol Propagation delay time*1 tPLH tPHL Enable time tZH tZL Disable time tHZ tLZ Ta = –40 to 85°C Min Max 2.0 Unit ns Test Conditions CL = 30 pF, RL = 1.0 kΩ FROM TO (Input) (Output) COM or Yn Yn or COM 2.9 10.3 CL = 30 pF, RL = 1.0 kΩ A Yn 2.1 9.4 CL = 30 pF, RL = 1.0 kΩ A Yn VCC = 2.5 ± 0.2 V Item Symbol Propagation delay time*1 tPLH tPHL Enable time tZH tZL Disable time tHZ tLZ Ta = –40 to 85°C Min Max 1.2 Unit ns Test Conditions CL = 30 pF, RL = 500 Ω FROM TO (Input) (Output) COM or Yn Yn or COM 2.1 7.2 CL = 30 pF, RL = 500 Ω A Yn 1.4 7.9 CL = 30 pF, RL = 500 Ω A Yn Test Conditions CL = 50 pF, RL = 500 Ω FROM TO (Input) (Output) COM or Yn Yn or COM VCC = 3.3 ± 0.3 V Item ymbol Propagation delay time*1 tPLH tPHL Enable time tZH tZL Disable time tHZ tLZ Ta = –40 to 85°C Min Max 0.8 Unit ns 1.9 5.8 CL = 50 pF, RL = 500 Ω A Yn 1.1 7.2 CL = 50 pF, RL = 500 Ω A Yn VCC = 5.0 ± 0.5 V Ta = –40 to 85°C Min Max 0.6 FROM TO (Input) (Output) COM or Yn Yn or COM Item Symbol Unit Test Conditions Propagation delay time*1 tPLH ns CL = 50 pF, RL = 500 Ω tPHL Enable time tZH 1.3 5.4 CL = 50 pF, RL = 500 Ω A Yn tZL Disable time tHZ 1.0 5.0 CL = 50 pF, RL = 500 Ω A Yn tLZ Notes: 1. The propagation delay is calculated RC time const constant of typical on-state resistance of the switch and the specified load capacitance, when driven by an iideal voltage source (zero output impedance). Rev.3.00 Jul. 02, 2004 page 5 of 12 HD74LVC1G53 Analog Switch Characteristics Ta = 25°C VCC (V) Min 1.65 2.3 3.0 4.5 1.65 2.3 3.0 4.5 1.65 Crosstalk 2.3 (between switches) 3.0 4.5 1.65 2.3 3.0 4.5 1.65 Crosstalk (Control input to signal 2.3 3.0 output) 4.5 1.65 Feed through 2.3 attenuation 3.0 (Switch OFF) 4.5 1.65 2.3 3.0 4.5 Sine–wave distortion 1.65 2.3 3.0 4.5 — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — Typ 35 120 190 215 >300 >300 >300 >300 –58 –58 –58 –58 –42 –42 –42 –42 35 50 70 100 –58 –58 –58 –58 –42 –42 –42 –42 0.1 0.025 0.015 0.01 1.65 2.3 3.0 4.5 — — — — 0.15 0.025 0.015 0.01 Item Frequency response (Switch ON) Max — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — Unit Test conditions MHz CL = 50 pF, RL = 600 Ω CL = 5 pF, RL = 50 Ω dB CL = 50 pF, RL = 600 Ω FROM TO (Input) (Output) Adjust fin voltage to obtain COM or 0dBm at output when fin is Y 1MHz (sine wave). Increase fin frequency until the dB–meter reads –3 dBm. 20 log(VO/VI) = –3 dBm Y or COM Adjust fin voltage to obtain 0dBm at input when fin is 1MHz (sine wave). Y COM CL = 5 pF, RL = 50 Ω mV CL = 50 pF, RL = 600 Ω dB CL = 50 pF, RL = 600 Ω Adjust RL value to obtain 0A A at IIN/OUT when fin is 1MHz (square wave) Y or COM Adjust fin voltage to obtain 0dBm at input when fin is 1MHz (sine–wave) COM or Y Y or COM VI=1.4VP–P, VCC=1.65V VI=2.0VP–P, VCC=2.3V VI=2.5VP–P, VCC=3.0V VI=4.0VP–P, VCC=4.5V COM or Y Y or COM CL = 5 pF, RL = 50 Ω % CL = 50 pF, RL = 10 kkΩ fin = 1kHz (sine–wave) CL = 50 pF, RL = 10 kΩ fin = 10kHz (sine–wave) Operating Characteristics Ta = 25°C Item Power dissipation capacitance Symbol CPD Rev.3.00 Jul. 02, 2004 page 6 of 12 VCC (V) Min Typ Max 1.8 — 9 — 2.5 — 10 — 3.3 — 10 — 5.0 — 12 — Unit pF Test Conditions f = 10 MHz HD74LVC1G53 Test Circuit • R ON VCC VA =VIH or VIL VCC VIN =VCC (ON) VOUT R ON = VIN–OUT IS GND IS + V (Ω) – VIN–OUT • I S (off), I S (on) VCC VCC VA = VIL or VIH VA = VIH or VIL VCC A VCC (OFF) VIN =VCC or GND Rev.3.00 Jul. 02, 2004 page 7 of 12 GND A VOUT =GND or VCC VIN =VCC or GND (ON) GND VOUT OPEN HD74LVC1G53 Test Circuit (cont.) VTT RL From Output OPEN S1 t PLH / tPHL OPEN t ZH / t HZ GND t ZL / t LZ VTT GND RL CL TEST S1 Load circuit INPUTS VCC (V) 1.8±0.15 2.5±0.2 3.3±0.3 5.0±0.5 VI VCC VCC VCC VCC tr / tf ≤ 2 ns ≤ 2 ns ≤ 2.5 ns ≤ 2.5 ns Vref VTT CL RL ∆V VCC / 2 VCC / 2 VCC / 2 VCC / 2 2 × VCC 2 × VCC 2 × VCC 2 × VCC 30 pF 30 pF 50 pF 50 pF 1.0 kΩ 500 Ω 500 Ω 500 Ω 0.15 V 0.15 V 0.3 V 0.3 V VI Vref Input Vref t PLH 0V t PHL V OH Output Vref Vref V OL VI Control Input Vref Vref t ZL 0V t LZ VOH Output (Waveform – A) Vref VOL + ∆V t ZH t HZ VOH – ∆V Output (Waveform – B) V OL V OH Vref VOL Notes: 1. CL includes probe and jig capacitance. 2. Waveform–A is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform–B is for an output with internal conditions such that the output is high except when disabled by the output control. 4. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10MHz, Zo = 50 Ω. 5. The output are measured one at a time with one transition per measurement. Rev.3.00 Jul. 02, 2004 page 8 of 12 HD74LVC1G53 Frequency response (Switch ON) VCC VA = VIH or VIL f in = sine wave f in 0.1 µF VIN RL = 50 Ω VCC (ON) GND RL= 600 Ω or 50 Ω VOUT CL = 50 pF or 5 pF VCC /2 Crosstalk (Between any switches) VA = VIH or VIL f in RL = 50 Ω 0.1 µF RL = 600 Ω or 50 Ω COM VIN VCC VCC (ON) Y0 GND RL = 600 Ω or 50 Ω VOUT1 CL = 50 pF or 5 pF VCC /2 VCC VCC (OFF) Y1 GND RL = 600 Ω or 50 Ω VCC /2 Rev.3.00 Jul. 02, 2004 page 9 of 12 VOUT2 CL = 50 pF or 5 pF HD74LVC1G53 Crosstalk (Control input to signal output) VCC RL = 50 Ω VA VCC COM RL = 600 Ω GND Y0 or Y1 VCC /2 VOUT RL = 600 Ω CL = 50 pF VCC /2 Feedthrough attenuation (Switch OFF) VCC VA = VIL or VIH f in 0.1 µF VIN RL = 50 Ω VCC /2 VCC Y COM (OFF) Y0 1 GND RL = 600 Ω or 50 Ω VOUT VCC /2 RL = 600 Ω or 50 Ω CL = 50 pF or 5 pF Sine-wave distortion VCC VA = VIH or VIL f in 10 µF 600 Ω VIN VCC Y COM (ON) Y0 1 GND 10 µF RL = 10 k Ω VCC /2 Rev.3.00 Jul. 02, 2004 page 10 of 12 VOUT CL = 50 pF HD74LVC1G53 Package Dimensions TBS-6V EIAJ Package Code Mass (g) 0.001 JEDEC Code Lead Material D e ZD ZE C E B e B A Pin #1 index area 1 2 C // y1 C 6×φb φx M C A B φx M C C Symbol Rev.3.00 Jul. 02, 2004 page 11 of 12 A A2 y C A1 Seating plane A A1 A2 b D E e x y y1 ZD ZE Dimension in Millimeters Min Typ Max 0.50 0.10 0.15 0.35 0.19 0.15 0.17 0.90 1.40 0.50 0.05 0.05 0.20 0.20 0.20 HD74LVC1G53 TBS-6AV EIAJ Package Code Mass (g) 0.001 JEDEC Code Lead Material D e ZD ZE C E B e B A Pin #1 index area 1 2 C // y1 C 6×φb φx M C A B φx M C C Symbol *Reference value. Rev.3.00 Jul. 02, 2004 page 12 of 12 A A2 y C A1 Seating plane A A1 A2 b D E e x y y1 ZD ZE Dimension in Millimeters Min Nom Max 0.50 0.155 0.185 (0.315)* 0.25 0.20 0.90 1.40 0.50 0.05 0.05 0.20 0.20 0.20 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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