ON MC10EP451FAR2 3.3v / 5vecl 6-bit differential register with master reset Datasheet

MC10EP451, MC100EP451
3.3V / 5VECL 6−Bit
Differential Register with
Master Reset
The MC10/100EP451 is a 6−bit fully differential register with
common clock and single−ended Master Reset (MR). It is ideal for
very high frequency applications where a registered data path is
necessary.
All inputs have a 75 k pulldown resistor internally. Differential
inputs have an override clamp. Unused differential register inputs can
be left open and will default LOW. When the differential inputs are
forced to < VEE + 1.2 V, the clamp will override and force the output to
a default state. When in the default state, and since the flip−flop is edge
triggered, the output reaches a determined, but not predicted, valid
state.
The positive transition of CLK (pin 4) will latch the registers.
Master Reset (MR) HIGH will asynchronously reset all registers
forcing Q outputs to go LOW.
The 100 Series contains temperature compensation.
•
•
•
•
•
•
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MARKING
DIAGRAM*
LQFP−32
FA SUFFIX
CASE 873A
Maximum Frequency > 3.0 GHz Typical
Asynchronous Master Reset
20 ps Skew Within Device, 35 ps Skew Device−To−Device
PECL Mode Operating Range: VCC = 3.0 V to 5.5 V
With VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
With VEE = −3.0 V to −5.5 V
Open Input Default State
32
1
xxx
A
WL
YY
WW
450 ps Typical Propagation Delay
MCxxx
EP451
AWLYYWW
= 10 or 100
= Assembly Location
= Wafer Lot
= Year
= Work Week
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
•
• Safety Clamp on Inputs
• Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
 Semiconductor Components Industries, LLC, 2004
June, 2004 − Rev. 6
1
Publication Order Number:
MC10EP451/D
MC10EP451, MC100EP451
D4
D5
D5
Q5 Q5 VEE Q4 Q4
D0
D0
24
23
22
21
20
19
18
25
16
VCC
D3
26
15
Q3
D3
27
14
Q3
VEE
28
13
VCC
MR
29
12
Q2
D2
30
11
Q2
D2
31
10
Q1
D1
32
9
Q1
MC10EP451
MC100EP451
2
3
4
5
6
7
R
D1
D1
D0
D0 CLK CLK VCC Q0
Q
D
Q1
Q1
R
D2
D2
Q
D
Q2
Q2
R
8
D3
D3
D1
Q0
Q0
17
D4
1
Q
D
Q
D
Q3
Q3
Q0
R
Warning: All VCC and VEE pins must be externally connected to Power
Supply to guarantee proper operation.
D4
D4
Figure 1. LQFP−32 Pinout (Top View)
Q
D
Q4
Q4
R
Table 1. PIN DESCRIPTION
FUNCTION
PIN
D [0:5]*, D [0:5]*
ECL Differential Data Inputs
MR*
ECL Master Reset Input
D5
D5
Q
D
Q5
CLK
CLK
CLK*, CLK*
ECL Differential Clock Inputs
Q [0:5], Q [0:5]
ECL Differential Data Outputs
VCC
Positive Supply
VEE
Negative Supply
R
VEE
MR
* Pins will default LOW when left open.
Figure 2. Logic Diagram
Table 2. ATTRIBUTES
Characteristics
Value
Internal Input Pulldown Resistor
75 k
Internal Input Pullup Resistor
ESD Protection
N/A
Human Body Model
Machine Model
Charged Device Model
Moisture Sensitivity (Note 1)
Flammability Rating
Q5
> 2 kV
> 200 V
> 2 kV
Level 2
Oxygen Index: 28 to 34
Transistor Count
UL 94 V−0 @ 0.125 in
919 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
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2
MC10EP451, MC100EP451
Table 3. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
VCC
PECL Mode Power Supply
VEE = 0 V
6
V
VEE
NECL Mode Power Supply
VCC = 0 V
−6
V
VI
PECL Mode Input Voltage
NECL Mode Input Voltage
VEE = 0 V
VCC = 0 V
6
−6
V
V
Iout
Output Current
Continuous
Surge
50
100
mA
mA
TA
Operating Temperature Range
−40 to +85
°C
Tstg
Storage Temperature Range
−65 to +150
°C
JA
Thermal Resistance (Junction to Ambient)
0 lfpm
500 lfpm
LQFP−32
LQFP−32
80
55
°C/W
°C/W
JC
Thermal Resistance (Junction to Case)
Standard Board
LQFP−32
12 to 17
°C/W
Tsol
Wave Solder
<2 to 3 sec @ 248°C
265
°C
VI VCC
VI VEE
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
Table 4. 10EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 2)
−40°C
Symbol
Characteristic
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
80
95
125
80
95
125
80
95
125
mA
IEE
Power Supply Current
VOH
Output HIGH Voltage (Note 3)
2165
2290
2415
2230
2355
2480
2290
2415
2540
mV
VOL
Output LOW Voltage (Note 3)
1365
1490
1615
1430
1555
1680
1470
1615
1740
mV
VIH
Input HIGH Voltage (Single−Ended)
2090
2415
2155
2480
2215
2540
mV
VIL
Input LOW Voltage (Single−Ended)
1365
1690
1430
1755
1490
1815
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 4)
2.0
3.3
2.0
3.3
2.0
3.3
V
IIH
Input HIGH Current
150
A
IIL
Input LOW Current
150
0.5
150
0.5
0.5
A
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.
3. All loading with 50 to VCC − 2.0 V.
4. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
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3
MC10EP451, MC100EP451
Table 5. 10EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 5)
−40°C
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
80
95
125
80
95
125
80
95
125
mA
Output HIGH Voltage (Note 6)
3865
3990
4115
3930
4055
4180
3990
4115
4240
mV
VOL
Output LOW Voltage (Note 6)
3065
3190
3315
3130
3255
3380
3170
3315
3440
mV
VIH
Input HIGH Voltage (Single−Ended)
3790
4115
3855
4180
3915
4240
mV
VIL
Input LOW Voltage (Single−Ended)
3065
3390
3130
3455
3190
3515
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 7)
2.0
5.0
2.0
5.0
2.0
5.0
V
IIH
Input HIGH Current
150
A
IIL
Input LOW Current
Symbol
Characteristic
IEE
Power Supply Current
VOH
150
150
0.5
0.5
A
0.5
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V.
6. All loading with 50 to VCC − 2.0 V.
7. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 6. 10EP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = −5.5 V to −3.0 V (Note 8)
−40°C
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
80
95
125
80
95
125
80
95
125
mA
Output HIGH Voltage (Note 9)
−1135
−1010
−885
−1070
−945
−820
−1010
−885
−760
mV
Output LOW Voltage (Note 9)
−1935
−1810
−1685
−1870
−1745
−1620
−1830
−1685
−1560
mV
VIH
Input HIGH Voltage (Single−Ended)
−1210
−885
−1145
−820
−1085
−760
mV
VIL
Input LOW Voltage (Single−Ended)
−1935
−1610
−1870
−1545
−1810
−1485
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 10)
0.0
V
IIH
Input HIGH Current
150
A
IIL
Input LOW Current
Symbol
Characteristic
IEE
Power Supply Current
VOH
VOL
VEE+2.0
0.0
VEE+2.0
150
0.5
0.0
VEE+2.0
150
0.5
0.5
A
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
8. Input and output parameters vary 1:1 with VCC.
9. All loading with 50 to VCC − 2.0 V.
10. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
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MC10EP451, MC100EP451
Table 7. 100EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 11)
−40°C
Symbol
Characteristic
Min
Typ
25°C
Max
Min
Typ
85°C
Max
Min
Typ
Max
Unit
IEE
Power Supply Current
85
105
135
85
105
135
85
105
135
mA
VOH
Output HIGH Voltage (Note 12)
2155
2280
2405
2155
2280
2405
2155
2280
2405
mV
VOL
Output LOW Voltage (Note 12)
1355
1480
1605
1355
1480
1605
1355
1480
1605
mV
VIH
Input HIGH Voltage (Single−Ended)
2075
2420
2075
2420
2075
2420
mV
VIL
Input LOW Voltage (Single−Ended)
1355
1675
1355
1675
1355
1675
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 13)
2.0
3.3
2.0
3.3
2.0
3.3
V
IIH
Input HIGH Current
150
A
IIL
Input LOW Current
150
0.5
150
0.5
A
0.5
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
11. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.
12. All loading with 50 to VCC − 2.0 V.
13. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 8. 100EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 14)
−40°C
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
85
105
135
85
105
135
85
105
135
mA
Output HIGH Voltage (Note 15)
3855
3980
4105
3855
3980
4105
3855
3980
4105
mV
Output LOW Voltage (Note 15)
3055
3180
3305
3055
3180
3305
3055
3180
3305
mV
VIH
Input HIGH Voltage (Single−Ended)
3775
4120
3775
4120
3775
4120
mV
VIL
Input LOW Voltage (Single−Ended)
3055
3375
3055
3375
3055
3375
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 16)
2.0
5.0
2.0
5.0
2.0
5.0
V
IIH
Input HIGH Current
150
A
IIL
Input LOW Current
Symbol
Characteristic
IEE
Power Supply Current
VOH
VOL
150
0.5
150
0.5
0.5
A
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
14. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V.
15. All loading with 50 to VCC − 2.0 V.
16. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
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MC10EP451, MC100EP451
Table 9. 100EP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = −5.5 V to −3.0 V (Note 17)
−40°C
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
85
105
135
85
105
135
85
105
135
mA
Output HIGH Voltage (Note 18)
−1145
−1020
−895
−1145
−1020
−895
−1145
−1020
−895
mV
VOL
Output LOW Voltage (Note 18)
−1945
−1820
−1695
−1945
−1820
−1695
−1945
−1820
−1695
mV
VIH
Input HIGH Voltage (Single−Ended)
−1225
−880
−1225
−880
−1225
−880
mV
VIL
Input LOW Voltage (Single−Ended)
−1945
−1625
−1945
−1625
−1945
−1625
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 19)
0.0
V
IIH
Input HIGH Current
150
A
IIL
Input LOW Current
Symbol
Characteristic
IEE
Power Supply Current
VOH
VEE+2.0
0.0
VEE+2.0
0.0
150
0.5
VEE+2.0
150
0.5
A
0.5
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
17. Input and output parameters vary 1:1 with VCC.
18. All loading with 50 to VCC − 2.0 V.
19. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 10. AC CHARACTERISTICS VCC = 0 V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 20)
−40°C
25°C
Min
Typ
VOUTpp
Output Voltage Amplitude @ 3 GHz
(Figure 3) (Note 21)
540
670
tPLH,
tPHL
Propagation Delay to
Output Differential
CLK to Q, Q
MR to Q, Q
330
430
430
530
tRR
Reset Recovery
MR to CLK
240
tS
tH
Setup Time
Hold Time
D to CLK
CLK to D
80
80
tPW
Minimum Pulse Rate
MR
400
tSKEW
Within−Device Skew (Note 22)
Device−To−Device Skew (Note 23)
20
35
40
100
20
35
40
100
20
35
40
100
tJITTER
CLOCK Random Jitter (RMS)
@ 3.0 GHz (Figure 3)
0.2
1
0.2
1
0.2
1
ps
tr
tf
Output Rise/Fall Times
(20% − 80%)
150
150
250
250
160
160
260
260
180
180
280
280
ps
Symbol
Characteristic
Q, Q
100
100
Max
Min
Typ
520
650
350
450
450
550
145
250
40
40
80
80
85°C
530
630
Max
Min
Typ
450
580
390
490
490
590
150
260
160
ps
40
40
80
80
40
40
ps
550
650
400
110
110
Max
590
690
400
130
130
Unit
GHz
ps
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
20. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 to VCC − 2.0 V.
21. VOL and VOH specifications not guaranteed for Fmax testing.
22. Skew is measured between outputs under identical transitions and conditions on any one device.
23. Device−To−Device skew for identical transitions at identical VCC levels.
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MC10EP451, MC100EP451
900
5V
800
VOUTpp (mV)
3.3 V
700
600
500
400
300
200
100
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
FREQUENCY (MHz)
Figure 3. Fmax Typical
Zo = 50 Q
D
Receiver
Device
Driver
Device
Zo = 50 Q
D
50 50 VTT
VTT = VCC − 2.0 V
Figure 4. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
ORDERING INFORMATION
Package
Shipping†
MC10EP451FA
LQFP−32
250 Units / Tray
MC10EP451FAR2
LQFP−32
2000 Tape & Reel
MC10EP451FAG
LQFP−32 (Pb−Free)
250 Units / Tray
MC100EP451FA
LQFP−32
250 Units / Tray
MC100EP451FAR2
LQFP−32
2000 Tape & Reel
MC100EP451FAG
LQFP−32 (Pb−Free)
250 Units / Tray
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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MC10EP451, MC100EP451
Resource Reference of Application Notes
AN1405/D
− ECL Clock Distribution Techniques
AN1406/D
− Designing with PECL (ECL at +5.0 V)
AN1503/D
− ECLinPS I/O SPiCE Modeling Kit
AN1504/D
− Metastability and the ECLinPS Family
AN1568/D
− Interfacing Between LVDS and ECL
AN1642/D
− The ECL Translator Guide
AND8001/D
− Odd Number Counters Design
AND8002/D
− Marking and Date Codes
AND8020/D
− Termination of ECL Logic Devices
AND8066/D
− Interfacing with ECLinPS
AND8090/D
− AC Characteristics of ECL Devices
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MC10EP451, MC100EP451
PACKAGE DIMENSIONS
A
32
−T−, −U−, −Z−
LQFP−32
FA SUFFIX
CASE 873A−02
ISSUE B
4X
A1
25
0.20 (0.008) AB T−U Z
1
AE
P
−U−
−T−
B
V
B1
DETAIL Y
17
8
9
−Z−
9
AE
DETAIL Y
V1
4X
0.20 (0.008) AC T−U Z
S1
S
DETAIL AD
G
AC T−U Z
−AB−
BASE
METAL
ÉÉ
ÉÉ
ÉÉ
0.10 (0.004) AC
F
8X
M
R
J
M
N
D
0.20 (0.008)
−AC−
SECTION AE−AE
H
W
K
X
DETAIL AD
Q
0.250 (0.010)
C E
GAUGE PLANE
SEATING
PLANE
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NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION:
MILLIMETER.
3. DATUM PLANE −AB− IS LOCATED AT
BOTTOM OF LEAD AND IS COINCIDENT
WITH THE LEAD WHERE THE LEAD
EXITS THE PLASTIC BODY AT THE
BOTTOM OF THE PARTING LINE.
4. DATUMS −T−, −U−, AND −Z− TO BE
DETERMINED AT DATUM PLANE −AB−.
5. DIMENSIONS S AND V TO BE
DETERMINED AT SEATING PLANE −AC−.
6. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION. ALLOWABLE
PROTRUSION IS 0.250 (0.010) PER SIDE.
DIMENSIONS A AND B DO INCLUDE
MOLD MISMATCH AND ARE
DETERMINED AT DATUM PLANE −AB−.
7. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. DAMBAR
PROTRUSION SHALL NOT CAUSE THE
D DIMENSION TO EXCEED 0.520 (0.020).
8. MINIMUM SOLDER PLATE THICKNESS
SHALL BE 0.0076 (0.0003).
9. EXACT SHAPE OF EACH CORNER MAY
VARY FROM DEPICTION.
DIM
A
A1
B
B1
C
D
E
F
G
H
J
K
M
N
P
Q
R
S
S1
V
V1
W
X
MILLIMETERS
MIN
MAX
7.000 BSC
3.500 BSC
7.000 BSC
3.500 BSC
1.400
1.600
0.300
0.450
1.350
1.450
0.300
0.400
0.800 BSC
0.050
0.150
0.090
0.200
0.500
0.700
12 REF
0.090
0.160
0.400 BSC
1
5
0.150
0.250
9.000 BSC
4.500 BSC
9.000 BSC
4.500 BSC
0.200 REF
1.000 REF
INCHES
MIN
MAX
0.276 BSC
0.138 BSC
0.276 BSC
0.138 BSC
0.055
0.063
0.012
0.018
0.053
0.057
0.012
0.016
0.031 BSC
0.002
0.006
0.004
0.008
0.020
0.028
12 REF
0.004
0.006
0.016 BSC
1
5
0.006
0.010
0.354 BSC
0.177 BSC
0.354 BSC
0.177 BSC
0.008 REF
0.039 REF
MC10EP451, MC100EP451
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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10
For additional information, please contact your
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MC10EP451/D
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