austriamicrosystems AG is now ams AG The technical content of this austriamicrosystems datasheet is still valid. Contact information: Headquarters: ams AG Tobelbaderstrasse 30 8141 Unterpremstaetten, Austria Tel: +43 (0) 3136 500 0 e-Mail: [email protected] Please visit our website at www.ams.com Data Sheet AS1970 - AS1975 L o w - Vo l ta g e S i n g l e / D u a l / Q u a d C o m pa r a t o r s 1 General Description 2 Key Features CMOS Push/Pull Output Sinks and Sources 8mA (AS1970/AS1972/AS1974) ! CMOS Open-Drain Output Voltage Extends Beyond VCC (AS1971/AS1973/AS1975) ! Quiescent Supply Current: 8.5µA per Comparator ! Internal Hysteresis: 3mV ! 3V/5V Logic-Level Translation ! Single-Supply Operation: 2.5 to 5.5V The comparators are available as the standard products listed in Table 1. ! Common-Mode Input Voltage Range Extends 250mV Above the Rails Table 1. Standard Products ! Low Propagation Delay: 300ns Output Type ! Minimized Overall Power Consumption AS1970/AS1972/AS1974 Push/Pull ! Supply Current @1MHz Switching Frequency: 80µA AS1971/AS1973/AS1975 Open-Drain ! No Phase Reversal for Overdriven Inputs ! Package Types: - 5-pin SOT23 – AS1970/AS1971 - 8-pin MSOP – AS1972/AS1973 - 14-pin TSSOP – AS1974/AS1975 Model lv am lc s on A te G nt st il Low input bias current (1.0pA, typ), low input offset voltage (0.5mV, typ), and internal hysteresis (3mV) make these comparators ideal for low-power single-cell applications including power-management and power-monitoring systems. al id ! The AS1970 - AS1975 are single/dual/quad comparators that operate with supplies from 2.5 to 5.5V making them perfect for all 3- and 5-volt applications. The comparators can also operate with dual supplies (±1.25 to ±2.75V), and require very little supply current (down to 8.5µA) with minimal propagation delay (300ns). The AS1970/AS1972/AS1974 push/pull output can sink or source current. The AS1971/AS1973/AS1975 open-drain output can be pulled beyond VCC to a maximum of 5.5V > VEE. These open-drain versions are ideal for logic-level translators or bipolar-to-unipolar converters. 3 Applications The AS1970/AS1971 are available in a 5-pin SOT23 package. The AS1972/AS1973 are available in a 8-pin MSOP package. The AS1974/AS1975 are available in a 14-pin TSSOP package. The devices are ideal for battery-powered systems, mobile communication devices, zero-crossing detectors, window comparators, level translators, threshold detectors/discriminators, ground/supply-sensing applications, IR receivers or any other space-limited application with low power-consumption requirements. ca Large internal output drivers allow Rail-to-Rail output swings with loads of up to 8mA. ch ni Figure 1. Block Diagrams INA+ INA+ + IN+ – Te IN- VCC AS1970/AS1971 OUT INA- – INAOUTA INB+ INB- INB+ VEE + INB- + – INC+ OUTB INCIND+ VCC AS1972/AS1973 VEE INDVCC www.austriamicrosystems.com Revision 1.02 + – OUTA + – OUTB + – OUTC + – AS1974/AS1975 OUTD VEE 1 - 18 AS1970 Data Sheet - Pinout and Packaging 4 Pinout and Packaging Pin Assignments Figure 2. Pin Assignments (Top View) 8 VCC OUTA 1 5 VEE 7 OUTB INA- 2 VCC 2 AS1972/ AS1973 AS1970/ AS1971 INA- 2 INA+ 3 VCC 4 6 INB- INA+ 3 INB+ 5 5 INB+ VEE 4 INB- 6 13 IND- 12 IND+ AS1974/ AS1975 OUTB 7 8-pin MSOP 5-pin SOT23 11 VEE 10 INC+ am lc s on A te G nt st il 4 IN- IN+ 3 al id OUT 1 14 OUTD lv OUTA 1 9 INC- 8 OUTC 14-pin TSSOP Pin Descriptions Table 2. Pin Descriptions Description IN- Comparator Inverting Input IN+ Comparator Non-Inverting Input INA- Comparator A Inverting Input INA+ Comparator A Non-Inverting Input INB- Comparator B Inverting Input INB+ Comparator B Non-Inverting Input INC- Comparator C Inverting Input INC+ Comparator C Non-Inverting Input IND- Comparator D Inverting Input IND+ Comparator D Non-Inverting Input ni See Figure 2 Pin Name ca Pin Number OUT Comparator A Output OUTB Comparator B Output OUTC Comparator C Output OUTD Comparator D Output ch Te Comparator Output OUTA VCC Positive Supply Voltage VEE Negative Supply Voltage www.austriamicrosystems.com Revision 1.02 2 - 18 AS1970 Data Sheet - Absolute Maximum Ratings 5 Absolute Maximum Ratings Stresses beyond those listed in Table 3 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Section 6 Electrical Characteristics on page 4 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 3. Absolute Maximum Ratings Max Units 7 V -0.3 VCC + 0.3 V AS1970/AS1972/AS1974 -0.3 VCC + 0.3 V AS1971/AS1973/AS1975 -0.3 +7 V 10 s INx+, INx- to VEE OUTx to VEE OUTx Short-Circuit Duration to VEE or VCC 5-pin SOT23 571 mW Derate 7.1mW/ºC above +70ºC 8-pin MSOP 727 mW Derate 9.1mW/ºC above +70ºC 14-pin TSSOP 727 mW Derate 9.1mW/ºC above +70ºC -40 +85 ºC +150 ºC -65 +150 ºC am lc s on A te G nt st il Continuous Power Dissipation (TAMB = +70ºC) Comments al id Min lv Parameter Supply Voltage VCC to VEE Operating Temperature Range Junction Temperature Range Storage Temperature Range 260 ºC Te ch ni ca Package Body Temperature The reflow peak soldering temperature (body temperature) specified is in accordance with IPC/JEDEC J-STD020C “Moisture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices”. The lead finish for Pb-free leaded packages is matte tin (100% Sn). www.austriamicrosystems.com Revision 1.02 3 - 18 AS1970 Data Sheet - Electrical Characteristics 6 Electrical Characteristics VCC = 2.7 to 5.5V, VEE = 0V, VCM = 0V, TAMB = -40 to +85ºC (unless otherwise specified). Typ values are at TAMB = +25ºC. Table 4. Electrical Characteristics Parameter Conditions Min VCC Supply Voltage Inferred from PSRR test 2.5 Supply Current VCC = 5V, No Load, AS1974/AS1975 36 VCC = 5V, No Load, AS1972/AS1973 18 VCC = 5V, No Load, AS1970, AS1971 11 VCC = 2.7V, No Load, AS1974/AS1975 34 VCC = 2.7V, No Load, AS1972/AS1973 17 VCC = 2.7V, No Load, AS1970, AS1971 Power-Supply Rejection Ratio VCMR Common-Mode Voltage Range 2.5V ≤ VCC ≤ 5.5V, TAMB = +25ºC Units 5.5 V 64 32 19 60 VOS Input Offset Voltage 1 10 55 18 80 dB TAMB = +25ºC VEE - 0.25 VCC + 0.25 TAMB = -40 to +85ºC VEE VCC Full Common-Mode Range, TAMB = +25ºC 2 ±0.5 Full Common-Mode Range, TAMB = -40 to +85ºC IB Input Bias Current V ±6 mV ±8 Input Hysteresis VHYS µA 30 am lc s on A te G nt st il PSRR Max lv IDD Typ al id Symbol ±3 3, 4 0.001 10 mV nA IOS Input Offset Current 0.5 pA CIN Input Capacitance 3.5 pF CMRR Common-Mode Rejection Ratio TAMB = +25ºC 80 dB ILEAK Output Leakage Current AS1971/AS1973/AS1975 only ni OUTx Output Voltage Low Te ch VOL VOH OUTx Output Voltage High (AS1970/AS1972/AS1974 only) www.austriamicrosystems.com 1.0 Sourcing or Sinking, VOUT = VEE or VCC, VCC = 5V 60 Sourcing or Sinking, VOUT = VEE or VCC, VCC = 2.7V 18 VCC = 5V, ISINK = 8mA, TAMB = +25ºC 0.2 ca ISC Output Short-Circuit Current 52 VCC = 5V, ISINK = 8mA, TAMB = -40 to +85ºC mA 0.4 0.55 V VCC = 2.7V, ISINK = 3.5mA, TAMB = +25ºC 0.15 VCC = 2.7V, ISINK = 3.5mA, TAMB = -40 to +85ºC 0.3 0.4 VCC = 5V, ISINK = 8mA, TAMB = +25ºC 4.6 VCC = 5V, ISINK = 8mA, TAMB = -40 to +85ºC 4.45 VCC = 2.7V, ISINK = 3.5mA, TAMB = +25ºC 2.4 VCC = 2.7V, ISINK = 3.5mA, TAMB = -40 to +85ºC 2.3 Revision 1.02 µA 4.85 V 2.55 4 - 18 AS1970 Data Sheet - Electrical Characteristics Table 4. Electrical Characteristics (Continued) tRISE OUTx Rise Time (AS1970/AS1972/AS1974 only) Conditions OUTx Fall Time tFALL Typ VCC = 5V, CLOAD = 15pF 32 VCC = 5V, CLOAD = 50pF 50 VCC = 5V, CLOAD = 200pF 80 VCC = 5V, CLOAD = 15pF 22 VCC = 5V, CLOAD = 50pF 32 VCC = 5V, CLOAD = 200pF 60 AS1970/AS1972/AS1974 only, CLOAD = 15pF, 10mV Overdrive 400 AS1970/AS1972/AS1974 only, CLOAD = 15pF, 100mV Overdrive 300 AS1971/AS1973/AS1975 only, CLOAD = 15pF, RPULLUP = 5.1kΩ, 10mV Overdrive Max Propagation Delay tPD+ ns 400 AS1971/AS1973/AS1975 only, CLOAD = 15pF, RPULLUP = 5.1kΩ, 100mV Overdrive 300 AS1970/AS1972/AS1974 only, CLOAD = 15pF, 10mV Overdrive 420 AS1970/AS1972/AS1974 only, CLOAD = 15pF, 100mV Overdrive 270 Power-Up Time tPU Units ns am lc s on A te G nt st il tPD- Min al id Parameter lv Symbol 20 ns µs Te ch ni ca 1. Inferred from the VOS test. Both or either inputs can be driven 0.3V beyond either supply rail without output phase reversal. 2. VOS is defined as the center of the hysteresis band at the input. 3. IB is defined as the average of the two input bias currents (IB-, IB+). 4. Guaranteed by design. www.austriamicrosystems.com Revision 1.02 5 - 18 AS1970 Data Sheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s 7 Typical Operating Characteristics Figure 3. Supply Current vs. Temperature (per comparator) Figure 4. Supply Current vs. Output Transition Frequency (per comparator) 1000 12 VCC = 5V 10 VCC = 3V 8 6 100 VCC = 5V 10 VCC = 2.7V lv 14 1 -40 -20 0 20 40 60 80 100 am lc s on A te G nt st il -60 0.1 Temp (°C) e VCC = 2.7V VCC = 5V 10 1 0.1 0.01 0.1 1 10 VCC = 2.7V 10 ca ni 1 60 50 40 Te 1 10 100 3.00 2.90 VCC = 5V 30 VCC = 2.7V 20 0.1 Figure 8. VOS vs. Temperature Offset Voltage (mV)] 70 VCC = 5V Output Source Current (mA) ch Output Sink Current (mA) e 80 1000 100 0.1 0.01 100 Figure 7. ISINK vs. Temperature 90 100 1000 Output Sink Current (mA) 100 10 Figure 6. VOH vs. ISOURCE ; VIN+ > VIN- Output High Voltage (mV) Output Low Voltage (mV) e 100 1 Output Transition Frequency (kHz) Figure 5. VOL vs. ISINK; VIN+ < VIN1000 al id 16 Supply Current (µA)e Supply Current (µA) e 18 10 2.80 2.70 2.60 2.50 2.40 2.30 2.20 2.10 0 2.00 -60 -40 -20 0 20 40 60 80 100 -60 -40 -20 Temperature (°C) www.austriamicrosystems.com 0 20 40 60 80 100 Temperature (°C) Revision 1.02 6 - 18 AS1970 Data Sheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s Figure 9. tPD+ vs. CLOAD; VCC = 3V, VOD = 50mV Figure 10. tPD+ vs. CLOAD; VCC = 5V, VOD = 50mV 450 To VOUT = 50% of Final Value 450 400 350 To VOUT = 10% of Final Value 300 250 400 To VOUT = 50% of Final Value 350 al id 500 300 250 To VOUT = 10% of Final Value 200 0 200 400 600 800 1000 0 200 Capacitive Load (pF) 600 800 1000 am lc s on A te G nt st il Figure 12. tPD+ vs. VOD 600 280 Propagation Delay Pt D+ (ns) ] To VOUT = 50% of Final Value 270 260 250 To VOUT = 10% of Final Value 240 500 400 VCC = 2.7V 300 VCC = 5V 200 -20 0 20 40 60 80 100 0 Temperature (°C) 40 80 VCC Out 50mV/Div 2V/Div ni ch Out Te 160 200 Figure 14. Power-Up Delay; VOD = 50mV ca Figure 13. 1MHz Response; VOD = 50mV 400ns/Div www.austriamicrosystems.com 120 Input Overdrive (mV) 2V/Div -40 2V/Div Propagation Delay Pt D+ (ns) ] 290 400 Capacitive Load (pF) Figure 11. tPD+ vs. Temperature; VOD = 50mV In+ lv Propagation Delay Pt D+ (ns) ] Propagation Delay Pt D+ (ns) ] 550 4µs/Div Revision 1.02 7 - 18 - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s 2V/Div al id In+ 100ns/Div Te ch ni ca am lc s on A te G nt st il 100ns/Div lv 2V/Div In+ Out 50mV/Div Figure 16. tPD-; VOD = 50mV 50mV/Div Figure 15. tPD+; VOD = 50mV Out AS1970 Data Sheet www.austriamicrosystems.com Revision 1.02 8 - 18 AS1970 Data Sheet - Detailed Description 8 Detailed Description The AS1970 - AS1975 are single/dual/quad low-power, comparators. The devices operate with a supply voltage range between 2.5 and 5.5V while consuming down to 8.5µA per comparator. Their common-mode input voltage range extends 0.25V beyond each rail. Internal hysteresis ensures clean output switching, even with slow input signals. Large internal output drivers allow railto-rail output swing with up to 8mA loads. al id The output stage design minimizes supply-current surges while switching, virtually eliminating the power supply transients typical. The AS1970/AS1972/AS1974 push/pull output stage sinks and sources current, wheras the AS1971/ AS1973/AS1975 open-drain output stage can be pulled beyond VCC to an absolute maximum of 5.5V > VEE. Input Stage lv The input common-mode voltage range extends from -0.25V to (VCC + 0.25V), and the comparators can operate at any differential input voltage within this voltage range. Input bias (IB) current is 1.0pA (typ) if the input voltage is within the common-mode voltage range. Output Stage am lc s on A te G nt st il Inputs are protected from over-voltage by internal ESD protection diodes connected to the supply rails. As the input voltage exceeds the supply rails, these diodes become forward biased and begin to conduct and the bias currents increase exponentially as the input voltage exceeds the supply rails. The push/pull and open-drain output stages were designed to provide rail-to-rail operation with up to 8mA loads. Even at loads of up to 8mA, the supply-current change during an output transition is extremely small (see Figure 4 on page 6). Figure 4 shows the minimal supply-current increase as the output switching frequency approaches 1MHz. This characteristic eliminates the need for power-supply filter capacitors to reduce glitches created by comparator switching currents. Te ch ni ca Because of the unique design of its output stage, the AS1970 - AS1975 can dramatically increase battery life, even in high-speed applications. www.austriamicrosystems.com Revision 1.02 9 - 18 AS1970 Data Sheet - Application Information 9 Application Information Figure 17 shows a typical application circuit for the AS1970 - AS1975 comparators. Figure 17. Typical Application Diagram – Threshold Detector VIN al id 2 4 VCC IN- RPULLUP † AS1970 - AS1975 1 3 lv OUT 5 IN+ VEE AS1971/AS1973/AS1975 only am lc s on A te G nt st il † Hysteresis (AS1970/AS1972/AS1974) The AS1970/AS1972/AS1974 have 3mV internal hysteresis. Additional hysteresis can be generated with three resistors using positive feedback (Figure 18), however this method also slows hysteresis response time. Figure 18. Additional Hysteresis AS1970/AS1972/AS1974 VCC R3 R1 VIN + – R2 VCC OUT VEE VREF ca Resistor Selection Example For the circuit shown in Figure 18, the following steps can be used to calculate values for R1, R2, and R3. ni 1. Select R3 first. The current through R3 should be at least 1µA to minimize errors caused by leakage current. The current through R3 at the trip point is: ch (VREF - VOUT)/R3 The two possible output states in solving for R3 yields these two formulas: (EQ 1) R3 = VREF/1µA (EQ 2) R3 = (VREF - VCC)/1µA (EQ 3) Te For example, for VREF = 1.2V and VCC = 5V, the two R3 resistor values are 1.2MΩ and 3.8MΩ. Use the smaller of the two resulting resistor values; in this case a standard 1.2MΩ resistor should be used for R3. 2. Choose the hysteresis band (VHB). For this example, use VHB = 50mV. 3. Calculate R1 according to the following equation: R1 = R3(VHB/VCC) (EQ 4) Substituting the example values for R3 and VHB gives: R1 = 1.2MΩ(50mV/5V) = 12kΩ www.austriamicrosystems.com Revision 1.02 10 - 18 AS1970 Data Sheet - Application Information 4. Choose the trip point for VIN rising (VTHR) (see page 12). This is the threshold voltage at which the AS1970 AS1975 switches its output from low to high as VIN rises above the trip point. For this example, choose VTHR = 3V. 5. Calculate R2 as: R2 = 1/[VTHR/(VREF x R1) - (1/R1) - (1/R3)] (EQ 5) Substituting the example values gives: R2 = 1/[3.0V/(1.2V x 12kΩ) - (1/12kΩ) - (1/1.2MΩ)] = 8.05kΩ al id In this example, a standard 8.2kΩ resistor should be used for R2. 6. Verify the trip voltages and hysteresis as: VTHR = VREF x R1[(1/R1) + (1/R2) + (1/R3)] (EQ 6) VTHF = VTHR - (R1 x VCC/R3) (EQ 7) Hysteresis = VTHR - VTHF lv (EQ 8) Hysteresis (AS1971/AS1973/AS1975) am lc s on A te G nt st il The AS1971/AS1973/AS1975 have 3mV internal hysteresis. Their open-drain outputs require an external pullup resistor (Figure 19), and additional hysteresis can be generated using positive feedback. Figure 19. Additional Hysteresis AS1971/AS1973/AS1975 VCC R3 R4 R1 VIN + – R2 VCC OUT VEE VREF Resistor Selection Example For the circuit shown in Figure 19, the following steps can be used to calculate values for R1, R2, R3, and R4: ca 1. Select R3 according to one of: R3 = VREF/500µA (EQ 9) R3 = (VREF - VCC)/500µA - R4 (EQ 10) ni Use the smaller of the two resulting resistor values. ch 2. Choose the hysteresis band required (VHB). For this example, use 50mV. 3. Calculate R1 as: R1 = (R3 + R4)(VHB/VCC) (EQ 11) Te 4. Choose the trip point for VIN rising (VTHR) (see page 12). This is the threshold voltage at which the comparator switches its output from low to high as VIN rises above the trip point. 5. Calculate R2 as: R2 = 1/[VTHR /(VREF x R1) - (1/R1) - 1/(R3 + R4)] (EQ 12) 6. Verify the trip voltages and hysteresis as follows: VIN rising: VTHR = VREF x R1 x [1/R1 + 1/R2 + 1/(R3 + R4)] (EQ 13) VIN falling: VTHF = VREF x R1 x [1/R1 + 1/R2 + 1/(R3+R4)] - 1/(R3+R4) x VCC (EQ 14) Hysteresis = VTHR - VTHF (EQ 15) www.austriamicrosystems.com Revision 1.02 11 - 18 AS1970 Data Sheet - Application Information Hysteresis Band Internal hysteresis creates two trip points (shown in Figure 20): rising input voltage (VTHR) and falling input voltage (VTHF). The area between the trip points is the hysteresis band (VHB). When the comparator input voltages are equivalent, the hysteresis effectively causes one comparator input to move quickly past the other, thus taking the input out of the region where oscillation occurs. In Figure 20 REF has a fixed voltage applied and IN+ is varied. If the inputs are reversed the output will be inverted. al id Figure 20. Threshold Hysteresis Band Thresholds IN+ VTHR Hysteresis Band VHB lv REF VTHF am lc s on A te G nt st il OUT Zero-Crossing Detector Figure 21 shows the AS1970 in a zero-crossing detector circuit. The inverting input is connected to ground, and the non-inverting input is connected to a 100mVp-p signal source. As the signal at the non-inverting input crosses 0V, the signal at OUT changes states. Figure 21. Zero-Crossing Detector 100mVp-p 3 + IN+ 4 – 1 OUT IN- AS1970 2 5 VCC VEE ca Logic Level Translator ni The comparators can be used as a 5V/3V logic translator as shown in Figure 22. The circuit in Figure 22 converts 5Vto 3V-logic levels, and provides the full 5V logic-swing without creating overvoltage on the 3V logic inputs. When the comparator is powered by a 5V supply, RPULLUP for the open-drain output should be connected to the +3V supply voltage. For 3V-to-5V logic-level translations, connect the +3V supply voltage to VCC and the +5V supply voltage to RPULLUP. ch Figure 22. Logic Level Translator 2 Te +3/+5V +3/+5V VCC AS1971 100kΩ 4 100kΩ +5/+3V Logic In IN3 RPullup + – IN+ 1 OUT +5/+3V Logic Out 5 VEE www.austriamicrosystems.com Revision 1.02 12 - 18 AS1970 Data Sheet - Application Information Layout Considerations The AS1970 - AS1975 requires proper layout and design techniques for optimum performance. ! ! Te ch ni ca am lc s on A te G nt st il lv al id ! Power-supply bypass capacitors are not typically needed, although 100nF bypass capacitors should be used when supply impedance is high, when supply leads are long, or when excessive noise is expected on the supply lines. Minimize signal trace lengths to reduce stray capacitance. A ground plane and surface-mount components are recommended. www.austriamicrosystems.com Revision 1.02 13 - 18 AS1970 Data Sheet - Package Drawings and Markings 10 Package Drawings and Markings The AS1970 - AS1975 are available in a 5-pin SOT23 package and an 8-pin MSOP package. am lc s on A te G nt st il lv al id Figure 23. 5-pin SOT23 Package Controlling dimension is millimeters. Foot length measured at intercept point between datum A and lead surface. Package outline exclusive of mold flash and metal burr. Package outline inclusive of solder plating. Meets JEDEC MO178. Te 1. 2. 3. 4. 5. Min Max 0.90 1.45 0.00 0.15 0.90 1.30 0.30 0.50 0.09 0.20 2.80 3.05 2.60 3.00 1.50 1.75 0.30 0.55 0.95 REF 1.90 REF 0º 8º ch Notes: ni ca Symbol A A1 A2 b C D E E1 L e e1 α www.austriamicrosystems.com Revision 1.02 14 - 18 AS1970 Data Sheet - Package Drawings and Markings am lc s on A te G nt st il lv al id Figure 24. 8-pin MSOP Package Symbol A A1 A2 D Typ 1.10 0.10 0.86 3.00 ±Tol Max ±0.05 ±0.08 ±0.10 Symbol b b1 c c1 Typ 0.33 0.30 0.18 0.15 ±Tol +0.07/-0.08 ±0.05 ±0.05 +0.03/-0.02 θ1 θ2 θ3 L L1 aaa bbb ccc e S 3.0º ±3.0º 12.0º 12.0º 0.55 0.95 BSC 0.10 0.08 0.25 0.65 BSC 0.525 BSC ±3.0º ±3.0º ±0.15 – – – – – 2.95 ±0.10 E E1 E2 E3 E4 R R1 t1 t2 4.90 3.00 2.95 0.51 0.51 0.15 0.15 0.31 0.41 ±0.15 ±0.10 ±0.10 ±0.13 ±0.13 +0.15/-0.08 +0.15/-0.08 ±0.08 ±0.08 – ch ni ca D2 Notes: All dimensions are in millimeters and all angles in degrees (unless otherwise noted). Datums B and C to be determined at datum plane H. Dimensions D and E1 are to be determined at datum plane H. Dimensions D2 and E2 are for the top package; dimensions D and E1 are for the bottom package. Cross section A-A to be determined at 0.13 to 0.25mm from the leadtip. Dimensions D and D2 do not include mold flash, protrusion, or gate burrs. Dimensions E1 and E2 do not include interlead flash or protrusion. Te 1. 2. 3. 4. 5. 6. 7. www.austriamicrosystems.com Revision 1.02 15 - 18 AS1970 Data Sheet - Package Drawings and Markings am lc s on A te G nt st il lv al id Figure 25. 14-pin TSSOP Package 1, 2 A A1 A2 L R R1 b b1 c c1 D E1 E 4.90 4.30 5.00 1.40 6.4 BSC 5.10 4.50 1, 2 Note 5 Symbol θ1 L1 aaa bbb ccc ddd e θ2 θ3 Variations 3, 8 e 4, 8 N 0.65mm Lead Pitch Min Nom Max 0º 8º 1.0 Ref 0.10 0.10 0.05 0.20 0.65 BSC 12º Ref 12º Ref 0.65 BSC 14 Note 6 ni Notes: 0.65mm Lead Pitch Min Nom Max 1.10 0.05 0.15 0.85 0.90 0.95 0.50 0.60 0.75 0.09 0.09 0.19 0.30 0.19 0.22 0.25 0.09 0.20 0.09 0.16 ca Symbol Te ch 1. All dimensions are in millimeters; angles in degrees. 2. Dimensions and tolerancing per ASME Y14.5M-1994. 3. Dimension D does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15mm per side. 4. Dimension E1 does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25mm per side. 5. Dimension b does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm total in excess of dimension b at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07mm for 0.5mm pitch packages. 6. Terminal numbers shown are for reference only. 7. Datums A and B to be determined at datum plane H. 8. Dimensions D and E1 to be determined at datum plane H. 9. This dimension applies only to variations with an even number of leads per side. For variations with an odd number of leads per package, the center lead must be coincident with the package centerline, datum A. 10. Cross section A-A to be determined at 0.10 to 0.25mm from the leadtip. www.austriamicrosystems.com Revision 1.02 16 - 18 AS1970 Data Sheet - Ordering Information 11 Ordering Information The comparators are available as the standard products shown in Table 5. Table 5. Ordering Information Model Marking Description Delivery Form Package ASI6 Low-Voltage Single Comparator, Push/Pull Tape and Reel 5-pin SOT23 AS1971-T ASI7 Low-Voltage Single Comparator, Open-Drain Tape and Reel 5-pin SOT23 AS1972 989 Low-Voltage Dual Comparator, Push/Pull Tubes AS1972-T 989 Low-Voltage Dual Comparator Push/Pull Tape and Reel al id AS1970-T 8-pin MSOP 8-pin MSOP AS1973 990 Low-Voltage Dual Comparator, Open-Drain Tubes AS1973-T 990 Low-Voltage Dual Comparator, Open-Drain Tape and Reel 8-pin MSOP AS1974 AS1974 Low-Voltage Quad Comparator, Push/Pull Tubes 14-pin TSSOP AS1974-T AS1974 Low-Voltage Quad Comparator, Push/Pull Tape and Reel 14-pin TSSOP lv 8-pin MSOP AS1975 Low-Voltage Quad Comparator, Open-Drain Tubes 14-pin TSSOP AS1975 Low-Voltage Quad Comparator, Open-Drain Tape and Reel 14-pin TSSOP Te ch ni ca am lc s on A te G nt st il AS1975 AS1975-T www.austriamicrosystems.com Revision 1.02 17 - 18 AS1970 Data Sheet Copyrights Copyright © 1997-2007, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies. al id Disclaimer am lc s on A te G nt st il lv Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or lifesustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. ni ca The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services. ch Contact Information Te Headquarters austriamicrosystems AG A-8141 Schloss Premstaetten, Austria Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01 For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com/contact www.austriamicrosystems.com Revision 1.02 18 - 18