Elantec EL2252 Dual 50 mhz comparator/pin receiver Datasheet

Dual 50 MHz Comparator/Pin Receiver
Features
General Description
# Fast responseÐ7 ns
# Inputs tolerate large overdrives
with no speed nor bias current
penalties
# Propagation delay is relatively
constant with variations of input
Slew Rate, overdrive,
temperature, and supply voltage
# Output provides proper CMOS or
TTL logic levels
# Hysteresis is available on-chip
# Large voltage gainÐ8000 V/V
# Not oscillation-prone
# Can detect 4 ns glitches
# MIL-STD-883 Rev. C compliant
The EL2252 dual comparator replaces the traditional input
buffer a attenuator a ECL comparator a ECL to TTL translator circuit blocks used in digital equipment. The EL2252 provides a quick 7 ns propagation delay while complying with
g 10V inputs. Input accuracy and propagation delay is maintained even with input signal Slew Rates as great as 4000 V/ms.
The EL2252 can run on supplies as low as b 5.2V and a 9V and
comply with ECL and CMOS inputs, or use supplies as great as
g 18V for much greater input range.
Applications
# Pin receiver for automatic test
equipment
# Data communications line
receiver
# Frequency counter input
# Pulse squarer
Ordering Information
Part No.
Temp. Range
Package
OutlineÝ
EL2252CN
0§ C to a 75§ C
14-Pin P-DIP
MDP0031
EL2252CM
0§ C to a 75§ C
20-Lead SOL
MDP0027
The EL2252 has a /TTL pin which, when grounded, restricts
the output VOH to a TTL swing to minimize propagation delay.
When left open, the output VOH increases to a valid CMOS
level.
The comparators are well behaved and have little tendency to
oscillate over a variety of input and output source and load
impedances. They do not oscillate even when the inputs are
held in the linear range of the device. To improve output stability in the presence of input noise, an internal 60 mV of hysteresis is available by connecting the HYS pin to V b .
Elantec’s products and facilities comply with MIL-I-45208A,
and other applicable quality specifications. For information on
Elantec’s processing, see Elantec document, QRA-1; ‘‘Elantec’s
Processing, Monolithic Integrated Circuits’’.
Connection Diagrams
14-Pin DIP
20-Pin SOL
2252 – 2
Top View
Note: All information contained in this data sheet has been carefully checked and is believed to be accurate as of the date of publication; however, this data sheet cannot be a ‘‘controlled document’’. Current revisions, if any, to these
specifications are maintained at the factory and are available upon your request. We recommend checking the revision level before finalization of your design documentation. Patent pending.
December 1995 Rev E
2252 – 1
Top View
© 1995 Elantec, Inc.
EL2252C
EL2252C
EL2252C
Dual 50 MHz Comparator/Pin Receiver
Absolute Maximum Ratings (TA e 25§ C)
Voltage between V a and Vb
Voltage at V a
Voltage between bIN and a IN pins
Output Current
Current into a IN, bIN, HYS
or /TTL
Internal Power Dissipation
Operating Ambient Temperature Range
Operating Junction Temperature
Storage Temperature Range
36V
18V
36V
12 mA
See Curves
b 25§ C to a 85§ C
150§ C
b 65§ to a 150C
5 mA
Important Note:
All parameters having Min/Max specifications are guaranteed. The Test Level column indicates the specific device testing actually
performed during production and Quality inspection. Elantec performs most electrical tests using modern high-speed automatic test
equipment, specifically the LTX77 Series system. Unless otherwise noted, all tests are pulsed tests, therefore TJ e TC e TA.
Test Level
I
II
III
IV
V
Test Procedure
100% production tested and QA sample tested per QA test plan QCX0002.
100% production tested at TA e 25§ C and QA sample tested at TA e 25§ C ,
TMAX and TMIN per QA test plan QCX0002.
QA sample tested per QA test plan QCX0002.
Parameter is guaranteed (but not tested) by Design and Characterization Data.
Parameter is typical value at TA e 25§ C for information purposes only.
DC Electrical Characteristics VS e g 15V; HYS and /TTL grounded; TA e 25§ C unless otherwise specified
Parameter
Description
Temp
Min
Typ
Max
Test Level
Units
EL2252C
Input Offset Voltage
1
TCVOS
Average Offset Voltage Drift
Full
7
IB
Input Bias Current at Null
25§ C
6
Full
Full
9
I
mV
13
III
mV
V
mV/C
16
I
mA
21
III
mA
1
I
mA
2
III
mA
IOS
Input Offset Current
25§ C
RIN, diff
Input Differential Resistance
25§ C
30
V
kX
RIN, comm
Input Common-Mode Resistance
25§ C
10
V
MX
CIN
Input Capacitance
25§ C
2
V
pF
VCM a
Positive Common-Mode
Input Range
Full
10
13
II
V
VCMb
Negative Common-Mode
Input Range
Full
b9
b 12
II
V
AVOL
Large Signal Voltage Gain
VO e 0.8V to 2.0V
25§ C
4000
8000
I
V/V
Full
3000
III
V/V
0.2
Full
2
TD is 3.3in
25§ C
VOS
EL2252C
Dual 50 MHz Comparator/Pin Receiver
DC Electrical Characteristics
VS e g 15V; HYS and /TTL grounded; TA e 25§ C unless otherwise specified Ð Contd.
Parameter
Description
Temp
Min
Typ
Max
Test Level
Units
CMRR
Common-Mode Rejection Ratio
(Note 1)
Full
70
95
II
dB
PSRR
Power-Supply Rejection Ratio
(Note 2)
Full
70
90
II
dB
VHYS
Peak-to-Peak Input Hysteresis
with HYS connected to Vb
25§ C
60
V
mV
VOH
High Level Output, CMOS Mode
TTL Mode
VOL
Low Level Output, I1 e 0
I1 e 5 mA
Full
4.0
4.6
5.1
II
V
Full
2.4
2.7
3.2
II
V
Full
b 0.2
0.2
0.8
II
V
Full
b 0.2
0.4
0.8
II
V
IS a
Positive Supply Current
Full
16
19
II
mA
ISb
Negative Supply Current
Full
17
20
II
mA
TD is 2.5in
EL2252C
AC Electrical Characteristics
VS e g 15V; CL e 10 pF; TA e 25§ C; TTL output threshold is 1.4V, CMOS output threshold is 2.5V; unless otherwise specified
Parameter
Description
Min
Typ
Max
Test Level
Units
TPD a , TPDb
Input to Output Propagation Delay,
0 k VIN k 5V, 500 mV Overdrive,
2000 V/ms Input Slew Rate
TTL Output Swing
6
CMOS Output Swing
TPD a , TPDb
III
ns
V
ns
III
ns
9
V
ns
1.25
V
ns
8
Input to Output Propagation Delay,
b 2V k VIN k b 1V, 500 mV Overdrive,
2 ns Input Rise Time
TTL Output Swing
CMOS Output Swing
TPDSYM
9
Propagation Delay Change between
Positive and Negative Input Slopes
5
Note 1: Two tests are performed with VCM e 0V to b9V and VCM e 0V to 10V.
Note 2: Two tests are performed with V a e 15V, Vb changed from b10V to b15V;
Vb e b15V, V a changed from 10V to 15V.
3
9
TD is 2.2in
EL2252C
EL2252C
Dual 50 MHz Comparator/Pin Receiver
AC Test Circuit
2252 – 3
Burn-In Circuit
2252 – 4
4
EL2252C
Dual 50 MHz Comparator/Pin Receiver
Typical Performance Curves
Input Bias Current
vs Small Overdrives
Input Bias Current
vs Large Overdrives
Bias Current vs
TemperatureÐInputs Balanced
Input Hysteresis Voltage
vs Temperature
2252 – 5
Input/Output Transfer
FunctionÐHYS Open
Input/Output Transfer
FunctionÐHYS Connected to V
2252 – 7
2252 – 6
5
EL2252C
Dual 50 MHz Comparator/Pin Receiver
Typical Performance Curves Ð Contd.
Supply Current vs
Supply Voltage
Supply Current vs Temperature
(VS e g 15V)
2252 – 8
Output DelayÐ0.5V Overdrive
Output DelayÐ0.5V Overdrive
2252 – 10
2252 – 9
Output with 50 MHz CMOS Input
Output with 50 MHz ECL Input
2252 – 11
2252 – 12
6
EL2252C
Dual 50 MHz Comparator/Pin Receiver
Typical Performance Curves Ð Contd.
4 ns TTL Glitch Detection
2252 – 13
Gain vs Frequency
Propagation Delay vs
Temperature, CMOS Input
Propagation Delay vs
Overdrive, CMOS Input
Propagation Delay vs
Temperature, ECL Input
Propagation Delay vs
Input Slew Rate, CMOS Input
2252 – 14
7
EL2252C
Dual 50 MHz Comparator/Pin Receiver
Typical Performance Curves Ð Contd.
Propagation Delay vs
Power Supply Voltage
Propagation Delay vs
Load Capacitance
2252 – 15
14-Lead Plastic DIP
Maximum Power Dissipation
vs Ambient Temperature
20-Lead SOL
Maximum Power Dissipation
vs Ambient Temperature
2252 – 16
2252 – 18
8
EL2252C
Dual 50 MHz Comparator/Pin Receiver
Simplified Schematic
One Comparator
2252 – 19
when the supplies are g 15V. This range diminishes over temperature and varies with processing; it is wise to set power supplies such that V a
is 5V more positive than the most positive input
signal and V b more negative than 6V below the
most negative input. g 12V supplies will easily
encompass all CMOS and ECL logic inputs. If
the input exceeds the device’s common-mode input capability, the EL2252 propagation delay
and input bias current will increase. Fault currents will occur with inputs a diode below V b or
above V a . No damage nor VOS shift will occur
even when fault currents within the absolute
maximum ratings.
Applications Information
The EL2252 is very easy to use and is relatively
oscillation-free, but a few items must be attended. The first is that both supplies should be bypassed closely. 1 mF tantalums are very good and
no additional smaller capacitors are necessary.
The EL2252 requires V b to be at least 5V to preserve AC performance. V a must be at least 6V
for a TTL output swing, 8V for CMOS outputs.
The input voltage range will be referred to the
more positive of the two inputs. That is, bringing
an input as negative as V b will not cause problems; it’s the other input’s level that must be considered. The typical input range is a 13/ b 12V
9
EL2252C
Dual 50 MHz Comparator/Pin Receiver
teresis are increased. The relationship between
the resistor and resulting hysteresis level is not
linear, but a 1.5k resistor will approximately
halve the nominal value.
Applications Information Ð Contd.
One of the few ways in which oscillations can be
induced is by connecting a high-Q reactive source
impedance to the EL2252 inputs. Such sources
are long wires and unterminated coaxial lines.
The source impedance should be de-Q’ed. One
method is to connect a series resistor to the
EL2252 input of around 100X value. More resistance will calm the system more effectively, but at
the expense of comparator response time. Another method is to install a ‘‘snubber’’ network from
comparator input to ground. A snubber is a resistor in series with a small capacitor, around 100X
and 33 pF. Each physical and electrical environment will require different treatments, although
many need none.
The time delay of the EL2252 will increase by
about 0.7 ns when using full hysteresis.
The EL2252 is specifically designed to be tolerent
of large inputs. It will exhibit very much increased delay times for input overdrives below
100 mV. If very small overdrives must be sensed,
the EL2018 or EL2019 comparators would be
good choices, although they lose accuracies with
signal input Slew Rates above 400 V/ms. The
EL2252 keeps its timing accuracy with input
Slew Rates between 100 V/ms and 4000 V/ms of
input Slew Rate.
The major use of the HYS pin is to suppress
noise superimposed on the input signal. By
shorting the HYS pin to V b a g 30 mV hysteresis is placed around the VOS of the comparator
input. Leaving the pin open, or more appropriately, grounding the HYS pin removes all hysteresis. Connecting a resistor between HYS and
V b allows an adjustment of the peak-to-peak
hysteresis level. Unfortunately, an external resistor cannot track the internal devices properly, so
temperature and unit-to-unit variations of hys-
The output stage drives tens of pF load capacitances without increased overshoot, but propagation delay increases about 1 ns per 10 pF. The
output circuit is not a traditional TTL stage, and
using an external pullup resistor will not change
the VOH. In general setting the output swing to
TTL (by grounding the /TTL pin) will optimize
overall propagation delay and g swing symmetry.
10
EL2252C
Dual 50 MHz Comparator/Pin Receiver
a input
* Connections:
b input
*
l
aV
*
l
l
bV
*
l
l
l
HYS
*
l
l
l
l
*
TTL
l
l
l
l
l
*
l
l
l
l
l
l output
*
l
l
l
l
l
l l
.subckt M2252
2
3
14
7
4
5
13
*
* Application Hints:
*
* Connect pin 4 to ground through 1000 MX resistor to inhibit
* Hysteresis; to invoke Hysteresis, connect pin 4 to Vb.
*
* Connect pin 5 to ground to invoke TTL VOH; pin 5 may left open
* for CMOS VOH.
*
* To facilitate .OP, set itl1 e 200, itl2 e 200, set node 27 to 13.8V,
* and node 30 to b12V.
*
*Input Stage
*
i1 22 7 1.7mA
r1 14 20 300
r2 14 21 300
q1 20 2 22 qn
q2 21 3 22 qn
q3 20 26 23 qn
q4 21 25 23 qn
q13 25 27 20 qp
q14 26 27 21 qp
v1 14 27 1.2V
r3 23 24 1.4k
d1 24 4 ds
r4 25 33 700
r5 26 33 700
q16 33 33 34 qn
q17 34 34 37 qn
v4 37 7 1.2V
*
* 2nd Stage
*
i2 30 7 3mA
i3 14 28 1.5mA
q7 0 35 28 qp
v2 44 0 1.2V
s1 44 35 5 0 swa
s2 45 35 5 0 swb
rsw 14 5 10k
11
TD is 6.7in
EL2252C Macromodel
EL2252C
EL2252C
Dual 50 MHz Comparator/Pin Receiver
EL2252C Macromodel Ð Contd.
TD is 3.1in
v3 45 0 2.5V
q5 0 26 30 qn
q6 28 25 30 qn
d3 0 28 ds
*
* Output Stage
*
i4 14 38 1mA
q8 38 38 39 qn
q9 32 32 39 qp
q10 7 28 32 qp
q11 14 38 40 qn 2
q12 7 28 13 qp 2
r6 40 13 50
c1 28 0 3pF
*
* Models
*
.model qn npn (is e 2eb15 bf e 120 tf e 0.2nS cje e 0.2pF cjc e 0.2pF ccs e 0.2pF)
.model qp pnp (is e 0.6eb15 bf e 60 tf e 0.2nS cje e 0.5pF cjc e 0.3pF ccs e 0.2pF)
.model ds d(is e 3eb12 tt e 0.05nS eg e 0.72V vj e 0.58)
.model swa vswitch (von e 0v voff e 2.5V)
.model swb vswitch (von e 2.5 voff e 0V)
.ends
General Disclaimer
Specifications contained in this data sheet are in effect as of the publication date shown. Elantec, Inc. reserves the right to make changes
in the circuitry or specifications contained herein at any time without notice. Elantec, Inc. assumes no responsibility for the use of any
circuits described herein and makes no representations that they are free from patent infringement.
December 1995 Rev E
WARNING Ð Life Support Policy
Elantec, Inc. products are not authorized for and should not be
used within Life Support Systems without the specific written
consent of Elantec, Inc. Life Support systems are equipment intended to support or sustain life and whose failure to perform
when properly used in accordance with instructions provided can
be reasonably expected to result in significant personal injury or
death. Users contemplating application of Elantec, Inc. products
in Life Support Systems are requested to contact Elantec, Inc.
factory headquarters to establish suitable terms & conditions for
these applications. Elantec, Inc.’s warranty is limited to replacement of defective components and does not cover injury to persons or property or other consequential damages.
Elantec, Inc.
1996 Tarob Court
Milpitas, CA 95035
Telephone: (408) 945-1323
(800) 333-6314
Fax: (408) 945-9305
European Office: 44-71-482-4596
12
Printed in U.S.A.