Features Maximum Continuous Load Current: 2500 mA at V IN of 2.5 V Boosting V OUT to 3.3 V Maximum Pulse Load Current of 3.5 A for GSM PAs (1 Slot) and PMIC support simultaneously, V IN=3.1 V, V OUT=3.4 V Up to 97% Efficient 4 External Components: 2520 case 0.47 µH Inductor and 0603 Case Size Input and Output Capacitors Input Voltage Range: 2.5 V to 5.5 V Fixed Output Voltage Options: 3.0 V to 5.0 V True Bypass Operation w hen V IN > Target V OUT Integrated Synchronous Rectifier True Load Disconnect The FAN48623 is a boost regulator designed to provide a minimum output voltage from a single-cell Li-Ion battery, even w hen the battery voltage is below system minimum. The output voltage regulation is guaranteed up to a maximum load current of 2500 mA. The regulator transitions smoothly betw een Bypass and normal Boost Mode. The device can be forced into Bypass Mode to reduce quiescent current. The FAN48623 is available in a 16-bump, 0.4 mm pitch, Wafer-Level Chip-Scale Package (WLCSP). Forced Bypass Mode V SEL Control to Optimize Target V OUT Short-Circuit Protection (SCP) VOUT VIN Low Operating Quiescent Current Battery 16-Bump, 1.81 mm x 1.81 mm, 0.4 mm Pitch, WLCSP Applications Boost for Low -Voltage Li-ion Batteries, Brow nout Prevention, System PMIC LDOs Supplies, and 2G/3G/4G RF PA Supplies The FAN48623 allow s systems to take advantage of new battery chemistries that can supply significant energy w hen the battery voltage is low er than the required voltage for system pow er ICs. By combining built-in pow er transistors, synchronous rectification, and low supply current, this IC provides a compact solution for systems using advanced LiIon battery chemistries. Smart Phones, Tablets, Portable Devices + CIN L1 Description 0.47µH COUT 10µF 2x22µF SW FAN48623 VSEL SYSTEM LOAD PGND AGND EN PG BYP Figure 1. Typical Application Ordering Information Part Number Output Operating Voltage (1) Temperature VSEL0 / VSEL1 Package Packing Device Marking FAN48623UC315X 3.150 / 3.330 JK FAN48623UC32JX 3.20 / 3.413 JD FAN48623UC33X 3.300 / 3.489 FAN48623UC35X FAN48623UC36FX 3.5 / 3.7 JE -40°C to 85°C 16-Ball, 4x4 Array, 0.4 mm Pitch, 250 µm Ball, Wafer-Level Chip-Scale Package (WLCSP) Tape & Reel JF 3.64/ 3.709 JG FAN48623UC50X 5.000 / 5.286 JL FAN48623UC50GX 5.000 / 5.190 JM Note: 1. Other output voltages are available on request. Please contact a ON Semiconductor Semiconductor representative. © 2013 Semiconductor Components Industries, LLC October-2017,Rev . 2 Publication Order Number: FAN48623/D FAN48623 — 2500 mA Synchronous TinyBoost® Regulator with Bypass Mode FAN48623 — 2500 mA, Synchronous TinyBoost® Regulator with Bypass Mode Q3B Q3A VIN CIN Q3 L1 BYPASS CONTROL Q1B Q1A VOUT SW COUT Q1 Q2 Synchronous Rectifier Control GND VSEL EN MODULATOR LOGIC AND CONTROL BYP PG Figure 2. Block Diagram Table 1. Recommended Components Component Description Vendor L1 0.47 µH, 20%, 5.3 A, 2520 Toko: DFE252010P- R47M Parameter Typ. Unit L 0.47 µH DCR (Series R) 27 mΩ CIN 10 µF, 20%, 10 V, X5R, 0603 TDK: C1608X5R1A106M C 10 µF COUT 2 x 22 µF, 20%, 10 V, X5R, 0603 TDK: C1608X5R1A226M080A C C 44 µF www.onsemi.com 2 FAN48623 — 2500 mA Synchronous TinyBoost® Regulator with Bypass Mode Typical Application EN PG A1 A2 VSEL NC B1 B2 BYP NC C1 C2 AGND D1 Figure 3. VIN A4 A3 A2 A1 B4 B4 B3 B2 B1 C4 C4 C3 C2 C1 D4 D4 D3 D2 D1 A4 A3 VOUT B3 SW C3 PGND D2 D3 Top-Through View (Bum ps Dow n) Figure 4. Bottom View (Bum ps Up) Pin Definitions Pin # Name Description A1 EN Enable. When this pin is HIGH, the circuit is enabled. A2 PG Pow er Good. This is an open-drain output. PG is actively pulled LOW if output falls out of regulation due to overload or if thermal protection threshold is exceeded. A3, A4 VIN Input Voltage. Connect to Li-Ion battery input pow er source. B1 VSEL Output Voltage Select. When boost is running, this pin can be used to select the output voltage. B3, B4 VOUT Output Voltage. Place COUT as close as possible to the device. C1 BYP Bypass. This pin can be used to activate Forced Bypass Mode. When this pin is LOW, the bypass sw itches (Q3 and Q1) are turned on and the IC is otherw ise inactive. C3, C4 SW Sw itching Node. Connect to inductor. D1 AGND Analog Ground. This is the signal ground reference for the IC. All voltage levels are measured w ith respect to this pin. AGND should be connected to PGND at a single point. D2 — D4 PGND Pow er Ground. This is the pow er return for the IC. The COUT bypass capacitor should be returned w ith the shortest path possible to these pins. B2, C2 NC No Internal Connection. Note: Bumps are present and should be tied to PGND. www.onsemi.com 3 FAN48623 — 2500 mA Synchronous TinyBoost® Regulator with Bypass Mode Pin Configuration Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol V IN Parameter Min. Max. Unit -0.3 6.5 V 6.0 V V IN Input Voltage V OUT V OUT Output Voltage V SW SW Node Voltage DC -0.3 6.0 Transient: 10 ns, 3 MHz -1.0 8.0 Other Pins ESD Electrostatic Discharge Protection Level (2) -0.3 6.5 Human Body Model, ANSI/ESDA/JEDEC JS-001-2012 2.0 Charged Device Model per JESD22-C101 1.5 V V kV TJ Junction Temperature -40 +150 °C TSTG Storage Temperature -65 +150 °C +260 °C TL Lead Soldering Temperature, 10 Seconds Note: 2. Lesser of 6.5 V or V IN + 0.3 V. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. ON Semiconductor does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter Min. Max. Unit V IN Supply Voltage 2.5 4.5 V IOUT Output Current 0 2500 mA TA Ambient Temperature -40 +85 °C TJ Junction Temperature -40 +125 °C Thermal Properties Junction-to-ambient thermal resistance is a function of application and board layout. This data is measured w ith four-layer ON Semiconductor evaluation boards (1 oz copper on all layers). Special attention must be paid not to exceed junction temperature TJ(max) at a given ambient temperate TA. Symbol θJA Parameter Junction-to-Ambient Thermal Resistance www.onsemi.com 4 Typical Unit 60 °C/W FAN48623 — 2500 mA Synchronous TinyBoost® Regulator with Bypass Mode Absolute Maximum Ratings Unless otherw ise noted and per Figure 1 minimum and maximum values are from V IN=2.5 V to 4.5 V and TA=-40°C to +85°C. Typical values are at V IN = 3.0 V and TA = 25°C for all output voltage options. Symbol IQ Parameter V IN Quiescent Current Conditions Min. Typ. Max. Unit Automatic Bypass Mode, V OUT_TARGET =3.3 V, V IN=3.6 V 140 190 µA Boost Mode, V OUT=3.3 V, V IN=3.0 V 135 180 µA Shutdow n, EN=0 V, V IN=3.0 V 4.0 12.0 µA Forced Bypass Mode, V IN=3.6 V 6.0 12.0 µA 0.5 1.0 µA ILK V OUT to V IN Reverse Leakage V OUT=5.0 V, EN=0 V, V IN=0 V ILK_OUT V IN to V OUT Leakage Current V OUT=0 V, EN=0 V, V IN=4.2 V 0.1 1.5 µA V UVLO Under-Voltage Lockout V IN Rising 2.20 2.35 V V UVLO_HYS Under-Voltage Lockout Hysteresis V IH Logic Level High EN, VSEL, BYP V IL Logic Level Low EN, VSEL, BYP RLOW IPD 200 mV 1.05 V 0.4 V Logic Control Pin Pull Dow ns (LOW Active) BYP, VSEL, EN 300 kΩ Weak Current Source Pull-Dow n BYP, VSEL, EN 100 nA 2.5 V ≤ V IN ≤ V OUT_TARGET -100 mV, DC, 0 to 2500 mA -1.0 4.0 % 2.5 V ≤ V IN ≤ V OUT_TARGET -100 mV, DC, PWM (CCM) Operation -1.0 2.5 % Boost Valley Current Limit V IN=2.5 V, V OUT=3.3 V 4.7 IV_LIM_SS Boost Valley Current Limit During Soft Start tSS Soft-Start EN HIGH to Regulation tRST FAULT Restart Timer V REG IV_LIM Output Voltage Accuracy 5.3 A V IN=2.5 V, V OUT=3.3 V 2.6 A 50 Ω Load, V OUT_TARGET = 3.3 V (Time from EN Rising Edge to 90% of V OUT_TARGET) 300 µs 20 ms Note: 3. Minimum and Maximum limits are verified by design, test, or statistical analysis. Typical (Typ.) numbers are not verified, but represent typical results. www.onsemi.com 5 FAN48623 — 2500 mA Synchronous TinyBoost® Regulator with Bypass Mode Electrical Specifications 98% 98% 96% 96% 94% 94% Efficiency Efficiency Unless otherw ise specified, TA = 25°C; circuit and components according to Figure 1. 92% 92% 90% 90% -40C 2.5 VIN 88% 88% 2.7 VIN +25C +85C 3.0 VIN 86% 86% 0 500 1000 1500 2000 0 2500 500 Figure 5. 1000 1500 2000 2500 Load Current (mA) Load Current (mA) Efficiency vs. Load Current and Input Voltage, V OUT=3.15 V Figure 6. Efficiency vs. Load Current and Tem perature, V IN=3.0 V, V OUT=3.15 V 98% 98% 96% 96% 94% Efficiency Efficiency 94% 92% 90% 88% 92% 90% 86% -40C 2.5 VIN 84% 88% 2.7 VIN +25C 3.0 VIN +85C 82% 86% 0 500 1000 1500 2000 2500 0 500 Load Current (mA) Figure 7. 1000 1500 2000 2500 Load Current (mA) Figure 8. Efficiency vs. Load Current and Tem perature, V IN=3.0 V, V OUT=3.3 V Efficiency vs. Load Current and Input Voltage, V OUT=3.3 V 98% 98% 96% 96% 94% Efficiency Efficiency 94% 92% 90% 88% 92% 90% 2.5 VIN 2.7 VIN 3.0 VIN 3.3 VIN 86% 84% -40C 88% +25C +85C 82% 86% 0 500 1000 1500 2000 2500 Load Current (mA) Figure 9. 0 500 1000 1500 2000 2500 Load Current (mA) Efficiency vs. Load Current and Input Voltage, V OUT=3.5 V www.onsemi.com 6 Figure 10. Efficiency vs. Load Current and Tem perature, V IN=3.0 V, V OUT=3.5 V FAN48623 — 2500 mA Synchronous TinyBoost™ Regulator with Bypass Mode Typical Characteristics (Continued) Unless otherw ise specified, TA = 25°C; circuit and components according to Figure 1. 96% 96% 94% 94% 92% 92% Efficiency Efficiency 90% 88% 86% 90% 84% 88% 2.5 VIN 82% -40C 3.0 VIN 86% 3.6 VIN 80% +25C +85C 4.2 VIN 78% 84% 0 500 1000 1500 2000 2500 0 500 Load Current (mA) Figure 11. 1000 1500 2000 Efficiency vs. Load Current and Input Voltage, V OUT=5.0 V Figure 12. 4.0% Efficiency vs. Load Current and Tem perature, V IN=3.6 V, V OUT=5.0 V 4.0% 2.5 VIN +25C 3.0% 3.0 VIN Output Regulation Output Regulation -40C 2.7 VIN 3.0% 2.0% 1.0% 0.0% -1.0% +85C 2.0% 1.0% 0.0% -1.0% -2.0% -2.0% 0 500 1000 1500 2000 0 2500 500 Figure 13. 1000 1500 2000 2500 Load Current (mA) Load Current (mA) Output Regulation vs. Load Current and Input Voltage, V OUT=3.15 V Figure 14. Output Regulation vs. Load Current and Tem perature, V IN=3.0 V, V OUT=3.15 V 4.0% 4.0% -40C 2.5 VIN 2.7 VIN 3.0% +25C 3.0% 3.0 VIN Output Regulation Output Regulation 2500 Load Current (mA) 2.0% 1.0% 0.0% -1.0% +85C 2.0% 1.0% 0.0% -1.0% -2.0% -2.0% 0 500 1000 1500 2000 2500 0 Load Current (mA) Figure 15. 500 1000 1500 2000 2500 Load Current (mA) Output Regulation vs. Load Current and Input Voltage, V OUT=3.3 V Figure 16. Output Regulation vs. Load Current and Tem perature, V IN=3.0 V, V OUT=3.3 V www.onsemi.com 7 FAN48623 — 2500 mA Synchronous TinyBoost™ Regulator with Bypass Mode Typical Characteristics Unless otherw ise specified, TA = 25°C; circuit and components according to Figure 1. 4.0% 4.0% 2.5 VIN 2.7 VIN 3.0 VIN 3.3 VIN +25C 3.0% +85C Output Regulation Output Regulation 3.0% -40C 2.0% 1.0% 0.0% -1.0% 2.0% 1.0% 0.0% -1.0% -2.0% -2.0% 0 1000 500 1500 2000 2500 0 500 Load Current (mA) Figure 17. 1000 1500 2000 2500 Load Current (mA) Output Regulation vs. Load Current and Input Voltage, V OUT=3.5 V Figure 18. Output Regulation vs. Load Current and Tem perature, V IN=3.0 V, V OUT=3.5 V 4.0% 4.0% 2.5 VIN 3.0% 4.2 VIN 2.0% 1.0% 0.0% -1.0% +25C 3.0% 3.6 VIN Output Regulation Output Regulation -40C 3.0 VIN +85C 2.0% 1.0% 0.0% -1.0% -2.0% -2.0% 0 500 1000 1500 2000 2500 0 500 Load Current (mA) Figure 19. 1000 1500 2000 Output Regulation vs. Load Current and Input Voltage, V OUT=5.0 V Figure 20. Output Regulation vs. Load Current and Tem perature, V IN=3.6 V, V OUT=5.0 V 220 200 -40C -40C +25C +25C 200 Quiescent Current (uA) 180 Quiescent Current (uA) 2500 Load Current (mA) +85C 160 140 +85C 180 160 140 120 120 100 2.5 3.0 3.5 4.0 2.5 4.5 3.0 3.5 4.0 4.5 5.0 5.5 Input Voltage (V) Input Voltage (V) Figure 21. Quiescent Current vs. Input Voltage and Tem perature, V OUT=3.15 V, Auto Bypass Figure 22. Quiescent Current vs. Input Voltage and Tem perature, V OUT=5.0 V, Auto Bypass www.onsemi.com 8 FAN48623 — 2500 mA Synchronous TinyBoost™ Regulator with Bypass Mode Typical Characteristics (Continued) Unless otherw ise specified, TA = 25°C; circuit and components according to Figure 1. 5 12 -40C Max Continuous Load (A) +85C Quiescent Current (uA) 4.5 3.3VOUT, 25C 4 3.3VOUT, 60C +25C 10 8 6 4 3.3VOUT, 85C 3.5 5.0VOUT, 25C 3 5.0VOUT, 60C 5.0VOUT, 85C 2.5 5.2VOUT, 25C 2 5.2VOUT, 60C 5.2VOUT, 85C 1.5 1 2 0.5 0 0 2.5 3.0 3.5 4.0 4.5 2.5 3.0 3.5 4.0 4.5 Input Voltage (V) Input Voltage (V) Figure 23. Quiescent Current vs. Input Voltage and Tem perature, V OUT=3.3 V, Forced Bypass Figure 24. Typical Maxim um Continuous Load vs. Input Voltage, Tem perature and Output Voltage 40 2,500 2,000 Frequency(kHz) Ripple (mV) 30 20 10 1,500 1,000 2.5 VIN 2.5 VIN 500 2.7 VIN 2.7 VIN 3.0 VIN 3.0 VIN 0 0 0 500 1000 1500 2000 2500 0 500 Figure 25. 1000 1500 2000 2500 Load Current (mA) Load Current (mA) Figure 26. Frequency vs. Load Current and Input Voltage, V OUT=3.15 V Output Ripple vs. Load Current and Input Voltage, V OUT=3.15 V 40 2,500 2,000 Frequency(kHz) Ripple (mV) 30 20 1,500 1,000 2.5 VIN 10 2.5 VIN 2.7 VIN 500 3.0 VIN 2.7 VIN 3.0 VIN 0 0 0 500 1000 1500 2000 2500 0 Figure 27. 500 1000 1500 2000 2500 Load Current (mA) Load Current (mA) Output Ripple vs. Load Current and Input Voltage, V OUT=3.3 V Figure 28. www.onsemi.com 9 Frequency vs. Load Current and Input Voltage, V OUT=3.3 V FAN48623 — 2500 mA Synchronous TinyBoost™ Regulator with Bypass Mode Typical Characteristics (Continued) Unless otherw ise specified, TA = 25°C; circuit and components according to Figure 1. 3,000 50 2.5 VIN 3.0 VIN 3.6 VIN 4.2 VIN 2,500 Frequency(kHz) Ripple (mV) 40 30 20 10 2,000 1,500 2.5 VIN 1,000 3.0 VIN 3.6 VIN 500 4.2 VIN 0 0 0 500 1000 1500 2000 0 2500 500 Figure 29. 1000 1500 2000 2500 Load Current (mA) Load Current (mA) Output Ripple vs. Load Current and Input Voltage, V OUT=5.0 V Figure 30. Frequency vs. Load Current and Input Voltage, V OUT=5.0 V VOUT (2V/div) VOUT (1V/div) IIN (500mA/div) IIN (500mA/div) EN (2V/div) EN (2V/div) 100µs/div PG (5V/div) Figure 31. 100µs/div PG (5V/div) Startup, 50 Ω Load, V IN=2.5 V, V OUT=3.15 V Figure 32. Startup, 50 Ω Load, V IN=3.0 V, V OUT=5.0 V VOUT (1V/div) IL (2A/div) IL (2A/div) VOUT (1V/div) PG (2V/div) 5ms/div 50µs/div PG (2V/div) Figure 33. Overload Protection, V IN=3.0 V, V OUT=5.0 V Figure 34. www.onsemi.com 10 Output Fault, V IN=3.0 V, V OUT=3.3 V FAN48623 — 2500 mA Synchronous TinyBoost™ Regulator with Bypass Mode Typical Characteristics (Continued) Unless otherw ise specified, TA = 25°C; circuit and components according to Figure 1 3.3V VOUT (200mV/div) VOUT (200mV/div) IOUT (1A/div) IOUT (1A/div) 100µs/div 100µs/div Figure 35. 5.0V Load Transient, 150-2000 m A, 10 µs Edge, V IN=3.0 V, V OUT=3.3 V Figure 36. Load Transient, 150-1000 m A, 10 µs Edge, V IN=3.6 V, V OUT=5.0 V VOUT (50mV/div) VOUT (200mV/div) 3.2V 3.0V VIN(200mV/div) 2.7V VIN(200mV/div) 20µs/div Figure 37. 3.3V 20µs/div Line Transient, 3.0-3.6 V IN, 10 µs Edge, 500 m A Load, V OUT=3.3 V Figure 38. VOUT (100mV/div) VSEL (2V/div) 20µs/div Figure 39. V SEL Step, V IN=3 V, V OUT=3.3 V, 500 m A Load www.onsemi.com 11 Line Transient, 2.7-3.0 V IN, 10 µs Edge, 500 m A Load, V OUT=3.3 V FAN48623 — 2500 mA Synchronous TinyBoost™ Regulator with Bypass Mode Typical Characteristics (Continued) FAN48623 is a synchronous boost regulator, typically operating at 2.5 MHz in Continuous Conduction Mode (CCM), w hich occurs at moderate to heavy load current and low V IN voltages. At light load, the regulator operates at Discontinuous Conduction Mode (DCM) to maintain high efficiency. w ith boost valley current limited to 50% of nominal level at Boost Mode. During SS Mode, V OUT is ramped up by stepping the internal reference. If V OUT fails to reach the voltage required during the SS ramp sequence w ithin 64 µs, a fault state is declared. FAN48623 uses a current-mode modulator to achieve excellent transient response and smooth transitions betw een CCM and DCM operation. Boost Mode (BST) The regulator includes a Bypass Mode that automatically activates w hen V IN is above the boost regulator’s set point. If V IN is above V OUT_TARGET w hen the SS Mode successfully completes, the device transitions directly to BPS Mode. Table 2. Operating States Table 4. EN and BYP Logic Table Mode Description Invoked When LIN Linear Startup V IN > V OUT SS Soft-Start Mode V IN <V OUT < V OUT_TARGET BST Boost Operating Mode V OUT = V OUT_TARGET BPS Bypass Mode V IN > V OUT_TARGET Startup and Shutdown (EN Pin) Table 3. Boost Startup Sequence LIN1 LIN2 SS Entry Exit End Timeout (µs) Mode V IN > V UVLO, V OUT > V IN-300 mV EN=1 TIMEOUT LIN2 V OUT > V IN-300 mV SS TIMEOUT FAUL T V OUT=V OUT_TARGET BST LIN1 Exit LIN1 or LIN2 Exit Bypass Mode (BPS) EN 0 1 BYP Mode VOUT 0 Shutdow n 0 1 Shutdow n 0 0 Forced Bypass V IN 1 Auto Bypass V OUT_TARGET or V IN (if V IN > V OUT_TARGET) FAULT State If EN is LOW, all bias circuits are off and the regulator is in Shutdow n Mode. During shutdow n, current flow is prevented from VIN to VOUT, as w ell as reverse flow from VOUT to VIN. During startup, keep DC current draw below 500 mA until the device successfully executes startup. It is recommended not to connect EN directly to VIN but use a GPIO voltage of 1.8 V to set the logic for the EN pin. The follow ing table describes the startup sequence. Start Mode This is a normal operating state of the regulator. The regulator enters the FAULT state under any of the follow ing conditions: SS V OUT fails to achieve the voltage required to advance from LIN state to SS state. V OUT fails to achieve the voltage required to advance from SS state to BST state. Boost valley current limit triggers for 2 ms during the BST state. V IN to V OUT voltage drop exceeds 160 mV during BPS state. V IN < V UVLO 512 If a fault is triggered, the regulator stops sw itching and presents a high-impedance path betw een VIN and VOUT. After w aiting 20 ms, an automatic restart is attempted. 1024 Power Good Linear Startup (LIN) When EN is HIGH and V IN > V UVLO, the regulator attempts to bring V OUT w ithin 300 mV of V IN using the internal fixed current source from V IN (Q3). The current is limited to the LIN1 (~1 A) set point. If V OUT reaches V IN-300 mV during LIN1 Mode, SS Mode is initiated. Otherw ise, LIN1 times out after 512 µs and LIN2 Mode is entered. Pow er good is defined as a 0-FAULT, 1-POWER GOOD, open-drain output. The Pow er Good pin (PG) signals w hen the regulator has successfully completed soft-start w ith no faults occurring. Pow er Good also functions as a w arning flag for high die temperature. PG is released HIGH w hen the soft-start sequence is successfully completed. Any FAULT state causes PG to be de-asserted. PG is not asserted during Forced Bypass exit to Boost Mode until the soft-start sequence is successfully completed. In LIN2 Mode, the current source is incremented to approximately 2 A. If V OUT fails to reach V IN-300 mV after 1024 µs, a fault state is declared. Soft-Start Mode (SS) Upon successful completion of the LIN Mode (V OUT>V IN300 mV), SS Mode begins and the regulator starts sw itching www.onsemi.com 12 FAN48623 — 2500 mA Synchronous TinyBoost™ Regulator with Bypass Mode Circuit Description Forced Bypass When the die temperature exceeds 125°C, PG de-asserts and the output remains regulated. PG is re-asserted w hen the device cools by approximately 20°C. The regulator shuts dow n if the die temperature exceeds 150°C. Restart occurs w hen the IC has cooled by approximately 20°C. Forced Bypass Mode is activated by pulling BYP pin LOW. Forced Bypass Mode initiates w ith a current limit on Q3 and then proceeds to the Bypass Mode w ith both Q1 and Q3 fully enhanced. To prevent reverse current to the battery, the device w aits until output discharges below V IN before entering Forced Bypass Mode. Automatic Bypass After the transition is complete, most of the internal circuitry is disabled to minimize quiescent current. OCP, UVLO and OTP are inactive in Forced Bypass Mode. In normal operation, the device automatically transitions from Boost Mode to Bypass Mode if V IN goes above V OUT_TARGET. In Bypass Mode, the device fully enhances both Q1 and Q3 to provide a very low impedance path from VIN to VOUT. Entry into the Bypass Mode is triggered w hen V IN > V OUT_TARGET and no sw itching has occurred during the past 10 µs. To soften the entry into Bypass Mode, Q3 is driven as a linear current source for the first 5 µs. Bypass Mode exit is triggered w hen V OUT reaches V OUT_TARGET. During Automatic Bypass Mode, the device is short-circuit protected by voltage comparator tracking the voltage drop from V IN to V OUT; if the drop exceeds 160 mV, a fault state is declared. By pulling BYP pin HIGH, the part transitions from Forced Bypass Mode to Boost Mode. During the transition, Q1 is off and Q3 is driven as a linear current source for the first 5 µs before entering Boost Mode. . With sufficient load to enforce CCM operation, the Bypass Mode to Boost Mode transition occurs at the target V OUT. The Bypass Mode exit threshold has a 50 mV hysteresis imposed at V OUT to prevent cycling betw een modes. The corresponding input voltage at the transition point is: VIN ≤ VOUT + ILOAD • (DCR L + R DS( ON)P ) || R DS( ON)BYP − 50mV (1) The Bypass Mode entry threshold has a 30 mV hysteresis imposed at V OUT to prevent cycling betw een modes. The transition from Boost Mode to Bypass Mode occurs at the target V OUT+30 mV. The corresponding input voltage is: VIN ≥ VOUT + ILOAD • (DCR L + R DS( ON)P ) + 30mV (2) www.onsemi.com 13 FAN48623 — 2500 mA Synchronous TinyBoost™ Regulator with Bypass Mode Over-Temperature Output Capacitance (COUT) Output Voltage Ripple Stability Output voltage ripple is inversely proportional to COUT. During tON, w hen the boost sw itch is on, all load current is supplied by COUT. Output ripple is calculated as: (4) The effective capacitance (CEFF ) of small, high-value, ceramic capacitors decrease as bias voltage increases, as illustrated in Figure 40. 24 ILOAD COUT (3) and V tON = tSW • D = tSW • 1 − IN V OUT 20 Capacitance (uF) VRIPPLE ( P − P ) = tON • 16 (4) therefore: V VRIPPLE ( P − P ) = tSW • 1 − IN VOUT 12 8 ILOAD • COUT (5) and 4 tSW = 0 0 1 2 3 4 5 6 7 8 9 10 DC Bias(V) Figure 40. CEFF for 22 µ F, 0603, X5R, 10 V-Rated Capacitor (TDK C1608X5R1A226M080AC) Stable operation is guaranteed w ith the minimum value of CEFF (CEFF(MIN) ), as outlined in Table 5. Table 5. Minimum CEFF Required for Stability Operating Conditions 1 fSW (6) As can be seen from Equation (5), the maximum V RIPPLE occurs w hen V IN is at minimum and ILOAD is at maximum. Voltage at VOUT For applications w here a foreign voltage source could be applied at VOUT, care should be taken to ensure V OUT never exceeds the Absolute Maximum Rating. Layout Recommendations CEFF(MIN) (µF) The layout recommendations below highlight various layers using different colors. 0 to 2500 9 0 to 2500 6 To minimize spikes at V OUT, COUT must be placed as close as possible to PGND and VOUT, as show n in Figure 41. VOUT (V) ILOAD (mA) 3.15 5.0 Note: 4. CEFF varies w ith manufacturer, material, and case size. Inductor Selection For thermal reasons, it is suggested to maximize the pour area for all planes other than SW. Especially the ground pour should be set to fill all available PCB surface area and tied to internal layers w ith a cluster of thermal vias. Recommended nominal inductance value is 0.47 µH. The FAN48623 employs valley-current limiting. Peak inductor current can reach 6.5 A for a short duration during overload conditions. Saturation effects cause the inductor current ripple to become higher under high loading as only the valley of the inductor current ripple is controlled. Startup Inrush Current Limit Input current limiting is in effect during soft-start, w hich limits the current available to charge COUT and any additional capacitance on the V OUT line. If the output fails to achieve regulation w ithin the set limit, a FAULT occurs, causing the circuit to shut dow n then restart after 20 ms. If the total combined output capacitance is very high, the circuit may not start on the first attempt, but eventually achieves regulation if no load is present. If a high-current load and high capacitance are both present during soft-start, the circuit may fail to achieve regulation and continually attempts softstart, only to have the output capacitance discharged by the load w hen in a FAULT state. Figure 41. Layout Recom m endation Refer to the section below recommendations for each layer. www.onsemi.com 14 for detailed layout FAN48623 — 2500 mA Synchronous TinyBoost™ Regulator with Bypass Mode Application Information Connect AGND directly to GND layer through a via. VOUT trace should be as wide and as short as possible, for low impedance. The ground area should be made as large as possible to help dissipate heat. Put as many as possible vias connected to ground plane(layer 2), to help dissipate heat. Figure 42. Top Layer Figure 43. Layer 2 should be a solid ground layer, to shield VOUT from capacitive coupling of the fast edges of SW node. Logic signals can be routed on this layer. Layer 2 SW trace should be as wide and as short as possible, and be isolated with GND area from any other sensitive traces. Figure 44. Layer 3 www.onsemi.com 15 FAN48623 — 2500 mA Synchronous TinyBoost™ Regulator with Bypass Mode VIN trace should go through CIN before going to VIN pins. Product D E X Y FAN48623UC315X 1.810 ±0.030 1.810 ±0.030 0.305 0.305 FAN48623UC32JX 1.810 ±0.030 1.810 ±0.030 0.305 0.305 FAN48623UC33X 1.810 ±0.030 1.810 ±0.030 0.305 0.305 FAN48623UC35X 1.810 ±0.030 1.810 ±0.030 0.305 0.305 FAN48623UC36FX 1.810 ±0.030 1.810 ±0.030 0.305 0.305 FAN48623UC50X 1.810 ±0.030 1.810 ±0.030 0.305 0.305 FAN48623UC50GX 1.810 ±0.030 1.810 ±0.030 0.305 0.305 www.onsemi.com 16 FAN48623 — 2500 mA Synchronous TinyBoost™ Regulator with Bypass Mode Product-Specific Dimensions 0.03 C F A E 2X B 0.40 A1 BALL A1 INDEX AREA D 0.40 (Ø0.21) Cu Pad (Ø0.30) Solder Mask Opening 0.03 C 2X RECOMMENDED LAND PATTERN (NSMD PAD TYPE) TOP VIEW 0.06 C 0.625 0.547 0.05 C C SEATING PLANE D SIDE VIEWS 0.005 Ø0.260±0.02 16X 0.40 D C B 0.40 (Y) ±0.018 A F 1 2 3 4 (X) ±0.018 BOTTOM VIEW Figure 45. 0.378±0.018 0.208±0.021 E C A B NOTES A. NO JEDEC REGISTRATION APPLIES. B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCE PER ASME Y14.5M, 1994. D. DATUM C IS DEFINED BY THE SPHERICAL CROWNS OF THE BALLS. E. PACKAGE NOMINAL HEIGHT IS 586 ± 39 MICRONS (547-625 MICRONS). F. FOR DIMENSIONS D,E,X, AND Y SEE PRODUCT DATASHEET. G. DRAWING FILNAME: MKT-UC016AF rev1 16-Ball, 4x4 Array, 0.4 m m Pitch, 250 µm Ball, Wafer-Level Chip-Scale Package (WLCSP) www.onsemi.com 17 FAN48623 — 2500 mA Synchronous TinyBoost™ Regulator with Bypass Mode Physical Dimensions PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor 19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax : 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: [email protected] N. Amer ican Technical Support: 800-282-9855 Toll Free USA/Canada. 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