Low Power, 3.3 V, RS-232 Line Drivers/Receivers ADM3202/ADM3222/ADM1385 FEATURES FUNCTIONAL BLOCK DIAGRAMS +3.3V INPUT 0.1µF + 10V C2+ +6.6V TO –6.6V VOLTAGE C2– INVERTER T1OUT T2 R2 *INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT Figure 1. General-purpose RS-232 data link Portable instruments Printers, palmtop computers, PDAs +3.3V INPUT 0.1µF + 10V C2+ +6.6V TO –6.6V VOLTAGE C2– INVERTER T2IN T1OUT T2 R2 EIA/TIA-232 OUTPUTS EIA/TIA-232 INPUTS* R2IN EN C5 0.1µF SD *INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT 00071-002 ADM3222 GND Figure 2. +3.3V INPUT T1IN V– C4 0.1µF 10V T1 T2IN T1OUT T2 T2OUT R1 R1OUT R1IN R2 R2OUT DD GND ADM1385 R2IN C3 0.1µF 10V C5 0.1µF EIA/TIA-232 OUTPUTS EIA/TIA-232 INPUTS* SD *INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT 00071-003 0.1µF + 10V C2+ +6.6V TO –6.6V VOLTAGE C2– INVERTER + CMOS OUTPUTS C1+ +3.3V TO +6.6V VCC VOLTAGE C1– V+ DOUBLER + CMOS INPUTS 0.1µF + 10V + The ADM3202 is available in a 16-lead PDIP, SOIC_W, and SOIC_N, as well as a space-saving 16-lead TSSOP. The ADM3222 is available in 18-lead PDIP and SOIC_W and in 20-lead SSOP and TSSOP. The ADM1385 is available in a 20-lead SSOP, which is pin-compatible with the LTC1385 CG. R1IN R2OUT Four external 0.1 μF charge pump capacitors are used for the voltage doubler/inverter, permitting operation from a single 3.3 V supply. The ADM1385 contains a driver disable mode and a complete shutdown mode. T2OUT R1 R1OUT The ADM3202/ADM3222/ADM1385 parts conform to the EIA-232E and CCITT V.28 specifications and operate at data rates up to 460 kbps. C4 0.1µF 10V V– T1 T1IN C3 0.1µF 6.3V + CMOS OUTPUTS C1+ +3.3V TO +6.6V VCC VOLTAGE C1– V+ DOUBLER + CMOS INPUTS 0.1µF + 10V + GENERAL DESCRIPTION The ADM3222 contains additional enable and shutdown circuitry. The EN input can be used to three-state the receiver outputs. The SD input is used to power down the charge pump and transmitter outputs, reducing the quiescent current to less than 0.5 μA. The receivers remain enabled during shutdown unless disabled using EN. EIA/TIA-232 INPUTS* R2IN ADM3202 APPLICATIONS The ADM3202/ADM3222/ADM1385 transceivers are high speed, 2-channel RS-232/V.28 interface devices that operate from a single 3.3 V power supply. Low power consumption and a shutdown facility (ADM3222/ADM1385) make them ideal for battery-powered portable instruments. R1IN R2OUT GND EIA/TIA-232 OUTPUTS T2OUT R1 R1OUT C5 0.1µF 00071-001 T2IN C4 0.1µF 10V V– T1 T1IN C3 0.1µF 6.3V + CMOS OUTPUTS C1+ +3.3V TO +6.6V VCC VOLTAGE C1– V+ DOUBLER + CMOS INPUTS 0.1µF + 10V + 460 kbps data rate Specified at 3.3 V Meets EIA-232E specifications 0.1 μF charge pump capacitors Low power shutdown (ADM3222 and ADM1385) PDIP, SOIC_N, SOIC_W, SSOP, and TSSOP options Upgrade for MAX3222/MAX3232 and LTC1385 ESD protection to IEC 1000-4-2 (801.2) on RS-232 pins (ADM3202 only) ±8 kV: contact discharge ±15 kV: air gap discharge Figure 3. Rev. E Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©1998–2011 Analog Devices, Inc. All rights reserved. ADM3202/ADM3222/ADM1385 TABLE OF CONTENTS Features .............................................................................................. 1 Pin Configurations (N, RN, RU, and RW Packages)................5 Applications....................................................................................... 1 Pin Configurations (RS and RU Packages)................................5 General Description ......................................................................... 1 Typical Performance Characteristics ..............................................6 Functional Block Diagrams............................................................. 1 General Description..........................................................................8 Revision History ............................................................................... 2 Circuit Description .......................................................................8 Specifications..................................................................................... 3 High Baud Rate..............................................................................9 Absolute Maximum Ratings............................................................ 4 Outline Dimensions ....................................................................... 10 ESD Caution.................................................................................. 4 Ordering Guide .......................................................................... 14 Pin Configurations and Function Descriptions ........................... 5 REVISION HISTORY 7/11—Rev. D to Rev. E Changes to Figure 3.......................................................................... 1 Changes to Table 2............................................................................ 4 Changes to Figure 17........................................................................ 8 Updated Outline Dimensions ....................................................... 10 Changes to Ordering Guide .......................................................... 14 8/06—Rev. C to Rev. D Changes to Table 1............................................................................ 3 Updated Outline Dimensions ....................................................... 10 Changes to Ordering Guide .......................................................... 12 9/05—Rev. B to Rev. C Updated Outline Dimensions ....................................................... 10 Changes to Ordering Guide .......................................................... 12 12/01—Rev. A to Rev. B Changes to Specifications Page....................................................... 2 Rev. E | Page 2 of 16 ADM3202/ADM3222/ADM1385 SPECIFICATIONS VCC = 3.3 V ± 0.3 V, C1 to C4 = 0.1 μF. All specifications TMIN to TMAX, unless otherwise noted. Table 1. Parameter DC CHARACTERISTICS Operating Voltage Range VCC Power Supply Current Shutdown Supply Current LOGIC Input Logic Threshold Low, VINL Input Logic Threshold High, VINH CMOS Output Voltage Low, VOL CMOS Output Voltage High, VOH Logic Pull-Up Current Output Leakage Current RS-232 RECEIVER EIA-232 Input Voltage Range EIA-232 Input Threshold Low EIA-232 Input Threshold High EIA-232 Input Hysteresis EIA-232 Input Resistance RS-232 TRANSMITTER Output Voltage Swing (RS-232) Output Voltage Swing (RS-562) Transmitter Output Resistance RS-232 Output Short-Circuit Current Output Leakage Current TIMING CHARACTERISTICS Maximum Data Rate Receiver Propagation Delay TPHL TPLH Transmitter Propagation Delay Receiver Output Enable Time Receiver Output Disable Time Transmitter Skew Receiver Skew Transition Region Slew Rate 1 Min Typ Max Unit Test Conditions/Comments 3.0 3.3 1.3 8 0.01 5.5 3 12 0.5 V mA mA μA No load RL = 3 kΩ to GND 0.8 V V V V μA μA TIN TIN IOUT = 1.6 mA IOUT = −1 mA TIN = GND to VCC 1 Receivers disabled 2.0 0.4 VCC − 0.6 5 −30 0.6 3 ±5.0 ±3.7 300 10 ±10 +30 1.2 1.6 0.4 5 7 V V V V kΩ ±25 V V Ω mA μA 2.4 ±5.2 ±15 460 5.5 kbps 0.4 0.4 0.3 200 200 30 300 10 1 1 1.2 30 μs μs μs ns ns ns ns V/μs VCC = 3.3 V, all transmitter outputs loaded with 3 kΩ to ground VCC = 3.0 V VCC = 0 V, VOUT = ±2 V SD = low, VOUT = 12 V VCC = 3.3 V, RL = 3 kΩ to 7 kΩ, CL = 50 pF to 1000 pF, one Tx switching RL = 3 kΩ, CL = 1000 pF Measured from +3 V to −3 V or −3 V to +3 V, VCC = +3.3 V; RL = 3 kΩ, CL = 1000 pF, TA = 25°C ADM1385: Input leakage current typically −10 μA when TIN = GND. Rev. E | Page 3 of 16 ADM3202/ADM3222/ADM1385 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 2. Parameter VCC V+ V− Input Voltages TIN RIN Output Voltages TOUT ROUT Short-Circuit Duration TOUT Power Dissipation (Derates 6 mW/°C above 50°C) Thermal Impedance, θJA N-16/N-18 (2-Layer Test Board) RW-16/RW-18 (4-Layer Test Board) R-16 (4-Layer Test Board) RU-16 (4-Layer Test Board) RU-20 (4-Layer Test Board) RS-20 (4-Layer Test Board) Operating Temperature Range Industrial (A Version) Storage Temperature Range Lead Temperature (Soldering, 10 sec) Rating −0.3 V to +6 V (VCC − 0.3 V) to +14 V +0.3 V to –14 V −0.3 V to (V+, +0.3 V) ±30 V Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION ±15 V −0.3 V to (VCC + 0.3 V) Continuous 450 mW 117°C/W 56°C/W 81°C/W 113°C/W 110°C/W 83°C/W −40°C to +85°C −65°C to +150°C JEDEC industry standard J-STD-020 Rev. E | Page 4 of 16 ADM3202/ADM3222/ADM1385 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS C1+ V+ 1 16 2 15 C1– 3 ADM3202 C2+ 4 TOP VIEW (Not to Scale) C2– 14 VCC GND T1OUT EN 1 18 SD C1+ 2 17 VCC V+ 3 ADM3222 16 GND C1– 4 15 T1OUT C2+ 5 TOP VIEW (Not to Scale) 14 R1IN C2– 6 13 R1OUT R1IN 5 12 R1OUT V– 6 11 T1IN V– 7 12 T1IN T2OUT 7 10 T2IN T2OUT 8 11 T2IN R2IN 8 9 R2OUT R2IN 9 10 R2OUT 00071-004 13 00071-005 PIN CONFIGURATIONS (N, R, RU, AND RW PACKAGES) Figure 5. N and RW Packages Pin Configuration Figure 4. N, R, RU, and RW Packages Pin Configuration PIN CONFIGURATIONS (RS AND RU PACKAGES) V+ 3 ADM3222 VCC 18 GND C1– 4 T1OUT C2+ 5 C1– C2+ 5 C2– 6 15 R1OUT V– 7 14 NC T2OUT 8 13 T1IN R2IN 9 12 T2IN R2OUT 10 11 NC 17 16 NC = NO CONNECT 20 SD C1+ 2 19 4 (SSOP/TSSOP) TOP VIEW (Not to Scale) DD 1 SD V+ 3 C2– 6 R1IN 19 VCC ADM1385 (SSOP) TOP VIEW (Not to Scale) 18 GND 17 T1OUT 16 R1IN 15 R1OUT V– 7 14 T1IN T2OUT 8 13 T2IN R2IN 9 12 R2OUT NC 10 11 NC NC = NO CONNECT 00071-007 C1+ 20 2 00071-006 EN 1 Figure 7. RS Package Pin Configuration Figure 6. RS and RU Packages Pin Configuration Table 3. Pin Function Descriptions Mnemonic VCC V+ V– GND C1+, C1– C2+, C2– TxIN TxOUT RxIN RxOUT EN SD SD DD NC Description Power Supply Input (3.3 V ± 0.3 V). Internally Generated Positive Supply (+6 V nominal). Internally Generated Negative Supply (−6 V nominal). Ground Pin. Must be connected to 0 V. External Capacitor 1 is connected between these pins. A 0.1 μF capacitor is recommended but larger capacitors up to 47 μF can be used. External Capacitor 2 is connected between these pins. A 0.1 μF capacitor is recommended but larger capacitors up to 47 μF can be used. Transmitter (Driver) Inputs. These inputs accept TTL/CMOS levels. Transmitter (Driver) Outputs. These are RS-232 signal levels (typically ±9 V). Receiver Inputs. These inputs accept RS-232 signal levels. An internal 5 kΩ pull-down resistor to GND is connected on each input. Receiver Outputs. These are CMOS output logic levels. (ADM3222 only) Receiver Enable. Active low. When low, the receiver outputs are enabled. When high, they are three-stated. (ADM3222 only) Shutdown Control. Active low. When low, the charge pump is shut down and the transmitter outputs are disabled. (ADM1385 only) Shutdown Control. When low, the charge pump is shut down and all transmitters and receivers are disabled. (ADM1385 only) Driver Disable. When low, the charge pump is turned off and the transmitters are disabled. The receivers remain active. No Connect. Rev. E | Page 5 of 16 ADM3202/ADM3222/ADM1385 TYPICAL PERFORMANCE CHARACTERISTICS 8 8 TOUT (HIGH) 6 6 4 2 2 V+, V– (V) 0 –2 –2 –4 –4 V– 0 200 –6 00071-008 TOUT (LOW) –6 –8 0 400 600 800 LOAD CAPACITANCE (pF) 1000 –8 1200 00071-011 Tx O/P VOLTAGE (V) V+ 4 0 Figure 8. Transmitter Output Voltage High/Low vs. Load Capacitance @ 460 kbps 2 10 4 6 8 LOAD CURRENT (mA) 12 Figure 11. Charge Pump V+, V− vs. Load Current 350 8 Tx O/P HIGH 6 300 V+ (IMPEDANCE) 4 IMPEDANCE (Ω) 250 0 –2 200 V– (IMPEDANCE) 150 100 –4 Tx O/P LOW 50 00071-009 –6 –8 2.7 2.9 3.1 VCC (V) 3.3 0 2.7 3.5 00071-012 Tx O/P (V) 2 2.9 3.1 VCC (V) 3.3 3.5 Figure 12. Charge Pump Impedance vs. VCC Figure 9. Transmitter Output Voltage vs. VCC 8 20 18 6 Tx O/P HIGH ICC @ 460kbps 16 4 14 ICC (mA) Tx O/P (V) 2 0 –2 12 ICC @ 230kbps 10 8 6 –4 00071-010 –8 0 2 4 6 8 LOAD CURRENT (mA) 10 00071-013 4 Tx O/P LOW –6 2 0 12 Figure 10. Transmitter Output Voltage Low/High vs. Load Current 0 1000 2000 LOAD CAPACITANCE (pF) Figure 13. Power Supply Current vs. Load Capacitance Rev. E | Page 6 of 16 3000 ADM3202/ADM3222/ADM1385 1 T T CH 1 5.00V CH 2 5.00V M1.00µs CH1 0V 00071-014 2 Figure 14. 460 kbps Data Transmission Rev. E | Page 7 of 16 ADM3202/ADM3222/ADM1385 GENERAL DESCRIPTION +3.3V INPUT 0.1µF + 10V C2+ +6.6V TO –6.6V VOLTAGE C2– INVERTER T2IN +3.3V INPUT C1+ +3.3V TO +6.6V VCC VOLTAGE C1– V+ DOUBLER 0.1µF + 10V C2+ +6.6V TO –6.6V VOLTAGE C2– INVERTER CMOS OUTPUTS T2IN + + T2 R1 R1IN R2 R2OUT R2IN R1 R1IN R2 R2OUT EIA/TIA-232 INPUTS* R2IN SD ADM1385 GND EIA/TIA-232 OUTPUTS *INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT Figure 17. ADM1385 Typical Operating Circuit S1 VCC S3 C1 S2 + C3 S4 V+ = 2VCC + VCC 00071-018 GND INTERNAL OSCILLATOR S1 C5 0.1µF FROM VOLTAGE DOUBLER C4 0.1µF 10V T2OUT T2OUT S3 V+ GND S2 C2 + S4 C4 + V– = –(V+) GND EIA/TIA-232 OUTPUTS INTERNAL OSCILLATOR Figure 19. Charge Pump Voltage Inverter EIA/TIA-232 INPUTS* *INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT 00071-015 ADM3202 Figure 15. ADM3202 Typical Operating Circuit Rev. E | Page 8 of 16 00071-019 C3 0.1µF 6.3V T1OUT T2 C5 0.1µF Figure 18. Charge Pump Voltage Doubler + T1 T1OUT R1OUT +3.3V INPUT V– C4 0.1µF 10V T1 T1IN DD If desired, larger capacitors (up to 10 μF) can be used for Capacitors C1 to C4. C2+ +6.6V TO –6.6V VOLTAGE C2– INVERTER V– C3 0.1µF 10V 00071-017 0.1µF + 10V CMOS INPUTS Capacitors C3 and C4 are used to reduce the output ripple. Their values are not critical and can be increased, if desired. Capacitor C3 is shown connected between V+ and VCC. It is also acceptable to connect this capacitor between V+ and GND. C1+ +3.3V TO +6.6V VCC VOLTAGE C1– V+ DOUBLER 00071-016 Figure 16. ADM3222 Typical Operating Circuit The charge pump voltage converter consists of a 200 kHz oscillator and a switching matrix. The converter generates a ±6.6 V supply from the input 3.3 V level. This is done in two stages by using a switched capacitor technique as illustrated in Figure 18 and Figure 19. First, the 3.3 V input supply is doubled to 6.6 V by using Capacitor C1 as the charge storage element. The +6.6 V level is then inverted to generate −6.6 V using C2 as the storage element. C3 is shown connected between V+ and VCC but is equally effective if connected between V+ and GND. GND SD ADM3222 GND Charge Pump DC to DC Voltage Converter R1OUT EIA/TIA-232 INPUTS* R2IN + EIA-232 to 5 V logic receivers CMOS OUTPUTS R2 + • T2IN R1IN EIA/TIA-232 OUTPUTS + 3.3 V logic to EIA-232 transmitters CMOS INPUTS R1 C5 0.1µF *INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT • T1IN T2OUT EN The internal circuitry consists of these main sections: • A charge pump voltage converter 0.1µF + 10V T2 R2OUT CIRCUIT DESCRIPTION 0.1µF + 10V T1OUT R1OUT CMOS OUTPUTS C4 0.1µF 10V V– T1 T1IN CMOS INPUTS C3 0.1µF 6.3V + The ADM3202/ADM3222/ADM1385 are modifications, enhancements, and improvements of the AD230 to AD241 family and derivatives. They are essentially plug-in compatible and do not have any materially different applications. C1+ +3.3V TO +6.6V VCC VOLTAGE C1– V+ DOUBLER + CMOS technology is used to keep the power dissipation to an absolute minimum, allowing maximum battery life in portable applications. 0.1µF + 10V + The ADM3202/ADM3222/ADM1385 are RS-232 line drivers/ receivers. Step-up voltage converters coupled with level-shifting transmitters and receivers allow RS-232 levels to be developed while operating from a single 3.3 V supply. ADM3202/ADM3222/ADM1385 Transmitter (Driver) Section HIGH BAUD RATE The drivers convert 3.3 V logic input levels into RS-232 output levels. With VCC = 3.3 V and driving an RS-232 load, the output voltage swing is typically ±6 V. The ADM3202/ADM3222 feature high slew rates permitting data transmission at rates well in excess of the EIA/RS-232E specifications. RS-232 voltage levels are maintained at data rates up to 460 kbps even under worst-case loading conditions. This allows high speed data links between two terminals and is suitable for the new generation ISDN modem standards that require data rates of 230 kbps. The slew rate is internally controlled to less than 30 V/μs to minimize EMI interference. Receiver Section The receivers are inverting level-shifters that accept RS-232 input levels and translate them into 3 V logic output levels. The inputs have internal 5 kΩ, pull-down resistors to ground and are protected against overvoltages up to ±30 V. Unconnected inputs are pulled to 0 V by the internal 5 kΩ, pull-down resistor. This results in a Logic 1 output level for unconnected inputs or for inputs connected to GND. The receivers have Schmitt-trigger inputs with a hysteresis level of 0.4 V. This ensures error-free reception for both noisy inputs and for inputs with slow transition times. Rev. E | Page 9 of 16 ADM3202/ADM3222/ADM1385 OUTLINE DIMENSIONS 0.800 (20.32) 0.790 (20.07) 0.780 (19.81) 16 9 1 8 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.100 (2.54) BSC 0.060 (1.52) MAX 0.210 (5.33) MAX 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) MIN 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) GAUGE PLANE SEATING PLANE 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.430 (10.92) MAX 0.005 (0.13) MIN 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) 073106-B COMPLIANT TO JEDEC STANDARDS MS-001-AB CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS. Figure 20. 16-Lead Plastic Dual In-Line Package [PDIP] Narrow Body (N-16) Dimensions shown in inches and (millimeters) 10.00 (0.3937) 9.80 (0.3858) 4.00 (0.1575) 3.80 (0.1496) 9 16 1 8 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122) 6.20 (0.2441) 5.80 (0.2283) 1.75 (0.0689) 1.35 (0.0531) SEATING PLANE 0.50 (0.0197) 0.25 (0.0098) 45° 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) Figure 21. 16-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-16) Dimensions shown in millimeters and (inches) Rev. E | Page 10 of 16 060606-A COMPLIANT TO JEDEC STANDARDS MS-012-AC CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. ADM3202/ADM3222/ADM1385 5.10 5.00 4.90 16 9 4.50 4.40 4.30 6.40 BSC 1 8 PIN 1 1.20 MAX 0.15 0.05 0.30 0.19 0.65 BSC COPLANARITY 0.10 0.20 0.09 0.75 0.60 0.45 8° 0° SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-153-AB Figure 22. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16) Dimensions shown in millimeters 10.50 (0.4134) 10.10 (0.3976) 9 16 7.60 (0.2992) 7.40 (0.2913) 8 1.27 (0.0500) BSC 0.30 (0.0118) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122) 10.65 (0.4193) 10.00 (0.3937) 0.75 (0.0295) 45° 0.25 (0.0098) 2.65 (0.1043) 2.35 (0.0925) SEATING PLANE 8° 0° 0.33 (0.0130) 0.20 (0.0079) COMPLIANT TO JEDEC STANDARDS MS-013-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 23. 16-Lead Standard Small Outline Package [SOIC_W] Wide Body (RW-16) Dimensions shown in millimeters and (inches) Rev. E | Page 11 of 16 1.27 (0.0500) 0.40 (0.0157) 03-27-2007-B 1 ADM3202/ADM3222/ADM1385 0.920 (23.37) 0.900 (22.86) 0.880 (22.35) 18 10 1 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 9 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.100 (2.54) BSC 0.060 (1.52) MAX 0.210 (5.33) MAX 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) MIN 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) GAUGE PLANE SEATING PLANE 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.430 (10.92) MAX 0.005 (0.13) MIN 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) 070706-A COMPLIANT TO JEDEC STANDARDS MS-001 CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS. Figure 24. 18-Lead Plastic Dual In-Line Package [PDIP] Narrow Body (N-18) Dimensions shown in inches and (millimeters) 7.50 7.20 6.90 11 20 5.60 5.30 5.00 1 8.20 7.80 7.40 10 0.65 BSC 0.38 0.22 SEATING PLANE 8° 4° 0° COMPLIANT TO JEDEC STANDARDS MO-150-AE Figure 25. 20-Lead Shrink Small Outline Package [SSOP] (RS-20) Dimensions shown in millimeters Rev. E | Page 12 of 16 0.95 0.75 0.55 060106-A 0.05 MIN COPLANARITY 0.10 0.25 0.09 1.85 1.75 1.65 2.00 MAX ADM3202/ADM3222/ADM1385 6.60 6.50 6.40 20 11 4.50 4.40 4.30 6.40 BSC 1 10 PIN 1 0.65 BSC 1.20 MAX 0.15 0.05 0.30 0.19 COPLANARITY 0.10 0.20 0.09 0.75 0.60 0.45 8° 0° SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-153-AC Figure 26. 20-Lead Thin Shrink Small Outline Package [TSSOP] (RU-20) Dimensions shown in millimeters 11.75 (0.4626) 11.35 (0.4469) 18 10 7.60 (0.2992) 7.40 (0.2913) 9 0.75 (0.0295) 0.25 (0.0098) 2.65 (0.1043) 2.35 (0.0925) 0.30 (0.0118) 0.10 (0.0039) COPLANARITY 0.10 10.65 (0.4193) 10.00 (0.3937) 1.27 (0.0500) BSC 0.51 (0.0201) 0.31 (0.0122) SEATING PLANE 45° 8° 0° 0.33 (0.0130) 0.20 (0.0079) COMPLIANT TO JEDEC STANDARDS MS-013-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 27. 18-Lead Standard Small Outline Package [SOIC_W] Wide Body (RW-18) Dimensions shown in millimeters and (inches) Rev. E | Page 13 of 16 1.27 (0.0500) 0.40 (0.0157) 060706-A 1 ADM3202/ADM3222/ADM1385 ORDERING GUIDE Model 1 ADM3202AN ADM3202ANZ ADM3202ARN ADM3202ARN-REEL ADM3202ARN-REEL7 ADM3202ARNZ ADM3202ARNZ-REEL ADM3202ARNZ-REEL7 ADM3202ARU ADM3202ARU-REEL ADM3202ARU-REEL7 ADM3202ARUZ ADM3202ARUZ-REEL ADM3202ARUZ-REEL7 ADM3202ARW ADM3202ARW-REEL7 ADM3202ARWZ ADM3202ARWZ-REEL ADM3202ARWZ-REEL7 ADM3222AN ADM3222ANZ ADM3222ARS ADM3222ARS-REEL ADM3222ARS-REEL7 ADM3222ARSZ ADM3222ARSZ-REEL ADM3222ARSZ-REEL7 ADM3222ARU ADM3222ARU-REEL ADM3222ARU-REEL7 ADM3222ARUZ ADM3222ARUZ-REEL ADM3222ARUZ-REEL7 ADM3222ARW ADM3222ARW-REEL ADM3222ARWZ ADM3222ARWZ-REEL ADM3222ARWZ-REEL7 ADM1385ARS ADM1385ARSZ ADM1385ARSZ-REEL ADM1385ARSZ-REEL7 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 16-Lead Plastic Dual In-Line Package [PDIP] 16-Lead Plastic Dual In-Line Package [PDIP] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Standard Small Outline Package [SOIC_N] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Standard Small Outline Package [SOIC_W] 16-Lead Standard Small Outline Package [SOIC_W] 16-Lead Standard Small Outline Package [SOIC_W] 16-Lead Standard Small Outline Package [SOIC_W] 16-Lead Standard Small Outline Package [SOIC_W] 18-Lead Plastic Dual In-Line Package [PDIP] 18-Lead Plastic Dual In-Line Package [PDIP] 20-Lead Shrink Small Outline Package [SSOP] 20-Lead Shrink Small Outline Package [SSOP] 20-Lead Shrink Small Outline Package [SSOP] 20-Lead Shrink Small Outline Package [SSOP] 20-Lead Shrink Small Outline Package [SSOP] 20-Lead Shrink Small Outline Package [SSOP] 20-Lead Thin Shrink Small Outline Package [TSSOP] 20-Lead Thin Shrink Small Outline Package [TSSOP] 20-Lead Thin Shrink Small Outline Package [TSSOP] 20-Lead Thin Shrink Small Outline Package [TSSOP] 20-Lead Thin Shrink Small Outline Package [TSSOP] 20-Lead Thin Shrink Small Outline Package [TSSOP] 18-Lead Standard Small Outline Package [SOIC_W] 18-Lead Standard Small Outline Package [SOIC_W] 18-Lead Standard Small Outline Package [SOIC_W] 18-Lead Standard Small Outline Package [SOIC_W] 18-Lead Standard Small Outline Package [SOIC_W] 20-Lead Shrink Small Outline Package [SSOP] 20-Lead Shrink Small Outline Package [SSOP] 20-Lead Shrink Small Outline Package [SSOP] 20-Lead Shrink Small Outline Package [SSOP] Z = RoHS Compliant Part. Rev. E | Page 14 of 16 Package Option N-16 N-16 R-16 R-16 R-16 R-16 R-16 R-16 RU-16 RU-16 RU-16 RU-16 RU-16 RU-16 RW-16 RW-16 RW-16 RW-16 RW-16 N-18 N-18 RS-20 RS-20 RS-20 RS-20 RS-20 RS-20 RU-20 RU-20 RU-20 RU-20 RU-20 RU-20 RW-18 RW-18 RW-18 RW-18 RW-18 RS-20 RS-20 RS-20 RS-20 ADM3202/ADM3222/ADM1385 NOTES Rev. E | Page 15 of 16 ADM3202/ADM3222/ADM1385 NOTES ©1998–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00071-0-7/11(E) Rev. E | Page 16 of 16