HV2116 8-Channel High Voltage Analog Switch Ordering Information Package Options VPP – VNN 28-lead plastic chip carrier Die HV2116PJ HV2116X 160V Features – E T E L O S B General Description O – ■ HVCMOS® technology for high performance Not recommended for new designs. Please use HV202 instead. ■ Very low quiescent power dissipation – 10µA This device is an 8-channel high-voltage analog switch integrated circuit (IC) intended for use in applications requiring high voltage switching controlled by low voltage control signals, such as ultrasound imaging and printers. Input data is shifted into an 8-bit shift register which can then be retained in an 8-bit latch. To reduce any possible clock feedthrough noise, Latch Enable (LE) should be left high until all bits are clocked in. Using HVCMOS technology, this switch combines high voltage bilateral DMOS switches and low power CMOS logic to provide efficient control of high voltage analog signals. ■ Output On-resistance typically 22 ohms ■ Low parasitic capacitances ■ DC to 10MHz analog signal frequency ■ -50dB typical output off isolation at 5MHz ■ CMOS logic circuitry for low power ■ Excellent noise immunity ■ On-chip shift register, and latch logic circuitry This IC is suitable for various combinations of high voltage supplies, e.g., for HV2116 +40V/-120V, or +80V/-80V or +150V/-10V. ■ Flexible high voltage supplies ■ Surface mount package available 13 13 Absolute Maximum Ratings* VDDlogic power supply voltage VPP - VNN supply voltage -0.5V to +18V 174V VPP positive high voltage supply -0.5V to +160V VNN Negative high voltage supply +0.5V to -160V Logic input voltages -0.5V to VDD +0.3V Analog signal range VNN to VPP Peak analog signal current/channel Storage temperature Power dissipation 3.0A -65°C to +150°C 1.2W *Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. 13-57 HV2116 – E T E L – OBSO Electrical Characteristics DC Characteristics (over recommended operating conditions unless otherwise noted) +25°C typ 26 max 32 25 22 27 32 25 22 27 30 18 18 20 23 ISIG = 200mA VNN = –80V 23 20 25 30 ISIG = 5mA 22 16 25 27 ISIG = 200mA VNN = –10V 20 5.0 20 20 13 22 5.0 1.0 10 15 µA VSIG = VPP–10V and VNN +10V DC Offset Switch Off 300 100 300 300 mV RL = 100KΩ DC Offset Switch On 500 100 500 500 mV RL = 100KΩ Characteristics Small Signal Switch (ON) Resistance Sym 0°C min max 30 RONS Small Signal Switch (ON) Resistance Matching ∆RONS Large Signal Switch (ON) Resistance RONL Switch Off Leakage Per Switch ISOL min +70°C min max 35 Units Test Conditions ISIG = 5mA VPP = 40V, ISIG = 200mA VNN = –120V ohms % ohms ISIG = 5mA VPP = 80V, VPP = 150V, ISW = 5mA, VPP = 80V, VNN = –80V VSIG = VPP–10V, ISIG = 1A Pos. HV Supply Current IPPQ 10 50 µA ALL SWS OFF Neg. HV Supply Current INNQ -10 -50 µA ALL SWS OFF Pos. HV Supply Current IPPQ 10 50 µA ALL SWS ON ISW = 5mA Neg. HV Supply Current INNQ -10 -50 µA ALL SWS ON ISW = 5mA 3.0 2.0 A VSIG ≤ 0.1% duty cycle Switch Output Peak Current Output Switch Frequency IPP Supply Current INN Supply Current 3.0 fSW 2.0 50 IPP INN KHz Duty Cycle = 50% 6.5 7.0 8.0 VPP = 40V, VNN = –120V 4.0 5.0 5.5 4.0 5.0 5.5 VPP = 150V, VNN = –10V 6.5 7.0 8.0 VPP = 40V, VNN = –120V 4.0 5.0 5.5 4.0 5.0 5.5 6.0 6.0 mA 10 10 µA mA mA VPP = 80V, VNN = –80V VPP = 80V, VNN = –80V 50KHz Output Switching Frequency with no load VPP = 150V, VNN = –10V Logic Supply Average Current IDD 6.0 Logic Supply Quiescent Current IDDQ 10 Data Out Source Current ISOR 0.45 0.45 0.70 0.40 mA VOUT = VDD - 0.7V Data Out Sink Current ISINK 0.45 0.45 0.70 0.40 mA VOUT = 0.7V 4.0 13-58 fCLK = 3MHz, – E T E L O S B O – HV2116 Electrical Characteristics AC Characteristics (over operating conditions VDD = 15V, unless otherwise noted) Characteristics Time to Turn Off VSIG* Sym 0°C min +25°C max tSIG(OFF) min typ +70°C max min max 200 Units ns Set Up Time Before LE Rises tSD 150 150 150 ns Time Width of LE tWLE 150 150 150 ns Clock Delay Time to Data Out tDO Set Up Time Data to Clock tSU 15 15 Hold Time Data from Clock th 35 35 Clock Freq 300 150 330 8.0 350 ns 20 ns 35 ns 3.0 3.0 3.0 MHz 50% duty cycle fDATA = fCLK/2 Turn On Time 2.0 2.0 2.0 µs VSIG = VPP -10V, RL = 10KΩ Turn Off Time 3.0 3.0 3.0 µs VSIG = VPP -10V, RL = 10KΩ 10 10 10 10 10 10 10 10 10 Maximum VSIG Slew Rate Off Isolation Switch Crosstalk Output Switch Isolation Diode Current fCLK Test Conditions dv/dt KO KCR VPP = 150V, VNN = -10V V/ns VPP = 80V, VNN = -80V VPP = 40V, VNN = -120V -30 -30 -33 -30 dB f = 5MHz, 1KΩ//15pF load -45 -45 -50 -45 dB f = 5MHz, 50Ω load -60 -60 -70 -60 dB f = 5MHz, 50Ω load 300 mA 300ns pulse width, 2.0% duty cycle IID 300 300 Off Capacitance SW to GND CSG(OFF) 5.0 17 5.0 12 17 5.0 17 pF 0V, 1MHz On Capacitance SW to GND CSG(ON) 25 50 25 38 50 25 50 pF 0V, 1MHz *Time required for analog signal to turn off before output switch turns off (critical timing). 13-59 13 13 HV2116 Electrical Characteristics AC Characteristics (over operating conditions VDD = 15V, unless otherwise noted) Characteristics Output Voltage Spike +25°C Sym min typ max Units +VSPK 1.0 VPP = 40V, VNN = -120V -VSPK 3.5 RL = 50Ω +VSPK 12 -VSPK 18 RL = 50Ω +VSPK 6.0 VPP = 150V, VNN = -10V -VSPK 9.0 RL = 50Ω V 1700 Charge Injection Test Conditions Q 850 600 VPP = 80V, VNN = -80V VPP = 80V, VNN = -80V, VSIG = 0V pC VPP = 80V, VNN = -80V, VSIG = 70V VPP = 80V, VNN = -80V, VSIG = -70V – E T E L O S B O – Operating Conditions Symbol Parameter Value voltage1, 3 VDD Logic power supply VPP Positive high voltage supply1, 3 10.0 V to 15.5 V 40V to VNN+ 160V supply1, 3 VNN Negative high voltage VIH High-level input voltage VIL Low-level input voltage 0V to 2.0V Analog signal voltage peak to peak2 VNN +10V to VPP -10 Operating free air-temperature 0°C to 70°C VSIG TA -10.0V to -120V VDD -2V to VDD Notes: 1 Power up/down sequence is arbitrary except GND must be powered-up first and powered-down last. 2 VSIG must be VNN ≤ VSIG ≤ VPP or floating during power up/down transistion. 3 Rise and fall times of power supplies VDD, VPP, and VNN should not be less than 1.0msec. 13-60 HV2116 Test Circuits VPP –10V VPP –10 VIN = 10 VP–P @5MHz ISOL RL 10KΩ VOUT 50Ω NC 50Ω VNN +10 VPP VPP VDD VNN VNN GND 15V VPP VPP VDD VNN VNN GND KCR = 20Log Switch OFF Leakage 15V VPP VPP VDD VNN VNN GND VOUT VIN Crosstalk – E T E L O S B O – VIN = 10 VP–P @5MHz 15V TON /TOFF Test Circuit VSIG VOUT IID VNN VOUT RL 100KΩ VPP VPP VDD VNN VNN GND KO = 20Log 15V RL VPP VPP VDD VNN VNN GND 15V VPP VPP VDD VNN VNN GND VOUT VIN Isolation Diode Current DC Offset ON/OFF OFF Isolation 13 +VSPK ∆VOUT VOUT VOUT 13 –VSPK 1000pF 50Ω VSIG 1KΩ +80V VPP VDD –80V VNN GND +15V RL VPP VPP VDD VNN VNN GND Q = 1000pF x ∆VOUT Output Voltage Spike Charge Injection 13-61 +15V 15V HV2116 Logic Timing Waveforms DN – 1 DN DATA IN 50% LE 50% DN + 1 50% 50% tWLE tSD 50% CLOCK 50% t SU th tDO DATA OUT 50% tOFF VOUT OFF (TYP) Logic Diagram tON 90% 10% ON – E T E L O S B O – LATCHES LEVEL SHIFTERS OUTPUT SWITCHES DIN D LE SW0 CLK D LE SW1 D LE SW2 D LE SW3 D LE SW4 D LE SW5 D LE SW6 D LE SW7 8 BIT SHIFT REGISTER DOUT VNN VPP VDD LE 13-62 HV2116 Truth Table D0 D1 D2 D3 D4 D5 D6 D7 LE SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7 L L OFF H L ON X L L OFF H L ON X L L OFF H L ON X L L OFF H L ON X L L OFF H L ON X L L OFF H L ON X L L OFF H L ON X L L OFF H L ON X H Notes: 1. The eight switches operate independently. 2. Serial data is clocked in on the L→ H transition CLK. 3. The switches go to a state retaining their present condition at the rising edge of LE. When LE is low the shift register data flows through the latch. 4. DOUT is high when switch 7 is on. 5. Shift register clockng has no effect on the switch states if LE is H. HOLD PREVIOUS STATE – E T E L O S B O – Typical Performance Curves Off Isolation vs Signal Voltage Frequency VDD = 15V, VPP/VNN = ±80V -120 5 -100 Off Isolation (db) 6 4 3 -80 -40 1 -20 10K 100K 1M 13 -60 2 13 10K 10M 100K 1M 10M Signal Voltage Frequency (Hz) CLK Frequency (Hz) Crosstalk vs Analog Signal Frequency VDD = 15V, VPP/VNN = ±80V -100 -90 Crosstalk (db) IDD Current (mA) IDD vs CLK Frequency VDD = 15V, VPP/VNN = ±80V, TA = 0°C to 70°C -80 70 ° C -70 0° C -60 -50 100K 1M 10M 100M Analog Signal Frequency (Hz) 13-63 HV2116 – E T E L – OBSO Typical Performance Curves RON vs Ambient Temp TA RON vs VPP /VNN VDD = 15V 40 40 35 35 RON (ohms) @ 5mA RON (ohms) VDD = 15V & VPP/VNN = ±80V 30 I SW = 5mA 25 20 ISW = 200mA TA = 125°C 30 TA = 75°C 25 TA = 25°C 20 15 TA = 0°C 10 10 TA = -55°C 5 5 15 0 0 -55 -25 0 25 50 75 100 125 150 40 VPP Ambient Temp TA (°C) VNN 60 -120 -100 Switch Current vs Switch Voltage Drop 100 120 140 160 180 200 -60 -40 -20 0 20 40 IPP/INN vs Output Switching Frequency VDD = 15V & VPP/VNN = ±80V VDD = 15V & VPP/VNN = ±80V 400 40 IPP/INN Average Current (mA) T A = 0 °C 300 TA = 25 °C 200 ISWITCH (mA) 80 -80 100 TA = 70 °C 0 -100 -200 TA = 125°C 30 T 70°C TAA == 70°C 20 TA = 25°C 10 TA = -55°C -300 -400 0 0 -4 -3 -2 -1 0 1 2 3 0 4 VSWITCH (volts) 100 Junction Temp T j vs Switch Peak Current VDD = 15V & VPP/VNN = ±80V 120 175 110 TA = 75°C 150 100 TDO (ns) Junction Temp Tj (°C) 400 TDO vs Ambient Temp TA VSIG Freq = 10KHz & Duty Cycle = 0.1% VDD = 15V & VPP/VNN = ±80V 200 300 200 HV Output Switching Freq (KHz) 125 100 TA = 25°C 75 90 80 70 50 60 25 50 0 40 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 -50 Switch Peak Current (A) -25 0 25 50 75 100 Ambient Temp TA (°C) 13-64 125 150 HV2116 Pin Configurations Package Outlines 28-Pin J-Lead Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Function SW3 SW3 SW2 SW2 N/C N/C SW1 SW1 SW0 SW0 VPP VNN GND VDD 25 Pin 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Function N/C DIN CLK LE DOUT SW7 SW7 SW6 SW6 N/C SW5 SW5 SW4 SW4 24 23 22 21 20 19 26 18 27 17 28 16 1 15 2 14 3 13 4 12 5 – E T E L O S B O – 6 7 8 9 10 11 top view 28-pin J-Lead Package 13 13 13-65