Analog Power AM2319P P - Channel Logic Level MOSFET These miniature surface mount MOSFETs utilize High Cell Density process. Low rDS(on) assures minimal power loss and conserves energy, making this device ideal for use in power management circuitry. Typical applications are voltage control small signal switch, power management in portable and battery-powered products such as computer portable electronics and other battery power application. • • • • PRODUCT SUMMARY VDS (V) rDS(on) (Ω) 0.20 @ VGS = -10 V -30 0.30 @ VGS = -4.5V ID (A) -2.1 -1.7 G Low rDS(on) Provides Higher Efficiency and Extends Battery Life Fast Switch Low Gate Charge Miniature SOT-23 Surface Mount Package Saves Board Space D S o ABSOLUTE MAXIMUM RATINGS (TA = 25 C UNLESS OTHERWISE NOTED) Symbol Maximum Units Parameter -30 Drain-Source Voltage VDS V VGS ±20 Gate-Source Voltage o TA=25 C a Continuous Drain Current o TA=70 C b Pulsed Drain Current a Continuous Source Current (Diode Conduction) ID TA=25 C a o ±10 IS -0.4 TA=70 C Operating Junction and Storage Temperature Range THERMAL RESISTANCE RATINGS Parameter a Maximum Junction-to-Ambient PD A 1.25 W 0.8 o TJ, Tstg -55 to 150 Symbol t <= 5 sec Steady-State A -1.7 IDM o Power Dissipation -2.1 RT HJA C Maximum Units 250 285 o C/W Notes a. Surface Mounted on 1” x 1” FR4 Board. b. Pulse width limited by maximum junction temperature 1 July, 2003 - Rev. A PRELIMINARY Publication Order Number: DS-AM2319_H Analog Power AM2319P o SPECIFICATIONS (TA = 25 C UNLESS OTHERWISE NOTED) Parameter Symbol Limits Unit Min Typ Max Test Conditions Static Zero Gate Voltage Drain Current IDSS Gate-Body Leakage Gate-Threshold Voltage A On-State Drain Current Forward Tranconductance Diode Forward Voltage A A -1 o VDS = -24 V, VGS = 0 V, T J = 55 C -10 IGSS VDS = 0 V, VGS = ±20 V ±100 VGS(th) VDS = VGS, ID = -250 uA -1.30 VDS = -5 V, VGS = -4.5 V -3 ID(on) Drain-Source On-Resistance VDS = -24 V, VGS = 0 V rDS(on) g fs VSD nA V A VGS = -10 V, ID = -2.1 A 0.20 VGS = -4.5 V, ID = -1.7 A 0.30 VDS = -5 V, ID = -2.1 A IS = -0.4 A, VGS = 0 V µA 2 -0.70 -1.2 Ω S V Dynamicb Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall-Time Qg Qgs Qgd t d(on) tr t d(off) tf VDS = -10 V, VGS = -5 V, ID = -2.1 A VDS = -10 V, ID = -1.1 A, RG = 50 Ω, VGEN = -10 V 3.4 0.8 1.5 8 18 52 39 nC ns Notes a. Pulse test: PW <= 300us duty cycle <= 2%. b. Guaranteed by design, not subject to production testing. Analog Power (APL) reserves the right to make changes without further notice to any products herein. APL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does APL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in APL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typical” must be validated for each customer application by customer’s technical experts. APL does not convey any license under its patent rights nor the rights of others. APL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the APL product could create a situation where personal injury or death may occur. Should Buyer purchase or use APL products for any such unintended or unauthorized application, Buyer shall indemnify and hold APL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that APL was negligent regarding the design or manufacture of the part. APL is an Equal Opportunity/Affirmative Action Employer. 2 July, 2003 - Rev. A PRELIMINARY Publication Order Number: DS-AM2319_H Analog Power AM2319P Typical Electrical Characteristics Figure 2. On-Resistance Variation with Drain Current and Gate Voltage Figure 1. On-Region Characteristics Figure 3. On-Resistance Variation Figure 4. On-Resistance Variation with Gate to Source Voltage with Temperature Figure 5. Transfer Characteristics Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature 3 July, 2003 - Rev. A PRELIMINARY Publication Order Number: DS-AM2319_H Analog Power AM2319P Typical Electrical Characteristics Figure 9. Capacitance Characteristic Figure 10. Gate Charge Characteristic Normalized Thermal Transient Impedance, Junction to Ambient Figure 11. Transient Thermal Response Curve 4 July, 2003 - Rev. A PRELIMINARY Publication Order Number: DS-AM2319_H Analog Power AM2319P Typical Electrical Characteristics Figure 12. Transconductance Variation With Current & Temperature Figure 13. Maximum Safe Operation Area Figure 14. SOT-3 Maximum Steady-State Variation Power Dissipation versus Copper Pad Area Figure 15. Maximum State-State Drain Current Versus Copper Pad Area 5 July, 2003 - Rev. A PRELIMINARY Publication Order Number: DS-AM2319_H Analog Power AM2319P Package Information 6 July, 2003 - Rev. A PRELIMINARY Publication Order Number: DS-AM2319_H