AAT AAT3190ITP-1-T1 Positive/negative charge pump for voltage bia Datasheet

AAT3190
Positive/Negative Charge Pump for Voltage Bias
General Description
Features
The AAT3190 charge pump controller provides the
regulated positive and negative voltage biases
required by active matrix thin-film transistor (TFT)
liquid-crystal displays (LCDs), charge-coupled
device (CCD) sensors, and organic light emitting
diodes (OLEDs). Two low-power charge pumps
convert input supply voltages ranging from 2.7V to
5.5V into two independent output voltages.
•
•
•
•
•
•
•
•
•
•
•
•
•
The dual low-power charge pumps independently
regulate a positive (VPOS) and negative (VNEG) output voltage. These outputs use external diode and
capacitor multiplier stages (as many stages as
required) to regulate output voltages up to ±25V.
Built-in soft-start circuitry prevents excessive inrush current during start-up. A high switching frequency enables the use of small external capacitors. The device’s shutdown feature disconnects
the load from VIN and reduces quiescent current to
less than 1.0µA.
ChargePump™
VIN Range: 2.7V to 5.5V
Adjustable ± Dual Charge Pump
Positive Supply Output Up to +25V
Negative Supply Output Down to -25V
Up to 30mA Output Current
1.0MHz Switching Frequency
<1.0µA Shutdown Current
Internal Power MOSFETs
Internally Controlled Soft Start
Fast Transient Response
Ultra-Thin Solution (No Inductors)
-40°C to +85°C Temperature Range
Available in 8-Pin MSOP or 12-Pin TSOPJW
Package
Applications
•
•
•
•
•
The AAT3190 is available in a Pb-free MSOP-8 or
TSOPJW-12 package and is specified over the
-40°C to +85°C operating temperature range.
CCD Sensor Voltage Bias
OLEDs
Passive-Matrix Displays
Personal Digital Assistants (PDAs)
TFT Active-Matrix LCDs
Typical Application
INPUT
EN
IN
EN
DRVN
AAT3190
DRVP
NEGATIVE
OUTPUT
FBN
REF
FBP
POSTIVE
OUTPUT
GND
3190.2006.01.1.2
1
AAT3190
Positive/Negative Charge Pump for Voltage Bias
Pin Description
Pin #
MSOP-8
TSOPJW-12
Symbol
Function
1
5
FBP
Positive charge pump feedback input. Regulates to 1.2V
nominal. Connect feedback resistive divider to analog
ground (GND).
2
4
EN
Enable input. When EN is pulled low, the device shuts off
and draws only 1.0µA. When high, it is in normal operation. Drive EN through an external resistor.
3
3
REF
Internal reference bypass terminal. Connect a 0.1µF capacitor from this terminal to analog ground (GND). External
load capability to 50µA. REF is disabled in shutdown.
4
2
FBN
Negative charge pump regulator feedback input. Regulates
to 0V nominal. Connect feedback resistive divider to the
reference (REF).
5
12
DRVP
Positive charge pump driver output. Output high level is VIN
and low level is PGND.
6
8, 9, 10, 11
GND
Ground.
7
7
DRVN
Negative charge pump driver output. Output high level is
VIN and low level is PGND.
8
1
VIN
Input voltage: 2.7V to 5.5V.
Pin Configuration
MSOP-8
(Top View)
2
2
REF
3
FBN
4
2
EN
1
1
FBP
TSOPJW-12
(Top View)
8
VIN
7
DRVN
6
GND
5
DRVP
VIN
FBN
REF
EN
FBP
N/C
1
12
2
11
3
10
4
9
5
8
6
7
DRVP
GND
GND
GND
GND
DRVN
3190.2006.01.1.2
AAT3190
Positive/Negative Charge Pump for Voltage Bias
Absolute Maximum Ratings1
Symbol
VIN
VEN
VN_CH
VP_CH
Other Inputs
IMAX
TJ
TLEAD
Description
Input Voltage
EN to GND
DRVN to GND
DRVP to GND
REF, FBN, FBP to GND
Continuous Current Into DRVN, DRVP
All Other Pins
Operating Junction Temperature Range
Maximum Soldering Temperature (at leads, 10 sec)
Value
Units
-0.3 to 6
-0.3 to 6
-0.3V to (VIN + 0.3V)
-0.3V to (VIN + 0.3V)
-0.3V to (VIN + 0.3V)
±200
±10
-40 to 150
300
V
V
V
V
V
mA
°C
°C
Thermal Information2
Symbol
Description
ΘJA
Thermal Resistance
PD
Maximum Power Dissipation (TA = 25°C)
Value
MSOP-8
TSOPJW-12
MSOP-83
TSOPJW-12 4
150
160
667
625
Units
°C/W
mW
1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum Rating should be applied at any one time.
2. Mounted on an FR4 board.
3. Derate 6.7mW/°C above 25°C.
4. Derate 6.25mW/°C above 25°C.
3190.2006.01.1.2
3
AAT3190
Positive/Negative Charge Pump for Voltage Bias
Electrical Characteristics
VIN = 5.0V, CREF = 0.1µF, TA = -40°C to +85°C. Unless otherwise noted, typical values are TA = 25°C.
Symbol
VIN
Description
Input Supply Range
UVLO
Input Under-Voltage Threshold
IIN
Input Quiescent Supply Current
ISD
Shutdown Supply Current
FOSC
Operating Frequency
Negative Low-Power Charge Pump
VFBN
FBN Regulation Voltage
IFBN
FBN Input Bias Current
RDSNCHN
DRVN NCH On-Resistance
RDSPCHMIN MIN DRVN PCH On-Resistance
RDSPCHMAX
MAX DRVN PCH On-Resistance
Positive Low-Power Charge Pump
VFBP
FBP Regulation Voltage
IFBP
FBP Input Bias Current
RDSPCHP
DRVP PCH On-Resistance
RDSNCHMIN MIN DRVP NCH On-Resistance
RDSNCHMIN MAX DRVP NCH On-Resistance
Reference
Reference Voltage
VREF
Reference Under-Voltage
Threshold
Logic Signals
VIL
Input Low Voltage
VIH
Input High Voltage
IIL
Enable Input Low Current
IIH
Enable Input High Current
Thermal Limit
TSD
Over-Temperature Shutdown
Threshold
THYST
Over-Temperature Shutdown
Hysteresis
4
Conditions
Min
Typ
2.7
VIN Rising
VIN Falling, 40mV Hysteresis (typ)
VFBP = 1.5V, VFBN = -0.2V,
No Load on DRVN and DRVP
VEN = 0V
0.8
VFBN = -50mV
-100
-100
VFBP = 1.5V
1.15
-60
-2.0µA < IREF < 50µA
VREF Rising
1.18
5.5
V
800
µA
0.1
1.0
1.0
1.2
µA
MHz
0
+100
+100
5.0
5.0
mV
nA
Ω
Ω
kΩ
1.25
+100
5.0
15
V
nA
Ω
Ω
kΩ
1.22
V
V
0.5
V
V
µA
µA
1.2
1.0
3
20
VFBP = 1.15V, VIN = 4V
VFBP = 1.25V, VIN = 4V
Units
1.8
1.6
400
1.5
1.0
20
VFBN = 100mV, VIN = 4V
VFBN = -100mV, VIN = 4V
Max
1.2
0.8
V
1.5
VIN = 5.0V, FBP = 1.5V, FBN = -0.2V
VIN = 5.0V, FBP = 1.5V, FBN = -0.2V
1
1
140
°C
15
°C
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AAT3190
Positive/Negative Charge Pump for Voltage Bias
Typical Characteristics
Switching Frequency vs. Temperature
Quiescent Current vs. Temperature
1000
VFBP = 1.5V
VFBN = -0.2V
330
Frequency (kHz)
Quiescent Current (µA)
350
310
290
270
250
-40
-15
10
35
60
950
900
850
800
85
-40
-15
10
35
60
85
Temperature (°°C)
Temperature (°C)
Reference Voltage vs. Temperature
Maximum VOUT vs. VIN
(IOUT = 5mA and 15mA)
Output Voltage (V)
Reference Voltage (V)
1.22
1.21
1.2
1.19
1.18
-40
-15
10
35
60
85
15
12.5
10
7.5
5
2.5
0
-2.5
-5
-7.5
-10
-12.5
-15
2.5
IOP = 5mA
IOP = 15mA
ION = 15mA
ION = 5mA
3
3.5
Positive Output Voltage vs. Load Current
4.5
5
5.5
Negative Output Voltage vs. Load Current
(TA = 25°°C)
(TA = 25°°C)
12.4
-6.5
VIN = 5.0V
VIN = 5.0V
-6.75
VNEG (V)
12.2
VPOS (V)
4
Input Voltage (V)
Temperature (°C)
12
11.8
11.6
-7
-7.25
-7.5
-7.75
11.4
0
5
10
15
20
IPOS (mA)
3190.2006.01.1.2
25
30
35
40
-8
0
10
20
30
40
INEG (mA)
5
AAT3190
Positive/Negative Charge Pump for Voltage Bias
Typical Characteristics
Positive Output Efficiency vs. Load Current
Negative Output Efficiency vs. Load Current
(VIN = 5.0V)
(VIN = 5.0V)
80
70
85°C
60
50
40
50
40
30
20
20
10
20
30
25°C
60
30
0
85°C
70
Efficiency (%)
Efficiency (%)
80
25°C
VPOS = 12.3V
40
VNEG = -7.3V
0
10
IPOS (mA)
0
100
-10
50
-20
0
-30
-50
-40
-100
VNEG (bottom trace)
(50mV/div)
10
250
20
200
10
150
0
100
-10
50
-20
0
-30
-50
-40
-50
-100
-50
-60
-150
-60
Time (50µs/div)
Time (50µs/div)
AAT3190 Power-Up Sequence
4
0
-4
2
16
0
-2
VPOS
-4
-6
VNEG
-8
4
Enable
2
12
8
4
0
-2
VPOS
-4
0
-4
-8
-10
-8
-12
-12
-12
Time (500µs/div)
6
20
VPOS and VNEG
(bottom traces, V)
8
4
-6
VNEG
-8
-10
-12
Enable
(top trace, V)
12
AAT3190-1 Power-Up Sequence
Enable
(top trace, V)
VPOS and VNEG
(bottom traces, V)
16
INEG (top trace)
(10mA/div)
200
150
IPOS (top trace)
(10mA/div)
VPOS (bottom trace)
(50mV/div)
20
Enable
40
VNEG Load Transient
250
20
30
INEG (mA)
VPOS Load Transient
-150
20
Time (500µs/div)
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AAT3190
Positive/Negative Charge Pump for Voltage Bias
Typical Characteristics
Positive Output Voltage vs. Load Current
Output Ripple
(T = 85°°C)
(VPOS = 12.3V; IPOS = 5mA; VNEG = 7.2V; INEG = 10mA)
12.4
VIN = 5.0V
12.2
VPOS (V)
VPOS
(10mV/div)
12
11.8
11.6
VNEG
(10mV/div)
11.4
0
10
Time (500ns/div)
Negative Output Voltage vs. Load Current
(T = 85°°C)
-6.5
20
40
AAT3190 Reference Under-Voltage Threshold
(120µF capacitor placed across REF to limit rate of rise
of REF for test purposes only)
VIN = 5.0V
-6.75
30
IPOS (mA)
SHDN
(2V/div)
VNEG (V)
-7
-7.25
REF
(0.2V/div)
0.5V
-7.5
DRVN
(2V/div)
-7.75
-8
0
10
20
INEG (mA)
3190.2006.01.1.2
30
40
Time (500ns/div)
7
AAT3190
Positive/Negative Charge Pump for Voltage Bias
Functional Block Diagram
IN
DRVP
UVLO
EN
Control
DRVN
Reference
Oscillator
OverTemperature
Protection
GND
+
FBP
-
Band
Gap
Ref.
REF
-
FBN
+
Functional Description
Dual Charge Pump Regulators
The AAT3190 provides low-power regulated output
voltages from two individual charge pumps. Using
a single stage, the first charge pump inverts the
supply voltage (VIN) and provides a regulated negative output voltage. The second charge pump doubles VIN and provides a regulated positive output
voltage. These outputs use external Schottky
diodes and capacitor multiplier stages (as many as
required) to regulate up to ±25V. A constant switching frequency of 1MHz minimizes the output ripple
and capacitor size.
8
Negative Charge Pump
During the first half-cycle, the P-channel MOSFET
turns on and the flying capacitor C7 charges to VIN
minus a diode drop (Figure 1). During the second
half-cycle, the P-channel MOSFET turns off and
the N-channel MOSFET turns on, level shifting C7.
This connects C7 in parallel with the output reservoir capacitor C10. If the voltage across C10
minus a diode drop is less than the voltage across
C7, current flows from C7 to C10 until the diode
turns off.
3190.2006.01.1.2
AAT3190
Positive/Negative Charge Pump for Voltage Bias
IN
OSC
DRVN
CTL
C7
1/2 A4
BAT54SDW
R1
FBN
VON = -(R1/R2) x VREF
VON
R2
AAT3190
GND
C10
VREF
1.2V
C2
Figure 1: Negative Charge Pump Block Diagram.
MOSFET turns on, level shifting C4 by the input
voltage. This connects C4 in parallel with the reservoir capacitor C5. If the voltage across C5 plus a
diode drop is less than the level shifted flying
capacitor (C4 + VIN), charge is transferred from C4
to C5 until the diode turns off.
Positive Charge Pump
During the first half-cycle, the N-channel MOSFET
turns on and charges the flying capacitor C4
(Figure 2). During the second half-cycle, the Nchannel MOSFET turns off and the P-channel
IN
VIN
OSC
C4
CTL
1/2 A3
DRVP
BAT54SDW
R3
FBP
VOP
VOP = (1+R3/R4) x VREF
VREF
1.2V
AAT3190
R4
C5
GND
Figure 2: Positive Charge Pump Block Diagram.
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AAT3190
Positive/Negative Charge Pump for Voltage Bias
Voltage Reference
The voltage reference is a simple band gap with an
output voltage equal to VBE + K*VT. The band gap
reference amplifier has an additional compensation
capacitor from the negative input to the output. This
capacitor serves to slow down the circuit during
startup and soft starts the voltage reference and
the regulator output from overshoot. The reference
circuit amplifier also increases the overall PSRR of
the device. An 80kΩ resistor serves to isolate and
buffer the amplifier from a small internal filter
capacitor and an optional large external filter
capacitor.
Design Procedure and
Component Selection
Output Voltage
The number of charge pump stages required for a
given output varies with the input voltage applied.
The number of stages required can be estimated by:
VOP - VIN
np = V - 2V
IN
F
for the positive output and
Enable and Start-up
The AAT3190 is disabled by pulling the EN pin low.
The threshold levels lie between 0.5V and 1.5V.
Even though the quiescent current of the IC during
shutdown is less than 1µA, the positive output voltage (VOP) and any load current associated with it
does not disappear without the complete removal of
the input voltage. This is due to the fact that with no
switching of the DRVP pin, the input voltage simply
forward biases the Schottky diodes associated with
the VOP charge pump, providing a path for load current to be drawn from the input voltage.
Depending on the application, the supplies must be
sequenced properly to avoid damage or latch-up.
The AAT3190 start-up sequence ramps up the VOP
output 200µs after the VON output is present. The
AAT3190-1 ramps up the positive supply before the
negative supply.
Over-Temperature Protection
A logic control circuit will shut down both charge
pumps in the case of an over-temperature condition.
Under-Voltage Lockout
A UVLO circuit disables the AAT3190 when the
input voltage supply is lower than 1.8V nominal.
VON
nn = 2V - V
F
IN
for the negative output.
When solving for np and nn, round up the solution
to the next highest integer to determine the number
of stages required.
VON
The negative output voltage is adjusted by a resistive divider from the output (VON) to the FBN and
REF pin.
The maximum reference voltage current is 50µA;
therefore, the minimum allowable value for R2 of
Figure 1 is 24kΩ. It is best to select the smallest
value possible for R2, as this will keep R1 to a minimum. This limits errors due to the FBN input bias
current. The FBN input has a maximum input bias
current of 100nA. Using the full 50µA reference
current for programming VON:
VREF
1.2
IPGM = R2 = 24.1k = 50µA
will limit the error due to the input bias current at
FBN to less than 0.2%:
IFBN 0.1µA
IPGM = 50µA = 0.2%
10
3190.2006.01.1.2
AAT3190
Positive/Negative Charge Pump for Voltage Bias
With R2 selected, R1 can be determined:
R1 =
VNEG · R2
-VREF
VOP
The positive output voltage is set by way of a resistive divider from the output (VOP) to the FBP and
ground pin. Limiting the size of R4 reduces the
effect of the FBP bias current. For less than 0.1%
error, limit R4 to less than 12kΩ.
Positive Output Capacitor Voltage
Ratings
The absolute steady-state maximum output voltage
(neglecting the internal RDS(ON) drop of the internal
MOSFETs) for the nth stage is:
VBULK(n) = (n + 1) · VIN - 2 · n · VFWD
where VFWD is the estimated forward drop of the
Schottky diode. This is also the voltage rating
required for the nth bulk capacitor in the positive
output charge pump.
VREF
1.2V
IPGM = R4 = 12kΩ = 100µA
The voltage rating for the nth flying capacitor in the
positive stage is:
IFBP 0.1µA
IPGM = 100µA = 0.1%
VFLY(n) = VBULK(n + 1) - VFWD
Once R4 has been determined, solve for R3:
⎛ VO
⎞
R3 = R4 ·
-1
⎝ VREF ⎠
Flying and Output Capacitor
The flying capacitor minimum value is limited by
the output power requirement, while the maximum
value is set by the bandwidth of the power supply.
If CFLY is too small, the output may not be able to
deliver the power demanded, while too large of a
capacitor may limit the bandwidth and time
required to recover from load and line transients. A
0.1µF X7R or X5R ceramic capacitor is typically
used. The voltage rating of the flying and reservoir
output capacitors varies with the number of charge
pump stages. The reservoir output capacitor
should be roughly 10 times the flying capacitor.
Use larger capacitors for reduced output ripple.
where VBULK(0) is the input voltage (see Table 1).
VIN = 5.0V, VFWD = 0.3V
Stages (n)
VBULK(n)
1
2
3
4
5
6
VFLY(n)
9.4V
13.8V
18.2V
22.6V
27.0V
31.4V
4.7V
9.1V
13.5V
17.9V
22.3V
26.7V
Table 1: Positive Output Capacitor Voltages.
Negative Output Capacitor Voltage
Ratings
The absolute steady-state maximum output voltage
(neglecting the internal RDS(ON) drop of the internal
MOSFETs) for the nth stage is:
VBULK(n) = -n · VIN + 2 · n · VFWD
This is also the voltage rating required for the nth
bulk capacitor in the negative output charge pump.
3190.2006.01.1.2
11
AAT3190
Positive/Negative Charge Pump for Voltage Bias
The voltage rating for the nth flying capacitor in the
negative stage (see Table 2) is:
Input Capacitors
Input Capacitor
VFLY(n) = VFWD - VBULK(n)
VIN = 5.0V, VFWD = 0.3V
Stages (n)
VBULK(n)
1
2
3
4
5
6
-4.4V
-8.8V
-13.2V
-17.6V
-22.0V
-26.4V
VFLY(n)
4.7V
9.1V
13.5V
17.9V
22.3V
26.7V
Table 2: Negative Output Capacitor Voltages.
Single Output Operation
If only one of the two channels is needed, it is possible to disable either output. Connect the respective FB pin to VIN to disable the output (e.g., connect FBN to VIN in order to disable the negative
output).
The primary function of the input capacitor is to provide a low impedance loop for the edges of pulsed
current drawn by the IC. A low ESL X7R or X5R type
ceramic capacitor is ideal for this function. The size
required will vary depending on the load, output voltage, and input voltage characteristics. Typically, the
input capacitor should be 5 to 10 times the flying
capacitor. If the source impedance of the input supply is high, a larger capacitor may be required. To
minimize stray inductance, the capacitor should be
placed as closely as possible to the IC. This keeps
the high frequency content of the input current localized, minimizing radiated and conducted EMI.
Rectifier Diodes
For the rectifiers, use Schottky diodes with a voltage rating of 1.5 times the input voltage. The maximum steady-state voltage seen by the rectifier
diodes for both the positive and negative charge
pumps (regardless of the number of stages) is:
VREVERSE = VIN - VF
The BAT54S dual Schottky is offered in a SOT23
package that provides a convenient pin-out for the
voltage doubler configuration. The BAT54SDW
quad Schottky in a SOT363 (2x2mm) package is a
good choice for multiple-stage charge pump configuration (see Figure 3, Evaluation Board Schematic).
PC Board Layout
The input and reference capacitor should be placed
as close to the IC as possible. Place the programming resistors (R1-R4) close to the IC, minimizing
trace length to FBN and FBP. Figures 4 and 5 display
the evaluation board layout with the TSOPJW-12
package.
12
3190.2006.01.1.2
AAT3190
Positive/Negative Charge Pump for Voltage Bias
VIN
A3
BAT54SDW
C8
0.1µF
A4
BAT54SDW
C9
0.1µF
C21
1µF
C10
0.1µF
R5
205K
R3
56.2k
R2
24.1k
VON
GND
EN
C22
1µF
R1
139k
C2
0.1µF
R4
6.02k
U1
1
VIN DRVP
12
2
FBN
GND
11
3
REF
GND
10
4
EN
GND
9
5
FBP
GND
8
6
N/C DRVN
7
C7
0.1µF
C20
1µF
VOP
C1
4.7µF
C19
1µF
AAT3190ITP
GND
C19, C20, C21, C22 Murata GRM39X5R105K16 1µF 16V X5R 0603
C7, C8, C9, C10 Taiyo Yuden EMK107BJ104MA 0.1µF 16V X7R 0603
C1 Taiyo Yuden JMK212BJ475MG 4.7µF 6.3V X5R 0805
Figure 3: AAT3190 Evaluation Board Schematic (shown with two stages)
VOP = 12V, VON = -7V.
Figure 4: AAT3190 Evaluation Board Top Side.
3190.2006.01.1.2
Figure 5: AAT3190 Evaluation Board Bottom Side.
13
AAT3190
Positive/Negative Charge Pump for Voltage Bias
Ordering Information
Package
Power-Up Sequence
Marking1
Part Number (Tape and Reel)2
MSOP-8
-, +
JDXYY
AAT3190IKS-T1
TSOPJW-12
-, +
JDXYY
AAT3190ITP-T1
TSOPJW-12
+, -
LKXYY
AAT3190ITP-1-T1
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semiconductor products that are in compliance with current RoHS standards, including
the requirement that lead not exceed 0.1% by weight in homogeneous materials. For more
information, please visit our website at http://www.analogictech.com/pbfree.
Package Information
MSOP-8
4° ± 4°
4.90 ± 0.10
3.00 ± 0.10
1.95 BSC
0.95 REF
0.60 ± 0.20
PIN 1
3.00 ± 0.10
0.85 ± 0.10
0.95 ± 0.15
10° ± 5°
GAUGE PLANE
0.254 BSC
0.155 ± 0.075
0.075 ± 0.075
0.65 BSC
0.30 ± 0.08
All dimensions in millimeters.
1. XYY = assembly and date code.
2. Sample stock is generally held on part numbers listed in BOLD.
14
3190.2006.01.1.2
AAT3190
Positive/Negative Charge Pump for Voltage Bias
TSOPJW-12
2.85 ± 0.20
2.40 ± 0.10
0.10
0.20 +- 0.05
0.50 BSC 0.50 BSC 0.50 BSC 0.50 BSC 0.50 BSC
7° NOM
0.04 REF
0.055 ± 0.045
0.15 ± 0.05
+ 0.10
1.00 - 0.065
0.9625 ± 0.0375
3.00 ± 0.10
4° ± 4°
0.45 ± 0.15
0.010
2.75 ± 0.25
All dimensions in millimeters.
3190.2006.01.1.2
15
AAT3190
Positive/Negative Charge Pump for Voltage Bias
© Advanced Analogic Technologies, Inc.
AnalogicTech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an AnalogicTech product. No circuit patent licenses, copyrights, mask work rights,
or other intellectual property rights are implied. AnalogicTech reserves the right to make changes to their products or specifications or to discontinue any product or service without notice.
Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. AnalogicTech
warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with AnalogicTech’s standard warranty. Testing and other quality control techniques are utilized to the extent AnalogicTech deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed.
Advanced Analogic Technologies, Inc.
830 E. Arques Avenue, Sunnyvale, CA 94085
Phone (408) 737-4600
Fax (408) 737-4611
16
3190.2006.01.1.2
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