ON LF442CN Low power jfet input operational amplifier Datasheet

Order this document by LF441C/D
These JFET input operational amplifiers are designed for low power
applications. They feature high input impedance, low input bias current and
low input offset current. Advanced design techniques allow for higher slew
rates, gain bandwidth products and output swing. The LF441C device
provides for the external null adjustment of input offset voltage.
These devices are specified over the commercial temperature range. All
are available in plastic dual in–line and SOIC packages.
• Low Supply Current: 200 µA/Amplifier
•
•
•
•
•
•
LOW POWER
JFET INPUT
OPERATIONAL AMPLIFIERS
SEMICONDUCTOR
TECHNICAL DATA
Low Input Bias Current: 5.0 pA
High Gain Bandwidth: 2.0 MHz
High Slew Rate: 6.0 V/µs
High Input Impedance: 1012 Ω
8
8
1
1
Large Output Voltage Swing: ±14 V
N SUFFIX
PLASTIC PACKAGE
CASE 626
Output Short Circuit Protection
Representative Schematic Diagram
(Each Amplifier)
PIN CONNECTIONS
Offset Null
VCC
Inputs
VEE
Q7
J1
J2
R3
Q1
Output 1
D1
Q4
R1
7
3
+
6
4
5
1
VEE
VCC
Output 2
8
–
3 +
Inputs 1
C1
Q5
R2
–
2
C2
Q2
NC
VCC
Output
Offset Null
8
2
R4
Output
+
Q3
1
(Single, Top View)
D2
Inputs
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO–8)
1
7
6
2
4
–
+ 5
Inputs 2
(Dual, Top View)
Q6
R5
VEE
1
5
*
*
14
14
+
1
*Null adjustment pins for LF441 only.
5
1.5 kΩ
VEE
100 kΩ
LF441C input offset voltage
null adjust circuit
1
1
N SUFFIX
PLASTIC PACKAGE
CASE 646
D SUFFIX
PLASTIC PACKAGE
CASE 751A
(SO–14)
PIN CONNECTIONS
ORDERING INFORMATION
Device
Function
LF441CD
LF441CN
Single
LF442CD
LF442CN
Dual
LF444CD
LF444CN
Quad
Operating
Temperature Range
Output 1
1
2
Package
SO–8
Plastic DIP
Inputs 1
VCC
SO–8
Plastic DIP
SO–14
Plastic DIP
13
12
+
+
+
4
6
11
–
2
3
VEE
10
Inputs 3
–
7
9
8
Output 3
(Quad, Top View)
 Motorola, Inc. 1996
MOTOROLA ANALOG IC DEVICE DATA
Output 4
Inputs 4
4
+
Inputs 2
Output 2
–
1
3
5
70°C
TA = 0° to +70°C
14
–
Rev 0
1
LF441C LF442C LF444C
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VS
+36
V
VIDR
±30
V
Input Voltage Range (Notes 1 and 2)
VIR
±15
V
Output Short Circuit Duration (Note 3)
tSC
Indefinite
sec
Operating Junction Temperature (Note 3)
TJ
+150
°C
Tstg
–60 to +150
°C
Supply Voltage (from VCC to VEE)
Input Differential Voltage Range (Note 1)
Storage Temperature Range
NOTES: 1. Differential voltages are at the noninverting input terminal with respect to the inverting
input terminal.
2. The magnitude of the input voltage must never exceed the magnitude of the supply
or 15 V, whichever is less.
3. Power dissipation must be considered to ensure maximum junction temperature (TJ)
is not exceeded (see Figure 1).
DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = –15 V, TA = 0° to 70°C, unless otherwise noted.)
Characteristic
Input Offset Voltage (RS = 10 kΩ, VO = 0 V)
Single: TA = +25°C
TA = 0° to +70°C
Dual:
TA = +25°C
TA = 0° to +70°C
Quad: TA = +25°C
TA = 0° to +70°C
Average Temperature Coefficient of Offset Voltage
(RS = 10 kΩ, VO = 0 V)
Symbol
Min
Typ
Max
–
–
–
–
–
–
3.0
–
3.0
–
3.0
–
5.0
7.5
5.0
7.5
10
12
–
10
–
µV/°C
–
–
0.5
–
50
1.5
pA
nA
–
–
3.0
–
100
3.0
pA
nA
–
–11
+14.5
–12
+11
–
V
25
15
60
–
–
–
VIO
∆VIO/∆T
Input Offset Current (VCM = 0 V, VO = 0 V)
TA = +25°C
TA = 0° to +70°C
IIO
Input Bias Current (VCM = 0 V, VO = 0 V)
TA = +25°C
TA = 0° to +70°C
IIB
Unit
mV
Common Mode Input Voltage Range (TA = +25°C)
VICR
Large Signal Voltage Gain (VO = ±10 V, RL = 10 kΩ)
TA = +25°C
TA = 0° to +70°C
AVOL
Output Voltage Swing (RL = 10 kΩ)
VO +
VO –
+12
–
+14
–14
–
–12
V
Common Mode Rejection (RS ≤ 10 kΩ, VCM = VICR, VO = 0 V)
CMR
70
86
–
dB
Power Supply Rejection (RS = 100 Ω, VCM = 0 V, VO = 0 V)
PSR
70
84
–
dB
–
–
–
200
400
800
250
500
1000
Power Supply Current (No Load, VO = 0 V)
Single
Dual
Quad
2
V/mV
µA
ID
MOTOROLA ANALOG IC DEVICE DATA
LF441C LF442C LF444C
AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = –15 V, TA = +25°C, unless otherwise noted.)
Characteristic
Symbol
Min
Typ
Max
Unit
SR
0.6
6.0
–
V/ µs
ts
–
–
1.6
2.2
–
–
µs
GBW
0.6
2.0
–
MHz
Equivalent Input Noise Voltage (RS = 100 Ω, f = 1.0 kHz)
en
–
47
–
nV/ √ Hz
Equivalent Input Noise Current (f = 1.0 kHz)
in
–
0.01
–
pA/ √ Hz
Input Resistance
Ri
–
1012
–
Ω
Channel Separation (f = 1.0 Hz to 20 kHz)
CS
–
120
–
dB
Slew Rate (Vin = –10 V to +10 V, RL = 10 kΩ, CL = 10 pF, AV = +1.0)
Settling Time
(AV = –1.0, RL = 10 kΩ, VO = 0 V to +10 V)
To within 10 mV
To within 1.0 mV
Gain Bandwidth Product (f = 200 kHz)
PD, MAXIMUM POWER DISSIPATION (mW)
Figure 1. Maximum Power Dissipation versus
Temperature for Package Variations
Figure 2. Input Bias Current versus
Input Common Mode Voltage
20
IIB , INPUT BIAS CURRENT (pA)
2400
2000
8 & 14 Pin Plastic
Package
1600
1200
800
SO–14
SO–8
400
0
–55 –40 –20
0
20
40
60
80
100 120 140
15
10
5.0
0
–10
160
–5.0
0
5.0
10
VICR, INPUT COMMON MODE VOLTAGE (V)
Figure 3. Input Bias Current versus Temperature
Figure 4. Supply Current versus Supply Voltage
ID, SUPPLY CURRENT PER AMPLIFIER ( µA)
TA, AMBIENT TEMPERATURE (°C)
1000
IIB,INPUT BIAS CURRENT (nA)
VCC = +15 V
VEE = –15 V
TA = 25°C
100
VCC = +15 V
VEE = –15 V
VCM = 0 V
10
1.0
0.1
0.01
0.001
–55
–25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
MOTOROLA ANALOG IC DEVICE DATA
100
125
300
260
220
125°C
25°C
180
– 55°C
140
100
0
5.0
10
15
20
25
VCC,  VEE, SUPPLY VOLTAGE (V)
3
LF441C LF442C LF444C
20
–55°C ≤ TA ≤ 125°C
15
10
5.0
0
0
Figure 6. Negative Input Common Mode Voltage
Range versus Negative Supply Voltage
–VICR,NEGATIVE INPUT COMMON MODE
VOLTAGE RANGE (V)
+VICR, POSITIVE INPUT COMMON MODE
VOLTAGE RANGE (V)
Figure 5. Positive Input Common Mode Voltage
Range versus Positive Supply Voltage
5.0
10
15
VCC, POSITIVE SUPPLY VOLTAGE (V)
20
–20
–55°C ≤ TA ≤ 125°C
–15
–10
–5.0
0
0
–5.0
–10
–15
VEE, NEGATIVE SUPPLY VOLTAGE (V)
Figure 7. Output Voltage versus Output
Source Current
VCC = +15 V
VEE = –15 V
VCC = +15 V
VEE = –15 V
VO, OUTPUT VOLTAGE (V)
VO, OUTPUT VOLTAGE (V)
Figure 8. Output Voltage versus
Output Sink Current
–20
20
15
125°C
– 55°C
25°C
10
5.0
0
–20
0
1.0
2.0
3.0
4.0
5.0
6.0
IO, OUTPUT SOURCE CURRENT (mA)
7.0
–15
–10
125°C
25°C
–5.0
0
0
8.0
– 55°C
Figure 9. Output Voltage Swing
versus Supply Voltage
2.0
4.0
6.0
8.0 10 12
14 16
–IO, OUTPUT SINK CURRENT (mA)
18
20
Figure 10. Output Voltage Swing
versus Load Resistance
RL = 10 kΩ
–55°C ≤ TA ≤ 125°C
35
VO, OUTPUT VOLTAGE SWING (Vp–p )
VO, OUTPUT VOLTAGE SWING (Vp–p )
40
30
25
20
15
10
5.0
28
26
24
22
20
18
VCC = +15 V
VEE = –15 V
TA = 25°C
16
0
0
4
2.0
4.0
6.0
8.0
10
12
VCC,  VEE, SUPPLY VOLTAGE (V)
14
16
1.0 k
2.0 k
3.0 k
4.0 k
RL, LOAD RESISTANCE (Ω)
6.0 k
8.0 k 10 k
MOTOROLA ANALOG IC DEVICE DATA
1.4
Figure 12. Open Loop Voltage Gain and
Phase versus Frequency
VCC = +15 V
VEE = –15 V
RL = 10 kΩ
CL = 100 pF
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
–75
–50
–25
0
25
50
75
100
90
20
Phase
135
10
180
0
VCC = +15 V
VEE = –15 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
–10
–20
125
1.0
Figure 14. Total Output Distortion
versus Frequency
2.5
THD, OUTPUT DISTORTION (%)
SR, SLEW RATE (V/ µs )
8.0
7.0
6.0
VCC = +15 V
VEE = –15 V
RL = 10 kΩ
AV = +1.0
4.0
–75 –50
–25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
5.0
VCC = +15 V
VEE = –15 V
TA = 25°C
2.0
1.5
1.0
AV = 100
0.5
AV = 10
0
100
125
10
100
30
20
VCC = +15 V
VEE = –15 V
RL = 10 kΩ
AV = +1.0
1% THD
TA = 25°C
1.0 k
10 k
100 k
f, FREQUENCY (Hz)
MOTOROLA ANALOG IC DEVICE DATA
1.0 k
f, FREQUENCY (Hz)
10 k
100 k
Figure 16. Open Loop Voltage
Gain versus Frequency
A VOL, OPEN LOOP VOLTAGE GAIN (dB)
Figure 15. Output Voltage Swing
versus Frequency
VO, OUTPUT VOLTAGE SWING (Vp–p )
10
f, FREQUENCY (MHz)
Figure 13. Slew Rate versus Temperature
0
225
270
0.1
TA, AMBIENT TEMPERATURE (°C)
10
Gain
φ, EXCESS PHASE (DEGREES)
Figure 11. Normalized Gain Bandwidth
Product versus Temperature
AVOL , OPEN LOOP VOLTAGE GAIN (dB)
GBW, NORMALIZED GAIN BANDWIDTH PRODUCT
LF441C LF442C LF444C
1.0 M
100
80
60
40
20
0
VCC = +15 V
VEE = –15 V
RL = 10 kΩ
TA = 25°C
0.1
1.0
10
100
1.0 k
10 k
100 k
1.0 M
10 M
f, FREQUENCY (Hz)
5
LF441C LF442C LF444C
Figure 17. Common Mode Rejection
versus Frequency
Figure 18. Power Supply Rejection
versus Frequency
140
120
∆VCM
ADM
+
100
CMR = 20 Log
80
∆VO
( ∆V∆VCMO x ADM )
60
VCC = +15 V
VEE = –15 V
VCM = 0 V
∆VCM = ±1.5 V
TA = 25°C
40
20
0
100
1.0 k
10 k
f, FREQUENCY (Hz)
100 k
1.0 M
PSR, POWER SUPPLY REJECTION (dB)
CMR, COMMON MODE REJECTION (dB)
140
VCC = +15 V
VEE = –15 V
TA = 25°C
120
40
30
VCC = +15 V
VEE = –15 V
VCM = 0 V
TA = 25°C
20
10
0
10
100
1.0 k
10 k
80
–PSR
ZO , OUTPUT IMPEDANCE (Ω )
(∆VCC = ±1.5 V)
(∆VEE=±1.5 V)
60
/ADM
( ∆V∆VO CC
)
∆VO /ADM
–PSR = 20 Log (
)
∆VEE
+PSR = 20 Log
40
20
0
1.0 k
10 k
f, FREQUENCY (Hz)
100 k
1.0 M
1.0 M
RL = 10 kΩ
100 k
25°C
125°C
–55°C
10 k
100 k
0
5.0
10
15
20
f, FREQUENCY (Hz)
VCC,  VEE , SUPPLY VOLTAGE (V)
Figure 21. Output Impedance versus Frequency
Figure 22. Inverter Settling Time
350
300
250
VCC = +15 V
VEE = –15 V
TA = 25°C
200
150
AV = 100
AV = 10
AV = 1.0
100
50
0
100
1.0k
10k
f, FREQUENCY (Hz)
6
∆VEE
Figure 20. Open Loop Voltage
Gain versus Supply Voltage
AVOL, OPEN LOOP VOLTAGE GAIN (V V)
50
∆VO
+
+PSR
100
VO, OUTPUT VOLTAGE STEP FROM 0 V (V)
en , INPUT NOISE VOLTAGE ( nV/ √ Hz )
60
∆VCC
ADM
100
Figure 19. Input Noise Voltage versus Frequency
70
–
100k
1.0M
10
VCC = +15 V
VEE = –15 V
TA = 25°C
25
10 mV
1.0 mV
5.0
0
–5.0
1.0 mV
10 mV
–10
0.1
1.0
10
ts, SETTLING TIME (µs)
MOTOROLA ANALOG IC DEVICE DATA
LF441C LF442C LF444C
SMALL SIGNAL RESPONSE
0
VCC = +15 V
VEE = –15 V
RL = 10 kΩ
CL = 10 pF
AV = –1.0
TA = 25°C
Figure 24. Noninverting
VO , OUTPUT VOLTAGE (50 mV/DIV)
VO , OUTPUT VOLTAGE (50 mV/DIV)
Figure 23. Inverting
VCC = +15 V
VEE = –15 V
RL = 10 kΩ
CL = 10 pF
AV = +1.0
TA = 25°C
0
t, TIME (0.5 µs/DIV)
t, TIME (0.5 µs/DIV)
LARGE SIGNAL RESPONSE
VCC = +15 V
VEE = –15 V
RL = 10 kΩ
CL = 10 pF
AV = –1.0
TA = 25°C
Figure 26. Noninverting
VO , OUTPUT VOLTAGE (5.0 V/DIV)
VO , OUTPUT VOLTAGE (5.0 V/DIV)
Figure 25. Inverting
0
t, TIME (2.0 µs/DIV)
MOTOROLA ANALOG IC DEVICE DATA
VCC = +15 V
VEE = –15 V
RL = 10 kΩ
CL = 10 pF
AV = +1.0
TA = 25°C
0
t, TIME (2.0 µs/DIV)
7
LF441C LF442C LF444C
OUTLINE DIMENSIONS
N SUFFIX
PLASTIC PACKAGE
CASE 626–05
ISSUE K
8
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
5
–B–
1
4
DIM
A
B
C
D
F
G
H
J
K
L
M
N
F
–A–
NOTE 2
L
C
J
–T–
N
SEATING
PLANE
D
MILLIMETERS
MIN
MAX
9.40
10.16
6.10
6.60
3.94
4.45
0.38
0.51
1.02
1.78
2.54 BSC
0.76
1.27
0.20
0.30
2.92
3.43
7.62 BSC
–––
10_
0.76
1.01
INCHES
MIN
MAX
0.370
0.400
0.240
0.260
0.155
0.175
0.015
0.020
0.040
0.070
0.100 BSC
0.030
0.050
0.008
0.012
0.115
0.135
0.300 BSC
–––
10_
0.030
0.040
M
K
G
H
0.13 (0.005)
T A
M
M
B
M
D SUFFIX
PLASTIC PACKAGE
CASE 751–05
(SO–8)
ISSUE R
D
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. DIMENSIONS ARE IN MILLIMETERS.
3. DIMENSION D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE MOLD
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS
OF THE B DIMENSION AT MAXIMUM MATERIAL
CONDITION.
C
8
5
0.25
H
E
M
B
M
1
4
h
B
e
X 45 _
q
A
C
SEATING
PLANE
L
0.10
A1
B
0.25
8
M
C B
S
A
S
DIM
A
A1
B
C
D
E
e
H
h
L
q
MILLIMETERS
MIN
MAX
1.35
1.75
0.10
0.25
0.35
0.49
0.18
0.25
4.80
5.00
3.80
4.00
1.27 BSC
5.80
6.20
0.25
0.50
0.40
1.25
0_
7_
MOTOROLA ANALOG IC DEVICE DATA
LF441C LF442C LF444C
OUTLINE DIMENSIONS
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
ISSUE L
14
8
1
7
NOTES:
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
4. ROUNDED CORNERS OPTIONAL.
B
A
F
DIM
A
B
C
D
F
G
H
J
K
L
M
N
L
C
J
N
H
G
D
SEATING
PLANE
K
M
INCHES
MIN
MAX
0.715
0.770
0.240
0.260
0.145
0.185
0.015
0.021
0.040
0.070
0.100 BSC
0.052
0.095
0.008
0.015
0.115
0.135
0.300 BSC
0_
10_
0.015
0.039
MILLIMETERS
MIN
MAX
18.16
19.56
6.10
6.60
3.69
4.69
0.38
0.53
1.02
1.78
2.54 BSC
1.32
2.41
0.20
0.38
2.92
3.43
7.62 BSC
0_
10_
0.39
1.01
D SUFFIX
PLASTIC PACKAGE
CASE 751A–03
(SO–14)
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
–A–
14
8
–B–
1
P 7 PL
0.25 (0.010)
7
G
M
F
–T–
0.25 (0.010)
M
K
D 14 PL
M
T B
MOTOROLA ANALOG IC DEVICE DATA
S
M
R X 45 _
C
SEATING
PLANE
B
A
S
J
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
8.55
8.75
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.337
0.344
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0_
7_
0.228
0.244
0.010
0.019
9
LF441C LF442C LF444C
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
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Motorola was negligent regarding the design or manufacture of the part. Motorola and
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.
How to reach us:
USA / EUROPE / Locations Not Listed: Motorola Literature Distribution;
P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454
JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,
3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315
MFAX: [email protected] – TOUCHTONE 602–244–6609
INTERNET: http://Design–NET.com
ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
10
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*LF441C/D*
MOTOROLA ANALOG IC DEVICE
DATA
LF441C/D
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