PD - 91483E
IRF9540NS/L
Advanced Process Technology
Surface Mount (IRF9540NS)
l Low-profile through-hole (IRF9540NL)
l 175°C Operating Temperature
l Fast Switching
l P-Channel
l Fully Avalanche Rated
Description
HEXFET® Power MOSFET
l
D
l
VDSS = -100V
RDS(on) = 0.117Ω
G
Fifth Generation HEXFETs from International Rectifier utilize
advanced processing techniques to achieve extremely low
on-resistance per silicon area. This benefit, combined with
the fast switching speed and ruggedized device design that
HEXFET Power MOSFETs are well known for, provides the
designer with an extremely efficient and reliable device for
use in a wide variety of applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the highest
power capability and the lowest possible on-resistance in
any existing surface mount package. The D2Pak is suitable
for high current applications because of its low internal
connection resistance and can dissipate up to 2.0W in a
typical surface mount application.
The through-hole version (IRF9540L) is available for lowprofile applications.
ID = -23A
S
D 2 Pak
TO-262
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TA = 25°C
PD @TC = 25°C
V GS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ -10V
Continuous Drain Current, VGS @ -10V
Pulsed Drain Current
Power Dissipation
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
-23
-16
-76
3.8
140
0.91
± 20
430
-11
14
-5.0
-55 to + 175
Units
A
W
W
W/°C
V
mJ
A
mJ
V/ns
300 (1.6mm from case )
°C
Thermal Resistance
Parameter
RθJC
RθJA
Junction-to-Case
Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
Max.
Units
1.1
40
°C/W
03/11/03
IRF9540NS/L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
-100
-2.0
5.3
Typ.
-0.11
15
67
51
51
LS
Internal Source Inductance
7.5
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
1300
400
240
V(BR)DSS
IDSS
Drain-to-Source Leakage Current
IGSS
Max. Units
Conditions
V
VGS = 0V, ID = -250µA
V/°C Reference to 25°C, ID = -1mA
0.117
Ω
VGS = -10V, I D = -11A
-4.0
V
VDS = VGS, I D = -250µA
S
VDS = -50V, ID = -11A
-25
VDS = -100V, V GS = 0V
µA
-250
VDS = -80V, VGS = 0V, TJ = 150°C
100
VGS = 20V
nA
-100
VGS = -20V
97
ID = -11A
15
nC VDS = -80V
51
VGS = -10V, See Fig. 6 and 13
VDD = -50V
ID = -11A
ns
RG = 5.1Ω
RD = 4.2Ω, See Fig. 10
Between lead,
nH
and center of die contact
VGS = 0V
pF
VDS = -25V
= 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
IS
I SM
V SD
t rr
Q rr
ton
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
-23
showing the
A
G
integral reverse
-76
p-n junction diode.
S
-1.6
V
TJ = 25°C, IS = -11A, VGS = 0V
150 220
ns
TJ = 25°C, IF = -11A
830 1200 nC
di/dt = -100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting TJ = 25°C, L = 7.1mH
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Uses IRF9540N data and test conditions
RG = 25Ω, I AS = -11A. (See Figure 12)
ISD ≤ -11A, di/dt ≤ -470A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
** When mounted on 1" square PCB (FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
IRF9540NS/L
100
100
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
10
-4.5V
20µs PULSE WIDTH
Tc = 25°C
A
1
0.1
1
10
10
-4.5V
R DS(on) , Drain-to-Source On Resistance
(Normalized)
-ID , Drain-to-Source Current (A)
2.5
TJ = 25°C
TJ = 175°C
10
1
VDS = -25V
20µs PULSE WIDTH
6
7
8
9
-VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
10
A
100
Fig 2. Typical Output Characteristics
100
5
1
-VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
0.1
20µs PULSE WIDTH
TC = 175°C
1
0.1
100
-VDS , Drain-to-Source Voltage (V)
4
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
TOP
-ID , Drain-to-Source Current (A)
-ID , Drain-to-Source Current (A)
TOP
10
A
I D = -19A
2.0
1.5
1.0
0.5
VGS = -10V
0.0
-60 -40 -20
0
20
40
60
A
80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
IRF9540NS/L
20
3000
C, Capacitance (pF)
2500
2000
-VGS , Gate-to-Source Voltage (V)
V GS = 0V,
f = 1MHz
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd
C oss = C ds + C gd
Ciss
1500
Coss
1000
Crss
500
0
10
VDS = -80V
VDS = -50V
VDS = -20V
16
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
1
I D = -11A
0
100
20
60
80
A
100
Q G , Total Gate Charge (nC)
-VDS , Drain-to-Source Voltage (V)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
1000
OPERATION IN THIS AREA LIMITED
BY R DS(on)
-I D , Drain Current (A)
-ISD , Reverse Drain Current (A)
40
10
TJ = 175°C
TJ = 25°C
1
VGS = 0V
0.1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
-VSD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
A
1.6
100
100µs
10
1ms
TC = 25°C
TJ = 175°C
Single Pulse
1
1
10ms
A
10
100
1000
-VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
IRF9540NS/L
25
RD
V DS
V GS
ID , Drain Current (A)
20
D.U.T.
RG
-
+
15
V DD
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
10
Fig 10a. Switching Time Test Circuit
5
td(on)
tr
t d(off)
tf
VGS
0
25
50
75
100
125
150
175
10%
TC , Case Temperature ( °C)
Fig 9. Maximum Drain Current Vs.
Case Temperature
90%
VDS
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
1
D = 0.50
0.20
PDM
0.10
0.1
0.01
0.00001
0.05
0.02
0.01
t1
t2
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1
L
VDS
D.U.T
RG
IAS
-20V
tp
VDD
A
DRIVER
0.01Ω
15V
Fig 12a. Unclamped Inductive Test Circuit
EAS , Single Pulse Avalanche Energy (mJ)
IRF9540NS/L
1200
TOP
1000
BOTTOM
800
600
400
200
A
0
25
I AS
ID
-4.7A
-8.1A
-11A
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
tp
V(BR)DSS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.3µF
-10V
QGS
.2µF
QGD
D.U.T.
+VDS
VGS
VG
-3mA
Charge
Fig 13a. Basic Gate Charge Waveform
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
175
IRF9540NS/L
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T*
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
RG
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VGS
*
+
-
V DD
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
[VGS=10V ] ***
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
[VDD]
Forward Drop
Inductor Curent
Ripple ≤ 5%
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 14. For P-Channel HEXFETS
[ISD]
IRF9540NS/L
D2Pak Package Outline
D2Pak Part Marking Information
THIS IS AN IRF530S WITH
LOT CODE 8024
AS S EMBLED ON WW 02, 2000
IN T HE AS SEMBLY LINE "L"
INTERNATIONAL
RECTIFIER
LOGO
AS S EMBLY
LOT CODE
PART NUMBER
F530S
DAT E CODE
YEAR 0 = 2000
WEEK 02
LINE L
IRF9540NS/L
TO-262 Package Outline
TO-262 Part Marking Information
EXAMPLE: T HIS IS AN IRL3103L
LOT CODE 1789
ASS EMBLED ON WW 19, 1997
IN THE ASS EMBLY LINE "C"
INT ERNATIONAL
RECTIFIER
LOGO
AS SEMBLY
LOT CODE
PART NUMBER
DATE CODE
YEAR 7 = 1997
WEEK 19
LINE C
IRF9540NS/L
D2Pak Tape & Reel Information
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
10.90 (.429)
10.70 (.421)
1.75 (.069)
1.25 (.049)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
60.00 (2.362)
MIN.
26.40 (1.039)
24.40 (.961)
3
30.40 (1.197)
MAX.
4
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.03/03
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/