MCP6L91/1R/2/4
10 MHz, 850 µA Op Amps
Features
Description
•
•
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•
The Microchip Technology Inc. MCP6L91/1R/2/4 family
of operational amplifiers (op amps) provides wide
bandwidth for the current. The input bias currents and
voltage ranges make it easier to fit into many
applications.
Available in SOT-23-5 package
Gain Bandwidth Product: 10 MHz (typical)
Rail-to-Rail Input/Output
Supply Voltage: 2.4V to 6.0V
Supply Current: IQ = 0.85 mA/amplifier (typical)
Extended Temperature Range: -40°C to +125°C
Available in Single, Dual and Quad Packages
Typical Applications
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Portable Equipment
Photodiode Amplifier
Analog Filters
Notebooks and PDAs
Battery-Powered Systems
Package Types
MCP6L91
SOT-23-5
VOUT
Design Aids
•
•
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This family has a 10 MHz Gain Bandwidth Product
(GBWP) and a low 850 µA per amplifier quiescent
current. These op amps operate on supply voltages
between 2.4V and 6.0V, with rail-to-rail input and output
swing. They are available in the extended temperature
range.
1
5 VDD
VSS 2
FilterLab® Software
Microchip Advanced Part Selector (MAPS)
Analog Demonstration and Evaluation Boards
Application Notes
VIN+ 3
R1
R2
3.01 kΩ 6.81 kΩ
MCP6L91
SOIC, MSOP
VIN+ 3
VSS 4
8 NC
C1
120 nF
C2
12 nF
C3
27 nF
VOUT
VINA– 2
7 VOUTB
VINA+ 3
6 VINB–
5 VINB+
SOIC, TSSOP
7 VDD
14 VOUTD
6 VOUT
5 NC
VINA– 2
VINA+ 3
13 VIND–
SOT-23-5
VOUT 1
MCP6L94
VOUTA 1
MCP6L91R
VIN
8 VDD
MCP6L91
VIN– 2
R3
9.31 kΩ
SOIC, MSOP
VOUTA 1
VSS 4
NC 1
Typical Application
4 VIN–
MCP6L92
5 VSS
VDD 4
VINB+ 5
VINB– 6
VOUTB 7
12 VIND+
11 VSS
10 VINC+
9 VINC–
8 VOUTC
VDD 2
Low-pass Filter
© 2009 Microchip Technology Inc.
VIN+ 3
4 VIN–
DS22141A-page 1
MCP6L91/1R/2/4
NOTES:
DS22141A-page 2
© 2009 Microchip Technology Inc.
MCP6L91/1R/2/4
1.0
1.1
ELECTRICAL CHARACTERISTICS
† Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of
the device at those or any other conditions above those
indicated in the operational listings of this specification is not
implied. Exposure to maximum rating conditions for extended
periods may affect device reliability.
Absolute Maximum Ratings †
VDD – VSS .......................................................................7.0V
Current at Input Pins ....................................................±2 mA
Analog Inputs (VIN+, VIN–) †† ....... VSS – 1.0V to VDD + 1.0V
All Inputs and Outputs ................... VSS – 0.3V to VDD + 0.3V
Difference Input voltage ...................................... |VDD – VSS|
Output Short Circuit Current ................................ Continuous
Current at Output and Supply Pins ..........................±150 mA
Storage Temperature ...................................-65°C to +150°C
Max. Junction Temperature ........................................ +150°C
ESD protection on all pins (HBM, MM) ................≥ 4 kV, 400V
1.2
†† See Section 4.1.2 “Input Voltage and Current Limits”.
Specifications
TABLE 1-1:
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = 5.0V, VSS = GND, VCM = VSS, VOUT ≈ VDD/2,
VL = VDD/2 and RL = 10 kΩ to VL (refer to Figure 1-1).
Parameters
Sym
Min
(Note 1)
Typ
Max
(Note 1)
Units
Conditions
Input Offset
Input Offset Voltage
Input Offset Voltage Drift
Power Supply Rejection Ratio
VOS
-4
±1
+4
ΔVOS/ΔTA
—
±1.3
—
PSRR
—
89
—
mV
µV/°C TA= -40°C to+125°C
dB
Input Current and Impedance
IB
—
1
—
pA
Across Temperature
IB
—
50
—
pA
TA= +85°C
Across Temperature
IB
—
2000
—
pA
TA= +125°C
IOS
—
±1
—
pA
Input Bias Current
Input Offset Current
Common Mode Input Impedance
ZCM
—
1013||6
—
Ω||pF
Differential Input Impedance
ZDIFF
—
1013||3
—
Ω||pF
Common-Mode Input Voltage Range
VCMR
-0.3
—
5.3
V
Common-Mode Rejection Ratio
CMRR
—
91
—
dB
VCM = -0.3V to 5.3V
AOL
—
105
—
dB
VOUT = 0.2V to 4.8V
Common Mode
Open Loop Gain
DC Open Loop Gain (large signal)
Output
Maximum Output Voltage Swing
Output Short Circuit Current
VOL
—
—
0.020
V
G = +2, 0.5V Input Overdrive
VOH
4.980
—
—
V
G = +2, 0.5V Input Overdrive
ISC
—
±25
—
mA
Power Supply
Supply Voltage
Quiescent Current per Amplifier
Note 1:
VDD
2.4
—
6.0
V
IQ
0.35
0.85
1.35
mA
IO = 0
For design guidance only; not tested.
© 2009 Microchip Technology Inc.
DS22141A-page 3
MCP6L91/1R/2/4
TABLE 1-2:
AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +5.0V, VSS = GND, VCM = VSS, VOUT ≈ VDD/2,
VL = VDD/2, RL = 10 kΩ to VL and CL = 60 pF (refer to Figure 1-1).
Parameters
Sym
Min
Typ
Max
Units
Conditions
AC Response
Gain Bandwidth Product
GBWP
—
10
—
MHz
Phase Margin
PM
—
65
—
°
Slew Rate
SR
—
7
—
V/µs
Input Noise Voltage
Eni
—
2.5
—
Input Noise Voltage Density
eni
—
9.4
—
nV/√Hz f = 10 kHz
Input Noise Current Density
ini
—
3
—
fA/√Hz
G = +1
Noise
TABLE 1-3:
µVP-P
f = 0.1 Hz to 10 Hz
f = 1 kHz
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, all limits are specified for: VDD = +2.4V to +6.0V, VSS = GND.
Parameters
Sym
Min
Typ
Max
Units
Specified Temperature Range
TA
-40
—
+125
°C
Operating Temperature Range
TA
-40
—
+125
°C
Storage Temperature Range
TA
-65
—
+150
°C
Thermal Resistance, 5L-SOT-23
θJA
—
256
—
°C/W
Thermal Resistance, 8L-SOIC (150 mil)
θJA
—
163
—
°C/W
Thermal Resistance, 8L-MSOP
θJA
—
206
—
°C/W
Thermal Resistance, 14L-SOIC
θJA
—
120
—
°C/W
Thermal Resistance, 14L-TSSOP
θJA
—
100
—
°C/W
Conditions
Temperature Ranges
(Note 1)
Thermal Package Resistances
Note 1:
1.3
Operation must not cause TJ to exceed Maximum Junction Temperature specification (150°C).
CF
6.8 pF
Test Circuit
The circuit used for most DC and AC tests is shown in
Figure 1-1. This circuit can independently set VCM and
VOUT; see Equation 1-1. Note that VCM is not the
circuit’s common mode voltage ((VP + VM)/2), and that
VOST includes VOS plus the effects (on the input offset
error, VOST) of temperature, CMRR, PSRR and AOL.
EQUATION 1-1:
RG
100 kΩ
VP
VIN+
V CM = ( V P + V DD ⁄ 2 ) ⁄ 2
CB1
100 nF
VDD/2
CB2
1 µF
VIN–
V OST = V IN– – V IN+
V OUT = ( V DD ⁄ 2 ) + ( V P – V M ) + V OST ( 1 + G DM )
Where:
GDM = Differential Mode Gain
(V/V)
VCM = Op Amp’s Common Mode
Input Voltage
(V)
DS22141A-page 4
VDD
MCP6L9X
G DM = R F ⁄ R G
VOST = Op Amp’s Total Input Offset
Voltage
RF
100 kΩ
(mV)
VM
RG
100 kΩ
RL
10 kΩ
RF
100 kΩ
CF
6.8 pF
VOUT
CL
60 pF
VL
FIGURE 1-1:
AC and DC Test Circuit for
Most Specifications.
© 2009 Microchip Technology Inc.
MCP6L91/1R/2/4
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, TA = +25°C, VDD = 5.0V, VSS = GND, VCM = VSS, VOUT = VDD/2, VL = VDD/2,
VDD = 2.4V
Representative Part
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-40°C
+25°C
+85°C
+125°C
Common Mode Range (V)
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
-0.4
-0.6
-0.8
-1.0
-0.5
Input Offset Voltage (mV)
RL = 10 kΩ to VL and CL = 60 pF.
0.5
0.4
0.3
0.2
0.1
0.0
-0.1
-0.2
-0.3
-0.4
-0.5
VCMRH – VDD
One Wafer Lot
VCMRL – VSS
-50
-25
Common Mode Input Voltage (V)
CMRR, PSRR (dB)
CMRR (VCM = VCMRL to VCMRH)
90
PSRR (VCM = VSS)
85
80
75
70
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
95
FIGURE 2-2:
Input Offset Voltage vs.
Common Mode Input Voltage at VDD = 5.5V.
-50
-25
0
25
50
75
Ambient Temperature (°C)
FIGURE 2-5:
Temperature.
100
125
CMRR, PSRR vs. Ambient
100
Representative Part
90
VDD = 1.8V
VDD = 5.5V
CMRR, PSRR (dB)
Input Offset Voltage (mV)
125
100
Common Mode Input Voltage (V)
0.5
0.4
0.3
0.2
0.1
0.0
-0.1
-0.2
-0.3
-0.4
-0.5
100
FIGURE 2-4:
Input Common Mode Range
Voltage vs. Ambient Temperature.
+125°C
+85°C
+25°C
-40°C
2.0
1.5
1.0
0.5
VDD = 5.5V
Representative Part
0.0
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
-0.4
-0.6
-0.8
-1.0
-0.5
Input Offset Voltage (mV)
FIGURE 2-1:
Input Offset Voltage vs.
Common Mode Input Voltage at VDD = 2.4V.
0
25
50
75
Ambient Temperature (°C)
80
CMRR
70
PSRR–
60
PSRR+
50
40
30
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Output Voltage (V)
FIGURE 2-3:
Output Voltage.
Input Offset Voltage vs.
© 2009 Microchip Technology Inc.
20
10
1.E+01
FIGURE 2-6:
Frequency.
100
1.E+02
1k
10k
1.E+03
1.E+04
Frequency (Hz)
100k
1.E+05
CMRR, PSRR vs.
DS22141A-page 5
MCP6L91/1R/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +5.0V, VSS = GND, VCM = VSS, VOUT = VDD/2, VL = VDD/2,
RL = 10 kΩ to VL and CL = 60 pF.
Input Current Magnitude (A)
Input, Output Voltages (V)
6
1.E-02
10m
1m
1.E-03
100µ
1.E-04
10µ
1.E-05
1µ
1.E-06
100n
1.E-07
10n
1.E-08
1n
1.E-09
100p
1.E-10
10p
1.E-11
1p
1.E-12
+125°C
+85°C
+25°C
-40°C
-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0
Input Voltage (V)
0
100
-30
80
Phase
60
-60
-90
40
-120
Gain
20
-150
0
-180
VOUT
3
2
1
0
-1
0.E+00
4.E-03
5.E-03
6.E-03
7.E-03
8.E-03
9.E-03
1.E-02
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
+125°C
+85°C
+25°C
-40°C
FIGURE 2-11:
Quiescent Current vs.
Power Supply Voltage.
40
100
10
1
0.1
1
10
100 1.E+0
1k
10k 1.E+0
100k
1.E-01
1.E+0
1.E+0
1.E+0
1.E+0
0
1Frequency
2 (Hz)3
4
5
DS22141A-page 6
3.E-03
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Power Supply Voltage (V)
1,000
FIGURE 2-9:
vs. Frequency.
2.E-03
FIGURE 2-10:
The MCP6L91/1R/2/4 Show
No Phase Reversal.
Short Circuit Current (mA)
Input Noise Voltage Density
(nV/√Hz)
Open-Loop Gain, Phase vs.
1.E-03
Time (1 ms/div)
-20
-210
1 1.E+
10 1.E+
100 1.E+
1k 1.E+
10k 100k
1M 1.E+
10M 100M
1.E+
1.E+ 1.E+
1.E+
00 01 02 Frequency
03 04 (Hz)
05 06 07 08
FIGURE 2-8:
Frequency.
G = +2 V/V
4
Quiescent Current
per amplifier (mA)
120
Open-Loop Phase (°)
Open-Loop Gain (dB)
FIGURE 2-7:
Measured Input Current vs.
Input Voltage (below VSS).
VIN
5
Input Noise Voltage Density
30
20
10
0
-10
-40°C
+25°C
+85°C
+125°C
-20
-30
-40
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Power Supply Voltage (V)
FIGURE 2-12:
Output Short Circuit Current
vs. Power Supply Voltage.
© 2009 Microchip Technology Inc.
MCP6L91/1R/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +5.0V, VSS = GND, VCM = VSS, VOUT = VDD/2, VL = VDD/2,
RL = 10 kΩ to VL and CL = 60 pF.
VDD – VOH
IOUT
25
Slew Rate (V/µs)
Ratio of Output Headroom
to Output Current (mV/mA)
30
20
VOL – VSS
-IOUT
15
10
5
0
100µ
1.E-04
1m
1.E-03
Output Current Magnitude (A)
VDD = 5.5V
Falling Edge
VDD = 2.4V
Rising Edge
-50
10m
1.E-02
FIGURE 2-13:
Ratio of Output Voltage
Headroom to Output Current vs. Output Current.
12
11
10
9
8
7
6
5
4
3
2
1
0
-25
FIGURE 2-16:
Temperature.
0
25
50
75
Ambient Temperature (°C)
100
125
Slew Rate vs. Ambient
0.04
P-P )
Output Voltage Swing (V
Output Voltage (10 mV/div)
G = +1 V/V
0.03
0.02
0.01
0.00
-0.01
-0.02
-0.03
-0.04
0.E+00
2.E-07
4.E-07
6.E-07
8.E-07
1.E-06
1.E-06
1.E-06
2.E-06
2.E-06
2.E-06
10
VDD = 2.4V
1
0.1
10k
1.E+04
Time (200 ns/div)
FIGURE 2-14:
Pulse Response.
5.0
Small Signal, Non-Inverting
VDD = 5.5V
FIGURE 2-17:
Frequency.
100k
1M
1.E+05
1.E+06
Frequency (Hz)
10M
1.E+07
Output Voltage Swing vs.
G = +1 V/V
Output Voltage (V)
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0.E+00
1.E-06
2.E-06
3.E-06
4.E-06
5.E-06
6.E-06
7.E-06
8.E-06
9.E-06
1.E-05
Time (1 µs/div)
FIGURE 2-15:
Pulse Response.
Large Signal, Non-Inverting
© 2009 Microchip Technology Inc.
DS22141A-page 7
MCP6L91/1R/2/4
NOTES:
DS22141A-page 8
© 2009 Microchip Technology Inc.
MCP6L91/1R/2/4
3.0
PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
MCP6L91
MCP6L91R
MCP6L92
MCP6L94
SOT-23-5
MSOP-8,
SOIC-8,
SOT-23-5
MSOP-8,
SOIC-8,
SOIC-14,
TSSOP-14
1
4
3
5
—
—
—
—
—
—
2
—
—
—
—
6
2
3
7
—
—
—
—
—
—
4
—
—
—
1, 5, 8
1
4
3
2
—
—
—
—
—
—
5
—
—
—
—
1
2
3
8
5
6
7
—
—
—
4
—
—
—
—
1
2
3
4
5
6
7
8
9
10
11
12
13
14
—
3.1
Analog Outputs
Symbol
VOUT, VOUTA
VIN–, VINA–
VIN+, VINA+
VDD
VINB+
VINB–
VOUTB
VOUTC
VINC–
VINC+
VSS
VIND+
VIND–
VOUTD
NC
3.3
Description
Output (op amp A)
Inverting Input (op amp A)
Non-inverting Input (op amp A)
Positive Power Supply
Non-inverting Input (op amp B)
Inverting Input (op amp B)
Output (op amp B)
Output (op amp C)
Inverting Input (op amp C)
Non-inverting Input (op amp C)
Negative Power Supply
Non-inverting Input (op amp D)
Inverting Input (op amp D)
Output (op amp D)
No Internal Connection
Power Supply Pins
The analog output pins (VOUT) are low-impedance
voltage sources.
The positive power supply (VDD) is 2.4V to 6.0V higher
than the negative power supply (VSS). For normal
operation, the other pins are between VSS and VDD.
3.2
Typically, these parts are used in a single (positive)
supply configuration. In this case, VSS is connected to
ground and VDD is connected to the supply. VDD will
need bypass capacitors.
Analog Inputs
The non-inverting and inverting inputs (VIN+, VIN–, …)
are high-impedance CMOS inputs with low bias
currents.
© 2009 Microchip Technology Inc.
DS22141A-page 9
MCP6L91/1R/2/4
NOTES:
DS22141A-page 10
© 2009 Microchip Technology Inc.
MCP6L91/1R/2/4
4.0
APPLICATION INFORMATION
The MCP6L91/1R/2/4 family of op amps is manufactured using Microchip’s state of the art CMOS process.
It is designed for low cost, low power and general purpose applications. The low supply voltage, low
quiescent current and wide bandwidth makes the
MCP6L91/1R/2/4 ideal for battery-powered applications.
4.1
Rail-to-Rail Inputs
4.1.1
PHASE REVERSAL
The MCP6L91/1R/2/4 op amps are designed to
prevent phase inversion when the input pins exceed
the supply voltages. Figure 2-10 shows an input
voltage exceeding both supplies without any phase
reversal.
4.1.2
INPUT VOLTAGE AND CURRENT
LIMITS
In order to prevent damage and/or improper operation
of these amplifiers, the circuit they are in must limit the
currents (and voltages) at the input pins (see
Section 1.1 “Absolute Maximum Ratings †”).
Figure 4-1 shows the recommended approach to
protecting these inputs. The internal ESD diodes
prevent the input pins (VIN+ and VIN–) from going too
far below ground, and the resistors R1 and R2 limit the
possible current drawn out of the input pins. Diodes D1
and D2 prevent the input pins (VIN+ and VIN–) from
going too far above VDD, and dump any currents onto
VDD.
VDD
D1
D2
V1
R1
MCP6L9X
V2
R2
A significant amount of current can flow out of the
inputs (through the ESD diodes) when the common
mode voltage (VCM) is below ground (VSS); see
Figure 2-7. Applications that are high impedance may
need to limit the usable voltage range.
4.1.3
NORMAL OPERATION
The input stage of the MCP6L91/1R/2/4 op amps use
two differential CMOS input stages in parallel. One
operates at low common mode input voltage (VCM),
while the other operates at high VCM. WIth this
topology, and at room temperature, the device
operates with VCM up to 0.3V above VDD and 0.3V
below VSS (typical at 25°C).
The transition between the two input stages occurs
when VCM = VDD – 1.1V. For the best distortion and
gain linearity, with non-inverting gains, avoid this region
of operation.
4.2
Rail-to-Rail Output
The output voltage range of the MCP6L91/1R/2/4 op
amps is VDD – 20 mV (minimum) and VSS + 20 mV
(maximum) when RL = 10 kΩ is connected to VDD/2
and VDD = 5.0V. Refer to Figure 2-13 for more information.
4.3
Capacitive Loads
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response.
When driving large capacitive loads with these op
amps (e.g., > 100 pF when G = +1), a small series
resistor at the output (RISO in Figure 4-2) improves the
feedback loop’s stability by making the output load
resistive at higher frequencies; the bandwidth will
usually be decreased.
RG
RF
RISO
VOUT
R3
VSS – (minimum expected V1)
2 mA
VSS – (minimum expected V2)
R2 >
2 mA
R1 >
FIGURE 4-1:
Inputs.
Protecting the Analog
© 2009 Microchip Technology Inc.
CL
RN
MCP6L9X
FIGURE 4-2:
Output Resistor, RISO
stabilizes large capacitive loads.
Bench measurements are helpful in choosing RISO.
Adjust RISO so that a small signal step response (see
Figure 2-14) has reasonable overshoot (e.g., 4%).
DS22141A-page 11
MCP6L91/1R/2/4
4.4
Supply Bypass
Guard Ring
With this family of operational amplifiers, the power
supply pin (VDD for single supply) should have a local
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm
for good high frequency performance. It also needs a
bulk capacitor (i.e., 1 µF or larger) within 100 mm to
provide large, slow currents. This bulk capacitor can be
shared with other nearby analog parts.
FIGURE 4-4:
4.5
1.
Unused Op Amps
An unused op amp in a quad package (e.g., MCP6L94)
should be configured as shown in Figure 4-3. These
circuits prevent the output from toggling and causing
crosstalk. Circuit A sets the op amp at its minimum
noise gain. The resistor divider produces any desired
reference voltage within the output voltage range of the
op amp; the op amp buffers that reference voltage.
Circuit B uses the minimum number of components
and operates as a comparator, but it may draw more
current.
¼ MCP6L94 (A)
VDD
VREF
R2
V REF
4.7
4.7.1
R2
= V DD ⋅ -----------------R1 + R2
FIGURE 4-3:
4.6
2.
VDD
R1
Unused Op Amps.
PCB Surface Leakage
In applications where low input bias current is critical,
PCB (printed circuit board) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 1012Ω. A 5V difference would
cause 5 pA of current to flow; this is greater than this
family’s bias current at 25°C (1 pA, typical).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
Figure 4-4 is an example of this type of layout.
Application Circuit
ACTIVE LOW-PASS FILTER
The MCP6L91/1R/2/4 op amp’s low input noise and
good output current drive make it possible to design
low noise filters. Reducing the resistors’ values also
reduces the noise and increases the frequency at
which parasitic capacitances affect the response.
These trade-offs need to be considered when selecting
circuit elements.
Figure 4-5 shows a third-order Chebyshev filter with a
1 kHz bandwidth, 0.2 dB ripple and a gain of +1 V/V.
The component values were selected using Microchip’s FilterLab® software. Resistor R3 was reduced in
value by increasing C3 in FilterLab.
R1
R2
3.01 kΩ 6.81 kΩ
VIN
C1
120 nF
FIGURE 4-5:
DS22141A-page 12
Example guard ring layout.
Inverting Amplifiers (Figure 4-4) and Transimpedance Gain Amplifiers (convert current to
voltage, such as photo detectors).
a) Connect the guard ring to the non-inverting
input pin (VIN+); this biases the guard ring
to the same reference voltage as the op
amp’s input (e.g., VDD/2 or ground).
b) Connect the inverting pin (VIN–) to the input
with a wire that does not touch the PCB surface.
Non-inverting Gain and Unity-Gain Buffer.
a) Connect the guard ring to the inverting input
pin (VIN–); this biases the guard ring to the
common mode input voltage.
b) Connect the non-inverting pin (VIN+) to the
input with a wire that does not touch the
PCB surface.
¼ MCP6L94 (B)
VDD
VIN– VIN+
C2
12 nF
MCP6L91
R3
9.31 kΩ
C3
27 nF
VOUT
Chebyshev Filter.
© 2009 Microchip Technology Inc.
MCP6L91/1R/2/4
5.0
DESIGN AIDS
Microchip provides the basic design aids needed for
the MCP6L91/1R/2/4 family of op amps.
5.1
FilterLab® Software
Microchip’s FilterLab® software is an innovative
software tool that simplifies analog active filter (using
op amps) design. Available at no cost from the Microchip web site at www.microchip.com/filterlab, the FilterLab design tool provides full schematic diagrams of the
filter circuit with component values. It also outputs the
filter circuit in SPICE format, which can be used with
the macro model to simulate actual filter performance.
5.2
Microchip Advanced Part Selector
(MAPS)
5.4
Application Notes
The following Microchip Application Notes are
available on the Microchip web site at www.microchip.
com/appnotes and are recommended as supplemental
reference resources.
• ADN003: “Select the Right Operational Amplifier
for your Filtering Circuits”, DS21821
• AN722: “Operational Amplifier Topologies and DC
Specifications”, DS00722
• AN723: “Operational Amplifier AC Specifications
and Applications”, DS00723
• AN884: “Driving Capacitive Loads With Op
Amps”, DS00884
• AN990: “Analog Sensor Conditioning Circuits –
An Overview”, DS00990
MAPS is a software tool that helps efficiently identify
Microchip devices that fit a particular design requirement. Available at no cost from the Microchip website
at www.microchip.com/maps, the MAPS is an overall
selection tool for Microchip’s product portfolio that
includes Analog, Memory, MCUs and DSCs. Using this
tool, a customer can define a filter to sort features for a
parametric search of devices and export side-by-side
technical comparison reports. Helpful links are also
provided for Data sheets, Purchase and Sampling of
Microchip parts.
5.3
Analog Demonstration and
Evaluation Boards
Microchip offers a broad spectrum of Analog Demonstration and Evaluation Boards that are designed to
help customers achieve faster time to market. For a
complete listing of these boards and their corresponding user’s guides and technical information, visit the
Microchip web site at www.microchip.com/analog
tools.
Some boards that are especially useful are:
•
•
•
•
•
•
•
MCP6XXX Amplifier Evaluation Board 1
MCP6XXX Amplifier Evaluation Board 2
MCP6XXX Amplifier Evaluation Board 3
MCP6XXX Amplifier Evaluation Board 4
Active Filter Demo Board Kit
5/6-Pin SOT-23 Evaluation Board, P/N VSUPEV2
8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board,
P/N SOIC8EV
• 14-Pin SOIC/TSSOP/DIP Evaluation Board,
P/N SOIC14EV
© 2009 Microchip Technology Inc.
DS22141A-page 13
MCP6L91/1R/2/4
NOTES:
DS22141A-page 14
© 2009 Microchip Technology Inc.
MCP6L91/1R/2/4
6.0
PACKAGING INFORMATION
6.1
Package Marking Information
Example:
5-Lead SOT-23 (MCP6L91/1R)
5
4
Device
XXNN
Code
MCP6L91
UUNN
MCP6L91R
UVNN
5
4
UU25
Note: Applies to 5-Lead SOT-23.
1
2
3
1
8-Lead MSOP (MCP6L92)
2
3
Example:
XXXXXX
6L92E
YWWNNN
908256
8-Lead SOIC (150 mil) (MCP6L92)
XXXXXXXX
XXXXYYWW
NNN
MCP6L92E
e3
SN^^0908
256
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
Example:
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2009 Microchip Technology Inc.
DS22141A-page 15
MCP6L91/1R/2/4
Package Marking Information ( Continued)
14-Lead SOIC (150 mil) (MCP6L94)
Example:
MCP6L94
e3
E/SL^^
0908256
XXXXXXXXXX
XXXXXXXXXX
YYWWNNN
14-Lead TSSOP (MCP6L94)
Example:
XXXXXX
YYWW
6L94EST
0908
NNN
256
DS22141A-page 16
© 2009 Microchip Technology Inc.
MCP6L91/1R/2/4
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© 2009 Microchip Technology Inc.
DS22141A-page 17
MCP6L91/1R/2/4
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DS22141A-page 18
© 2009 Microchip Technology Inc.
MCP6L91/1R/2/4
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© 2009 Microchip Technology Inc.
DS22141A-page 19
MCP6L91/1R/2/4
#$%&'()*+,
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DS22141A-page 20
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© 2009 Microchip Technology Inc.
MCP6L91/1R/2/4
-. #$%&'()*+,
.# #$ # /
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! -
/ 0 # 1 /
% # # ! #
D
N
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E1
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1
2
3
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h
b
A2
A
c
φ
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β
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© 2009 Microchip Technology Inc.
DS22141A-page 21
MCP6L91/1R/2/4
.# #$ # /
## +22--- 2
DS22141A-page 22
! -
/ 0 # 1 /
% # # ! #
© 2009 Microchip Technology Inc.
MCP6L91/1R/2/4
-. / / ! #.&.)* .# #$ # /
## +22--- 2
! -
/ 0 # 1 /
% # # ! #
D
N
E
E1
NOTE 1
1 2
e
b
A2
A
c
A1
φ
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3#
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5$8 %1
44""
5
5
7
1#
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:
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8
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1, $ ! &% #$ , 08$#$ #8 # !-## # ! !"!#$! !% #$ !% #$ # & !(
!# "'(
)*+ ) # & #, $ --#$## ".+ % 0$ $ -#$## 0%% # $ ! - * ;)
© 2009 Microchip Technology Inc.
DS22141A-page 23
MCP6L91/1R/2/4
NOTES:
DS22141A-page 24
© 2009 Microchip Technology Inc.
MCP6L91/1R/2/4
APPENDIX A:
REVISION HISTORY
Revision A (March 2009)
• Original Release of this Document.
© 2009 Microchip Technology Inc.
DS22141A-page 25
MCP6L91/1R/2/4
NOTES:
DS22141A-page 26
© 2009 Microchip Technology Inc.
MCP6L91/1R/2/4
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
X
/XX
Device
Temperature
Range
Package
Examples:
a) MCP6L91T-E/OT:
Device:
MCP6L91T:
MCP6L91RT:
MCP6L92T:
MCP6L94T:
Single Op Amp (Tape and Reel)
(SOT-23, SOIC, MSOP)
Single Op Amp (Tape and Reel) (SOT-23)
Dual Op Amp (Tape and Reel)
(SOIC, MSOP)
Quad Op Amp (Tape and Reel)
(SOIC, TSSOP)
Temperature Range:
E
= -40°C to +125°C
Package:
OT
MS
SN
SL
ST
=
=
=
=
=
Plastic Small Outline Transistor (SOT-23), 5-lead
Plastic MSOP, 8-lead
Plastic SOIC, (3.99 mm body), 8-lead
Plastic SOIC (3.99 mm body), 14-lead
Plastic TSSOP (4.4mm body), 14-lead
Tape and Reel,
Extended Temperature,
5LD SOT-23 package
b) MCP6L91T-E/MS: Tape and Reel,
Extended Temperature,
8LD MSOP package.
c) MCP6L91T-E/SN: Tape and Reel,
Extended Temperature,
8LD SOIC package.
a) MCP6L91RT-E/OT: Tape and Reel,
Extended Temperature,
5LD SOT-23 package.
a) MCP6L92T-E/MS: Tape and Reel,
Extended Temperature,
8LD MSOP package.
b) MCP6L92T-E/SN: Tape and Reel,
Extended Temperature,
8LD SOIC package.
a) MCP6L94T-E/SL:
b) MCP6L94T-E/ST:
© 2009 Microchip Technology Inc.
Tape and Reel,
Extended Temperature,
14LD SOIC package.
Tape and Reel,
Extended Temperature,
14LD TSSOP package.
DS22141A-page 27
MCP6L91/1R/2/4
NOTES:
DS22141A-page 28
© 2009 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, rfPIC, SmartShunt and UNI/O are registered
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
FilterLab, Linear Active Thermistor, MXDEV, MXLAB,
SEEVAL, SmartSensor and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, In-Circuit Serial
Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, PICkit, PICDEM,
PICDEM.net, PICtail, PIC32 logo, PowerCal, PowerInfo,
PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total
Endurance, WiperLock and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2009, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2009 Microchip Technology Inc.
DS22141A-page 29
Worldwide Sales and Service
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Technical Support:
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Tel: 91-11-4160-8631
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Tel: 86-756-3210040
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02/04/09
DS22141A-page 30
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