DS14C89A www.ti.com SNLS081C – MAY 1998 – REVISED APRIL 2013 DS14C89A Quad CMOS Receiver Check for Samples: DS14C89A FEATURES DESCRIPTION • The DS14C89A, pin-for-pin compatible to the DS1489A/MC1489A, ia a quad receiver designed to interface data terminal equipment (DTE) with data circuit-terminating equipment (DCE). These devices translate levels conforming to EIA-232E and CCITT V.28 standards to TTL/CMOS logic levels. 1 2 • • • • Meets EIA/TIA-232-E and CCITT V.28 Standards Failsafe - Output High for Open Input LOW Power Consumption On Chip Noise Filter Available in SOIC Package The device is fabricated in low threshold CMOS metal gate technology. The device provides very low power consumption compared to their bipolar equivalents: 900 μA (DS14C89A) versus 26 mA (DS1489A). The DS14C89A provides on chip noise filtering which eliminates the need for external response control filter capacitors. When replacing the DS1489A with the DS14C89A, the response control filter pins can be tied high, low, or not connected. Connection Diagram Figure 1. See Package Number D, NFF0014A 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1998–2013, Texas Instruments Incorporated DS14C89A SNLS081C – MAY 1998 – REVISED APRIL 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) VCC +6V −30V to +30V Input Voltage Receiver Output Voltage (VCC) +0.3V to GND−0.3V Junction Temperature +150°C Continuous Power Dissipation @ +25°C (3) Lead Temp. NFF0014A Package 1513 mW D Package 1063 mW (Soldering 4 seconds) +260°C −65°C to +150°C Storage Temp. Range ESD Rating ≥ 1.8 kV, Typically ≥ 2 kV (HMB, 1.5 kΩ, 100 pF) (1) (2) (3) Absolute Maximum Ratings are those values beyond which the safety of the device cannot be ensured. They are not meant to imply that the devices should be operated at these limits. The tables of AC Electrical Characteristics specify conditions for device operation. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. Derate NFF0014A Package 12.1 mW/°C, and D Package 8.5 mW/°C above +25°C. Recommended Operating Conditions VCC (GND = 0V) Operating Free Air Temp. (TA) 2 DS14C89A Submit Documentation Feedback Min Max Units +4.5 +5.5 V 0 +75 °C Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: DS14C89A DS14C89A www.ti.com SNLS081C – MAY 1998 – REVISED APRIL 2013 Electrical Characteristics Over recommended operating conditions, unless otherwise specified Symbol Parameter Conditions Min Typ Max Units VTH Input High Threshold 1.3 2.7 V VTL Input Low Threshold 0.5 1.9 V VHY Typical Input Hysteresis IIN Input Current 3.6 8.3 mA VIN = −25V −3.6 −8.3 mA VIN = +3V 0.43 1.0 mA VIN = −3V −0.43 −1.0 mA 1.0 VIN = +25V VCC = +4.5V to +5.5V VIN = +15V VCC = 0V (Power-Off) (1) 2.14 5.0 mA VIN = −15V −2.14 −5.0 mA VIN = +3V 0.43 1.0 mA −1.0 mA VIN = −3V VOH Output High Voltage VOL Output Low Voltage −0.43 VIN = VTL (min) IOUT = −3.2 mA 2.8 4.0 V IOUT = −20μA 3.5 4.7 V VIN = VTH (max) IOUT = +3.2 mA ICC (1) Supply Current V No Load, VIN = 2.7V or 0.5V 0.15 0.4 V 0.5 900 μA Under the power-off supply conditions it is assumed that the power supply potential drops to zero (0V) and is replaced by a low impedance or short circuit to ground. AC Electrical Characteristics (1) Over recommended operating conditions, unless otherwise specified, CI = 50 pF Symbol Parameter ConditIons Min Typ Max Units 3.5 6.5 μs 3.2 6.5 μs tPLH Propagation Delay Low to High Input Pulse Width ≥ 10 μs tPHL Propagation Delay High to Low Input Pulse Width ≥ 10 μs tSK Typical Propagation Delay Skew 400 tr Output Rise TIme 40 300 ns tf Output Fall Time 40 300 ns tnw Pulse Width assumed to be Noise 1.0 μs (1) ns AC input waveforms for test purposes: tr = tf = 200 ns, VIH = +3V, VL = −3V, f = 20 KHz. Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: DS14C89A 3 DS14C89A SNLS081C – MAY 1998 – REVISED APRIL 2013 www.ti.com Parameter Measurement Information Figure 2. Receiver Load Circuit Figure 3. Receiver Switching Waveform (2) (2) 4 AC input waveforms for test purposes: tr = tf = 200 ns, VIH = +3V, VL = −3V, f = 20 KHz. Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: DS14C89A DS14C89A www.ti.com SNLS081C – MAY 1998 – REVISED APRIL 2013 TYPICAL APPLICATION INFORMATION Figure 4. Receiver Block Diagram Figure 5. EIA-232D Data Transmission Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: DS14C89A 5 DS14C89A SNLS081C – MAY 1998 – REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Revision B (April 2013) to Revision C • 6 Page Changed layout of National Data Sheet to TI format ............................................................................................................ 5 Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: DS14C89A PACKAGE OPTION ADDENDUM www.ti.com 16-Oct-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) DS14C89AM LIFEBUY SOIC D 14 55 TBD Call TI Call TI 0 to 70 DS14C89AM DS14C89AM/NOPB ACTIVE SOIC D 14 55 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 DS14C89AM DS14C89AN/NOPB ACTIVE PDIP NFF 14 25 Green (RoHS & no Sb/Br) CU SN Level-1-NA-UNLIM 0 to 70 DS14C89AN (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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