Fairchild FAN5362UC27X 3mhz, 500ma / 750ma synchronous buck regulator Datasheet

FAN5362
3MHz, 500mA / 750mA Synchronous Buck Regulator
Features
Description
ƒ
ƒ
ƒ
ƒ
ƒ
ƒ
3MHz Fixed-Frequency Operation
The FAN5362 is a 500mA or 705mA, step-down, switching
voltage regulator that delivers a fixed output voltage from
an input voltage supply of 2.7V to 5.5V. Using a proprietary
architecture with synchronous rectification, the FAN5362 is
capable of delivering a peak efficiency of 96%, while
maintaining efficiency over 90% with load currents as
low as 1mA.
ƒ
ƒ
ƒ
ƒ
ƒ
ƒ
ƒ
ƒ
PFM Mode for High Efficiency in Light Load
45µA Typical Quiescent Current
1.80 to 3.6V Fixed Output Voltage
500mA or 750mA Output Current Capability
2.7V to 5.5V Input Voltage Range
Smooth Transitions to/from 100% Duty Cycle
when VIN Drops
Best-in-Class Load Transient Response
Best-in-Class Efficiency
Forced PWM and External Clock Synchronization
Internal Soft-Start
Input Under-Voltage Lockout (UVLO)
Thermal Shutdown and Overload Protection
6-Bump WLCSP, 0.4mm Pitch or 6-Lead 2 x 2mm
Ultrathin Molded Leadless Package
Applications
ƒ
ƒ
ƒ
ƒ
ƒ
ƒ
SD Flash Memory Power Supply
RF Transeiver Power
Cell Phones, Smart Phones
®
Tablets, Netbooks , Ultra-Mobile PCs
®
®
3G, LTE, WiMAX™, WiBro , and WiFi Data Cards
This regulator transitions seamlessly into and out of 100%
duty cycle operation when the supply dips to or below the
regulation setpoint and smoothly recovers full regulation
without overshoot when the supply recovers.
The regulator operates at a nominal fixed frequency of
3MHz, which reduces the value of the external components
to 1µH for the output inductor and 4.7µF for the output
capacitor. The PWM modulator can be synchronized to an
external frequency source.
At moderate and light loads, pulse frequency modulation is
used to operate the device in power-save mode with a
typical quiescent current of 45µA. Even with such a low
quiescent current, the part exhibits excellent transient
response during large load swings. At higher loads, the
system automatically switches to fixed-frequency control,
operating at 3MHz. In shutdown mode, the supply current
drops below 1µA, reducing power consumption. For
applications that require minimum ripple or fixed frequency,
PFM mode can be disabled using the MODE pin.
The FAN5362 is available in 6-bump, 0.4mm pitch, WaferLevel Chip-Scale Package (WLCSP) and 6-Lead 2 x 2mm
Ultrathin Molded Leadless Package (UMLP).
Gaming Devices, Digital CamerasDC/DC Micro Modules
Figure 1. Typical Application
Trademarks are the property of their respective owners.
© 2009 Fairchild Semiconductor Corporation
FAN5362 • Rev. 1.0.1
www.fairchildsemi.com
FAN5362 — 3MHz, 500mA / 750mA Synchronous Buck Regulator
November 2010
(1)
Part Number
Output Voltage
(2)
2.1
(2)
2.5
(2)
2.7
FAN5362UC21X
FAN5362UC25X
FAN5362UC27X
FAN5362UC29X
2.9
FAN5362UC33X
3.3
FAN5362UMP29X
2.9
FAN5362UMP33X
3.3
Operating Temperature Range
Package
Packing Method
WLCSP-6, 0.4mm Pitch
-40 to 85°C
Tape and Reel
6-Lead, 2 x 2mm UMLP
Note:
1. Other voltage options available on request. Contact a Fairchild representative.
2. Preliminary; not full production release at this time. Contact a Fairchild representative for information.
Table 1. Recommended Components for Circuit in Figure 1
Component
Description
Example Part
Typical
L1
1μH, 2012, 190mΩ, 800mA
Murata LQM21PN1R0MC0
1μH
2.2μF, 6.3V, X5R, 0402
Murata GRM155R60J225ME15
2.2μF, 6.3V, X5R, 0603
GRM188R60J225KE19D
CIN
COUT
2.2μF
4.7μF, X5R, 0603
Murata GRM188R60J475M
4.7μF
10μF, X5R, 0603
Murata GRM188R60J106ME47D
10.0μF
Pin Configuration
Figure 3. WLCSP, Bumps Facing Up
Figure 2. WLCSP, Bumps Facing Down
Pin Definitions
Pin #
Name
Description
A1
MODE
B1
SW
Switching Node. Connect to output inductor.
C1
FB
Feedback / VOUT. Connect to output voltage.
C2
GND
B2
EN
Enable. The device is in shutdown mode when voltage to this pin is <0.4V and enabled when >1.2V.
Do not leave this pin floating.
A2
VIN
Input Voltage. Connect to input power source.
Logic 1 on this pin forces the IC to stay in PWM mode. A logic 0 allows the IC to automatically switch
to PFM during light loads. The regulator also synchronizes its switching frequency to two times the
frequency provided on this pin. Do not leave this pin floating.
Ground. Power and IC ground. All signals are referenced to this pin.
© 2009 Fairchild Semiconductor Corporation
FAN5362 • Rev. 1.0.1
www.fairchildsemi.com
2
FAN5362 — 3MHz, 500mA / 750mA Synchronous Buck Regulator
Ordering Information
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable
above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition,
extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute
maximum ratings are stress ratings only.
Symbol
VIN
VSW
VCTRL
Parameter
Input Voltage
Voltage on SW Pin
Min.
Max.
–0.3
6.5
–0.3
Unit
V
(3)
VIN + 0.3
(3)
EN and MODE Pin Voltage
–0.3
VFB
FB Pin
–0.3
ESD
Electrostatic Discharge
Protection Level
TJ
Junction Temperature
–40
+150
°C
TSTG
Storage Temperature
–65
+150
°C
+260
°C
TL
VIN + 0.3
V
4
Human Body Model per JESD22-A114
3.0
Charged Device Model per JESD22-C101
1.5
Lead Soldering Temperature, 10 Seconds
V
V
kV
Note:
3. Lesser of 6.5V or VIN+0.3V.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating
conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend
exceeding them or designing to Absolute Maximum Ratings.
Symbol
VCC
IOUT
L
CIN
COUT
Parameter
Min.
Supply Voltage Range
2.7
Typ.
(4)
Max.
Unit
5.5
V
Output Current for 2.1V
0
750
Output Current for 2.5V, 2.7V, 2.9V, 3.3V
0
500
Inductor
Input Capacitor
Output Capacitor
mA
1
µH
2.2
µF
24
µF
TA
Operating Ambient Temperature
–40
10
+85
°C
TJ
Operating Junction Temperature
–40
+125
°C
Note:
4. Minimum VIN = VOUT + 200mV or 2.7V, whichever is greater.
Thermal Properties
Junction-to-ambient thermal resistance is a function of application and board layout. This data is measured with four-layer
1s2p boards in accordance to JEDEC standard JESD51. Special attention must be paid not to exceed junction temperature
TJ(max) at a given ambient temperature TA.
Symbol Parameter
θJA
Junction-to-Ambient Thermal Resistance
© 2009 Fairchild Semiconductor Corporation
FAN5362 • Rev. 1.0.1
Typical
WLSCP
150
UMLP
49
Unit
°C/W
www.fairchildsemi.com
3
FAN5362 — 3MHz, 500mA / 750mA Synchronous Buck Regulator
Absolute Maximum Ratings
Minimum and maximum values are at VIN = VEN = 2.7V to 5.5V, VMODE = 0V (AUTO Mode), TA = -40°C to +85°C; circuit of
Figure 1, unless otherwise noted. Typical values are at TA = 25°C, VIN = VEN = 3.6V, VMODE = 0V, COUT=10µF.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
45
75
µA
Power Supplies
IQ
No Load, Not Switching, VIN > 3V
Quiescent Current
PWM Mode
5
Shutdown Supply Current
EN = GND
0.05
1.00
µA
VUVLO
Under-Voltage Lockout
Threshold
Rising VIN
2.5
2.6
V
VUVHYST
Under-Voltage Lockout
Hysteresis
I(SD)
175
V(ENH)
Enable HIGH-Level Input Voltage
V(ENL)
Enable LOW-Level Input Voltage
I(EN)
Enable Input Leakage Current
V(MH)
MODE HIGH-Level Input Voltage
V(ML)
MODE LOW-Level Input Voltage
I(M)
mA
1.05
EN to VIN or GND
MODE Input Leakage Current
mV
V
0.4
V
1.00
µA
0.4
V
0.01
1.00
µA
0.01
1.05
MODE to VIN or GND
V
Switching and Synchronization
fSW
fSYNC
(5)
Switching Frequency
(5)
MODE Synchronization Range
VIN = 3.6V, TA = 25°C
2.7
3.0
3.3
MHz
Square Wave at MODE Input
1.3
1.5
1.7
MHz
ILOAD = 0 to 750mA
2.037
(-3%)
2.100
2.163
(+3%)
ILOAD = 0 to 400mA, VIN ≥ VOUT +
200mV
2.375
(-5%)
2.500
2.575
(+3%)
ILOAD = 0 to 500mA, VIN ≥ VOUT +
300mV
2.425
(-3%)
2.500
2.575
(+3%)
ILOAD = 0 to 400mA, VIN ≥ VOUT +
150mV
-5%
+3%
ILOAD = 0 to 500mA, VIN ≥ VOUT +
300mV
-3%
+3%
Regulation
2.10V
VO
Output Voltage
Accuracy
2.50V
2.70V, 2.90V,
3.30V
tSS
Soft-Start
300
V
From EN Rising Edge
180
µs
PMOS On Resistance
VIN = VGS = 3.6V
330
mΩ
NMOS On Resistance
VIN = VGS = 3.6V
300
mΩ
Output Driver
RDS(on)
ILIM(OL)
(5)
PMOS Peak Current Limit
VOUT = 2.1V
1375
VOUT = 2.5V, 2.7V, 2.9V, 3.3V
800
1000
mA
1150
mA
TTSD
Thermal Shutdown
150
°C
THYS
Thermal Shutdown Hysteresis
15
°C
Notes:
5. Limited by the effect of tOFF minimum (see Figure 7 in Typical Performance Characteristics).
6. The Electrical Characteristics table reflects open-loop data. Refer to the Operation Description and Typical Characteristics
for closed-loop data.
© 2009 Fairchild Semiconductor Corporation
FAN5362 • Rev. 1.0.1
www.fairchildsemi.com
4
FAN5362 — 3MHz, 500mA / 750mA Synchronous Buck Regulator
Electrical Characteristics
Unless otherwise noted, VIN=VEN=3.6V,VMODE=0 (AUTO), VOUT=2.9V, COUT=10µF, and TA=25°C.
2.910
100%
98%
2.905
96%
92%
VOUT (V)
Efficiency
94%
90%
88%
VIN = 3.2, Mode=0
86%
2.900
2.895
VIN = 3.6, Mode=0
VIN = 4.2, Mode=0
84%
2.890
VIN = 3.2, Mode=1
82%
Auto 3.6VIN
VIN = 3.6, Mode=1
Auto 3.2VIN
VIN = 4.2, Mode=1
80%
1
10
100
2.885
1000
-
100
I LOAD Output Current (mA)
Figure 4. Efficiency vs. Load Current and Input Supply
300
400
500
Figure 5. Load Regulation
90
3500
80
3.2VIN_Auto
70
3000
3.6VIN_AUTO
Switching Frequency(kHz)
VOUT ripple(mVpp)
200
I LOAD Output Current (mA)
60
50
40
30
3.2VIN_AUTO
2500
3.6VIN_AUTO
3.6VIN_FPWM
2000
3.2VIN_FPWM
1500
1000
20
500
10
0
0
0
0
100
200
300
400
50
100
500
150
200
250
300
350
400
450
500
Load Current(mA)
Load current (mA)
Figure 7. Effect of tOFF(MIN) on Reducing Switching
Frequency
Figure 6. Ripple
1300
450
400
1200
100
%
d.c .
Load Current (mA)
350
Peak Inductor Current (mA)
500
Always PWM
300
250
Hysteresis
200
150
Always PFM
100
50
1100
1000
900
800
‐40C
+25C
700
0
3
3.5
4
4.5
5
+85C
5.5
600
Input Voltage(V)
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Input Voltage (V)
Figure 8. PFM / PWM Boundaries
© 2009 Fairchild Semiconductor Corporation
FAN5362 • Rev. 1.0.1
Figure 9. Peak Inductor Current
www.fairchildsemi.com
5
FAN5362 — 3MHz, 500mA / 750mA Synchronous Buck Regulator
Typical Characteristics
Unless otherwise noted, VIN=VEN=3.6V,VMODE=0 (AUTO), VOUT=2.9V, COUT=10µF, and TA=25°C.
VOUT
VOUT
IL
IL
Figure 10. PFM to PWM Transition at VIN=3.2V, 10µs/div. Figure 11. PWM to PFM Transition at VIN=3.2V, 10µs/div.
VOUT
VOUT
IL
IL
Figure 12. PFM to PWM Transition at VIN=3.6V, 2µs/div. Figure 13. PWM to PFM Transition at VIN=3.6V, 2µs/div.
VOUT
VOUT
IL
IL
Figure 14. Regular Switching to 100% Duty Cycle
Transition at VIN=3.2V, 5µs/div.
© 2009 Fairchild Semiconductor Corporation
FAN5362 • Rev. 1.0.1
Figure 15. 100% Duty Cycle to Regular Switching
Transition at VIN=3.2V, 5µs/div.
www.fairchildsemi.com
6
FAN5362 — 3MHz, 500mA / 750mA Synchronous Buck Regulator
Typical Characteristics
Unless otherwise noted, VIN=VEN=3.6V,VMODE=0 (AUTO), VOUT=2.9V, COUT=10µF, and TA=25°C.
VIN
EN
VOUT
VOUT
IL
IL
Figure 16. Startup Ramping VIN=VEN with 500mA Load,
1ms/div.
Figure 17. Startup and Shutdown through VEN
with 500mA Load, 50µs/div.
VIN
VOUT
VOUT
IL
IL
ILOAD
Figure 18. Line Transient at VIN=3.2V to 4.2V,
300mA Load, tRISE=tFALL=10µs, 20µs/div.
Figure 19. Load Transient 0mA to 150mA, VIN=3.6V,
tRISE=tFALL=100ns, 5µs/div.
VOUT
VOUT
IL
IL
ILOAD
ILOAD
Figure 20. Load Transient 50mA to 250mA, VIN=3.6V,
tRISE=tFALL=100ns, 5µs/div.
© 2009 Fairchild Semiconductor Corporation
FAN5362 • Rev. 1.0.1
Figure 21. Load Transient 150mA to 400mA, VIN=3.6V,
tRISE=tFALL=100ns, 5µs/div.
www.fairchildsemi.com
7
FAN5362 — 3MHz, 500mA / 750mA Synchronous Buck Regulator
Typical Characteristics
Unless otherwise noted, VIN=VEN=3.6V,VMODE=0 (AUTO), VOUT=2.9V, COUT=10µF, and TA=25°C.
VOUT
VOUT
IL
IL
ILOAD
ILOAD
Figure 22. Load Transient 50mA to 250mA, VIN=3V,
tRISE=tFALL=100ns, 5µs/div.
Figure 23. Load Transient 150mA to 400mA, VIN=3V,
tRISE=tFALL=100ns, 5µs/div.
VIN
VOUT
IL
Figure 24. Startup Ramping VIN=VEN, into Overload, Load=3Ω, 5ms/div.
© 2009 Fairchild Semiconductor Corporation
FAN5362 • Rev. 1.0.1
www.fairchildsemi.com
8
FAN5362 — 3MHz, 500mA / 750mA Synchronous Buck Regulator
Typical Characteristics
FAN5362 is a 500mA or 750mA, step-down switching
voltage regulator that delivers a fixed output voltage from an
input voltage supply up to 5.5V. Using a proprietary
architecture with synchronous rectification, FAN5362 is
capable of delivering a peak efficiency above 96%, while
maintaining efficiency above 90% at load currents as low as
1mA. The regulator operates at a nominal frequency of
3MHz at full load, which reduces the value of the external
components to 1µH for the inductor and 4.7µF for the output
capacitor. High efficiency is maintained at light load with
single-pulse PFM mode.
Synchronous rectification is inhibited during soft-start,
allowing the IC to start into a pre-charged load.
The IC may fail to start if heavy load is applied during startup
and/or if excessive COUT is used. This is due to the currentlimit fault response, which protects the IC in the event of an
over-current condition present during soft-start.
The current required to charge COUT during soft-start is
commonly referred to as “displacement current” and given as:
IDISP = C OUT •
Control Scheme
where
The FAN5362 uses a proprietary, non-linear, fixedfrequency PWM modulator to deliver a fast load transient
response, while maintaining a constant switching
frequency over a wide range of operating conditions. The
regulator performance is independent of the output
capacitor ESR, allowing for the use of ceramic output
capacitors. Although this type of operation normally
results in a switching frequency that varies with input
voltage and load current, an internal frequency loop holds
the switching frequency constant over a large range of
input voltages and load currents.
MODE Pin
Logic 1 on this pin forces the IC to stay in PWM mode. A
logic 0 allows the IC to automatically switch to PFM during
light loads. If the MODE pin is toggled, the converter
synchronizes its switching frequency to four times the
frequency on the mode pin (fMODE).
At startup, the mode pin must be held LOW or HIGH for at
least 10μs to ensure that the converter does not attempt to
synchronize to this pin.
Under-Voltage Lockout
When EN is HIGH, the under-voltage lockout keeps the part
from operating until the input supply voltage rises high
enough to properly operate. This ensures no misbehavior of
the regulator during startup or shutdown.
When VIN approaches VOUT, the regulator increases its duty
cycle until 100% duty cycle is reached. As the duty cycle
approaches 100%, the switching frequency declines due to
the minimum off-time (tOFF(MIN)) of about 35ns imposed by the
control circuit. When 100% duty cycle is reached, VOUT
follows VIN with a drop-out voltage (VDROPOUT) determined by
the total resistance between VIN and VOUT:
Current Limiting
A heavy load or short circuit on the output causes the current
in the inductor to increase until a maximum current threshold
is reached in the high-side switch. Upon reaching this point,
the high-side switch turns off, preventing high currents from
causing damage. 16 consecutive PWM cycles in current limit
causes the regulator to shut down and stay off for about
2900μs before attempting a restart.
(1)
To calculate the worst-case VDROPOUT, use the maximum
PMOS RDS(ON) at high temperature from Figure 5.
In the event of a short circuit, the soft-start circuit attempts to
restart at 240μs, which results in a duty cycle of less than
10%, providing current into a short.
Enable and Soft Start
When the EN pin is LOW, the IC is shut down and the part
draws very little current. In addition, during shutdown, FB is
actively discharged to ground through a 230Ω path. Raising
EN above its threshold voltage activates the part and starts
the soft-start cycle. During soft-start, the internal reference is
ramped using an exponential RC shape to prevent any
overshoot of the output voltage. Current limiting minimizes
inrush during soft-start.
© 2009 Fairchild Semiconductor Corporation
FAN5362 • Rev. 1.0.1
(3)
where IMAX(DC) is the maximum load current the IC is
guaranteed to support (500mA or 750mA).
100% Duty Cycle Operation
)
dV
refers to the soft-start slew rate.
dt
IDISP + ILOAD < IMAX(DC)
Combined
with
exceptional
transient
response
characteristics, the very low quiescent current of the
controller (45µA) maintains high efficiency, even at very light
loads, while preserving fast transient response for
applications requiring tight output regulation.
(
(2)
To prevent shutdown during soft-start, the following condition
must be met:
For very light loads, the FAN5362 operates in discontinuous
current (DCM) single-pulse PFM mode, which produces low
output ripple compared with other PFM architectures.
Transition between PWM and PFM is seamless, with a glitch
of less than 18mV at VOUT during the transition between
DCM and CCM modes.
VDROPOUT = ILOAD • PMOS R DS(ON) + DCRL
dV
dt
The closed-loop peak-current limit, ILIM(PK), is not the same
as the open-loop tested current limit, ILIM(OL), in the Electrical
Characteristics table. This is primarily due to the effect of
propagation delays of the IC current limit comparator.
www.fairchildsemi.com
9
FAN5362 — 3MHz, 500mA / 750mA Synchronous Buck Regulator
Operation Description
When the die temperature increases, due to a high load
condition and/or a high ambient temperature, the output
switching is disabled until the temperature on the die has
fallen sufficiently. The junction temperature at which the
thermal shutdown activates is nominally 150°C with a 20°C
hysteresis.
Efficiency is affected by the inductor DCR and inductance
value. Decreasing the inductor value for a given physical size
typically decreases the DCR; but since ∆I increases, the RMS
current increases, as do the core and skin effect losses.
Minimum Off-Time Effect on Switching
Frequency
IRMS =
tOFF(MIN) is 35ns. This imposes constraints on the maximum
VOUT
that the FAN5362 can provide, or the maximum
VIN
output voltage it can provide at low VOUT while maintaining a
fixed switching frequency in PWM mode.
(8)
Increasing the inductor value produces lower RMS currents,
but degrades transient response. For a given physical
inductor size, increased inductance usually results in an
inductor with lower saturation current and higher DCR.
Inductor Current Rating
The switching frequency drops when the regulator cannot
provide sufficient duty cycle at 3MHz to maintain regulation.
This occurs when VIN is below 3.3V at nominal load currents.
The FAN5362’s current limit circuit can allow a peak current
of 1.25A to flow through L1 under worst-case conditions. If it
is possible for the load to draw that much continuous current,
the inductor should be capable of sustaining that current or
failing in a safe manner.
The calculation for switching frequency is given by:
(4)
Output Capacitor
where:
⎛
VOUT + IOUT • R OFF
t SW (MAX) = 35ns • ⎜⎜1 +
V
IN − IOUT • R ON − VOUT
⎝
ΔI2
12
The increased RMS current produces higher losses through
the RDS(ON) of the IC MOSFETs as well as the inductor ESR.
When VIN is high, fixed switching is maintained as long as
VOUT
≤ 1 − tOFF ( MIN ) • fSW ≈ 0.7 .
VIN
⎞
⎛
1
fSW = min ⎜
, 3MHz ⎟
⎟
⎜ t SW (MAX)
⎠
⎝
IOUT(DC) 2 +
⎞
⎟
⎟
⎠
While 4.7μF capacitors are available in 0402 package size,
0603 capacitors are recommended due to the severe DC
voltage bias degradation in capacitance value that the
0402 exhibits.
(5)
where:
Increasing COUT has no effect on loop stability and can
therefore be increased to reduce output voltage ripple or to
improve transient response. Output voltage ripple, ∆VOUT, is:
ROFF = RDSON _ N + DCRL
R ON = RDSON _ P + DCRL
⎛
⎞
1
ΔVOUT = ΔI • ⎜⎜
+ ESR ⎟⎟
8
•
C
•
f
OUT
SW
⎝
⎠
Applications Information
Selecting the Inductor
If values greater than 24μF of COUT are used, the regulator
may fail to start. See the sections on Enable and Soft Start
for more information.
The output inductor must meet both the required inductance
and the energy handling capability of the application.
Input Capacitor
The 2.2μF ceramic input capacitor should be placed as close
as possible to the VIN pin and GND to minimize the parasitic
inductance. If a long wire is used to bring power to the IC,
additional “bulk” capacitance (electrolytic or tantalum) should
be placed between CIN and the power source lead to reduce
ringing that can occur between the inductance of the power
source leads and CIN.
The inductor value affects the average current limit, the
PWM-to-PFM transition point, the output voltage ripple, and
the efficiency.
The ripple current (∆I) of the regulator is:
ΔI ≈
VOUT ⎛ VIN − VOUT
• ⎜⎜
VIN
⎝ L • fSW
⎞
⎟
⎟
⎠
(9)
(6)
The maximum average load current, IMAX(LOAD) is related to
the peak current limit, ILIM(PK) by the ripple current:
IMAX(LOAD ) = ILIM(PK ) −
ΔI
2
© 2009 Fairchild Semiconductor Corporation
FAN5362 • Rev. 1.0.1
(7)
www.fairchildsemi.com
10
FAN5362 — 3MHz, 500mA / 750mA Synchronous Buck Regulator
The FAN5362 is optimized for operation with L=1μH, but is
stable with inductances up to 1.5μH (nominal) and down to
470nH. The inductor should be rated to maintain at least
80% of its value at ILIM(PK). Failure to do so lowers the
amount of DC current that the IC can deliver.
Thermal Shutdown
There are only three external components: the inductor, input
capacitor, and the output capacitor. For any buck switcher IC,
including the FAN5362, it is important to place a low-ESR
input capacitor very close to the IC, as shown in Figure 25.
The input capacitor ensures good input decoupling, which
helps reduce noise appearing at the output terminals and
ensures that the control sections of the IC do not behave
erratically due to excessive noise. This reduces switching
cycle jitter and ensures good overall performance. It is
important to place the common GND of CIN and COUT as
close as possible to the C2 terminal. There is some flexibility
in moving the inductor further away from the IC; in that case,
VOUT should be considered at the COUT terminal.
A1 A2
L1
0805
(2012)
0402
CAP
B1 B2
C1 C2
0603
COUT
Figure 25. PCB Layout Recommendation
© 2009 Fairchild Semiconductor Corporation
FAN5362 • Rev. 1.0.1
www.fairchildsemi.com
11
FAN5362 — 3MHz, 500mA / 750mA Synchronous Buck Regulator
PCB Layout Guidelines
0.03 C
F
A
E
2X
B
BALL A1
INDEX AREA
0.40
A1
D
(Ø0.20)
Cu Pad
0.40
F
(Ø0.30)
Solder Mask
Opening
0.03 C
2X
TOP VIEW
RECOMMENDED LAND PATTERN
(NSMD PAD TYPE)
0.06 C
0.625
0.547
0.05 C
0.378±0.018
0.208±0.021
E
SEATING PLANE
C
D
SIDE VIEWS
Ø0.260±0.010
6X
0.40
0.005
A. NO JEDEC REGISTRATION APPLIES.
C A B
B. DIMENSIONS ARE IN MILLIMETERS.
C
B
0.40
NOTES:
C. DIMENSIONS AND TOLERANCES PER
ASMEY14.5M, 1994.
(Y) +/-0.018
A
D. DATUM C, THE SEATING PLANE IS DEFINED
BY THE SPHERICAL CROWNS OF THE BALLS.
F
1 2
(X) +/-0.018
E. PACKAGE TYPICAL HEIGHT IS 586 MICRONS
±39 MICRONS (547-625 MICRONS).
BOTTOM VIEW
F. FOR DIMENSIONS D, E, X, AND Y SEE
PRODUCT DATASHEET.
G. DRAWING FILENAME: UC006ACrev4.
Figure 26. 6-Ball, Wafer-Level Chip-Scale Package (WLCSP), 2x3 Array, 0.4mm Pitch, 250µm Ball
Product-Specific Dimensions
Product
D
E
X
Y
FAN5362UCX
1.310 +/-0.030
0.960 +/-0.030
0.280
0.255
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without
notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most
recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty
therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2009 Fairchild Semiconductor Corporation
FAN5362 • Rev. 1.0.1
www.fairchildsemi.com
12
FAN5362 — 3MHz, 500mA / 750mA Synchronous Buck Regulator
Physical Dimensions
0.10 C
2.0
2X
A
B
1.60
1.50
2.0
6
4
0.50
0.10 C
2X
PIN1
IDENT
1.10
1.40
TOP VIEW
1
0.55 MAX
3
0.65
0.10 C
0.08 C
2.40
0.30
(0.15)
RECOMMENDED LAND PATTERN
0.05
0.00
C
SEATING
PLANE
SIDE VIEW
NOTES:
PIN1
IDENT
1
1.50
MAX
A. OUTLINE BASED ON JEDEC REGISTRATION
MO-229, VARIATION VCCC.
3
B. DIMENSIONS ARE IN MILLIMETERS.
6x
1.10
MAX
0.35
0.25
6
4
0.65
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994.
D. DRAWING FILENAME: MKT-UMLP06Crev1
0.35
6x
0.25
1.30
0.10 C A B
0.05 C
BOTTOM VIEW
6-Lead, 2 x 2mm, Ultra-Thin Molded Leadless Package (UMLP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2009 Fairchild Semiconductor Corporation
FAN5362 • Rev. 1.0.1
www.fairchildsemi.com
13
FAN5362 — 3MHz, 500mA / 750mA Synchronous Buck Regulator
Physical Dimensions
FAN5362 — 3MHz, 500mA / 750mA Synchronous Buck Regulator
© 2009 Fairchild Semiconductor Corporation
FAN5362 • Rev. 1.0.1
www.fairchildsemi.com
14
Similar pages