LTC1255 Dual 24V High-Side MOSFET Driver U DESCRIPTIO FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ Fully Enhances N-Channel Power MOSFETs 12µA Standby Current Operates at Supply Voltages from 9V to 24V Short Circuit Protection Easily Protected Against Supply Transients Controlled Switching ON and OFF Times No External Charge Pump Components Compatible With Standard Logic Families Available in 8-Pin SOIC The LTC1255 dual high-side driver allows using low cost N-channel FETs for high-side industrial and automotive switching applications. An internal charge pump boosts the gate drive voltage above the positive rail, fully enhancing an N-channel MOS switch with no external components. Low power operation, with 12µA standby current, allows use in virtually all systems with maximum efficiency. Included on-chip is independent overcurrent sensing to provide automatic shutdown in case of short circuits. A time delay can be added to the current sense to prevent false triggering on high in-rush current loads. UO APPLICATI ■ ■ ■ ■ ■ ■ Solenoid Drivers DC Motor Drivers Stepper Motor Drivers Lamp Drivers/Dimmers Relay Drivers Low Frequency H-Bridge P-Channel Switch Replacement The LTC1255 operates from 9V to 24V supplies and is well suited for industrial and automotive applications. The LTC1255 is available in both an 8-pin DIP and an 8-pin SOIC. UO ■ S TYPICAL APPLICATI Dual 24V High-Side Switch with Overcurrent Protection Standby Supply Current 24V 50 + 10µF 40 VS DS1 IRLR024 DS2 IRLR024 G1 LTC1255 G2 12V IN1 IN2 12V GND 24V/0.5A SOLENOID FROM 1N4001 µP, ETC. VIN1 = VIN2 = 0V TA = 25°C 45 0.036Ω FROM µP, ETC. 1N4001 24V/0.5A SOLENOID SUPPLY CURRENT (µA) 0.036Ω 35 30 25 20 15 10 5 0 0 LTC1255 • TA01 5 15 20 10 SUPPLY VOLTAGE (V) 25 30 LTC1255 • TA02 1 LTC1255 W W W AXI U U ABSOLUTE RATI GS Supply Voltage ......................................... – 0.3V to 30V Transient Supply Voltage (< 10ms) ......................... 40V Input Voltage ..................... (VS + 0.3V) to (GND – 0.3V) Gate Voltage ...................... (VS + 20V) to (GND – 0.3V) Current (Any Pin)................................................. 50mA Operating Temperature Range LTC1255C............................................... 0°C to 70°C LTC1255I ........................................... – 40°C to 85°C Storage Temperature Range ................ – 65°C to 150°C Lead Temperature (Soldering, 10 sec)................. 300°C U W U PACKAGE/ORDER I FOR ATIO TOP VIEW DS1 1 8 DS2 GATE 1 2 7 GATE 2 GND 3 6 VS IN1 4 5 IN2 ORDER PART NUMBER LTC1255CN8 LTC1255IN8 DS1 1 8 DS2 GATE 1 2 7 GATE 2 GND 3 6 VS IN1 4 5 IN2 N8 PACKAGE 8-LEAD PLASTIC DIP S8 PACKAGE 8-LEAD PLASTIC SOIC TJMAX = 100°C, θJA = 130°C/ W TJMAX = 100°C, θJA = 150°C/ W ELECTRICAL CHARACTERISTICS PARAMETER CONDITIONS IQ Quiescent Current OFF VS = 10V, VIN = 0V (Note 1) VS = 18V, VIN = 0V (Note 1) VS = 24V, VIN = 0V (Note 1) VS = 10V, VGATE = 22V, VIN = 5V (Note 2) VS = 18V, VGATE = 30V, VIN = 5V (Note 2) VS = 24V, VGATE = 36V, VIN = 5V (Note 2) Quiescent Current ON Input High Voltage Input Low Voltage Input Current Input Capacitance Drain Sense Threshold Voltage 2 Drain Sense Input Current Gate Voltage Above Supply Gate Output Drive Current S8 PART MARKING 1255 1255I MIN ● TYP MAX UNITS 12 12 12 160 350 600 40 40 40 400 800 1200 µA µA µA µA µA µA V V µA pF mV mV µA V µA µA 2 0.8 ±1 ● 0V ≤ VIN ≤ VS ● ● ISEN VGATE – VS IGATE LTC1255CS8 LTC1255IS8 VS = 9V to 24V, TA = 25°C, unless otherwise noted. SYMBOL VINH VINL IIN CIN VSEN ORDER PART NUMBER TOP VIEW 0V ≤ VSEN ≤ VS VS = 9V VS = 18V, VGATE = 30V VS = 24V, VGATE = 36V 80 75 5 100 100 7.5 5 5 10.5 20 23 ● ● ● ● 120 125 ±0.1 12 LTC1255 ELECTRICAL CHARACTERISTICS VS = 9V to 24V, TA = 25°C, unless otherwise noted. SYMBOL PARAMETER CONDITIONS tON Turn-ON Time VS = 10V, CGATE = 1000pF (Note 3) Time for VGATE > VS + 2V Time for VGATE > VS + 5V VS = 18V, CGATE = 1000pF (Note 3) Time for VGATE > VS + 5V Time for VGATE > VS + 10V VS = 24V, CGATE = 1000pF (Note 3) Time for VGATE > VS + 10V VS = 10V, CGATE = 1000pF, (Note 3, 4) VS = 18V, CGATE = 1000pF, (Note 3, 4) VS = 24V, CGATE = 1000pF, (Note 3, 4) VS = 10V, CGATE = 1000pF, (Note 3, 4) VS = 18V, CGATE = 1000pF, (Note 3, 4) VS = 24V, CGATE = 1000pF, (Note 3, 4) tOFF Turn-OFF Time tSC Short-Circuit Turn-OFF Time The ● denotes specifications which apply over the full operating temperature range. Note 1: Quiescent current OFF is for both channels in OFF condition. Note 2: Quiescent current ON is per driver and is measured independently. The gate voltage is clamped to 12V above the rail to simulate the effects of protection clamps connected across the GATE-SOURCE of the power MOSFET. MIN TYP MAX UNITS 30 75 100 250 300 750 µs µs 40 75 120 250 400 750 µs µs 50 10 10 10 5 5 5 180 24 21 19 16 16 16 500 60 60 60 30 30 30 µs µs µs µs µs µs µs Note 3: Zener diode clamps must be connected across the GATE-SOURCE of the power MOSFET to limit VGS. 1N5242A (through hole) or MMBZ5242A (surface mount) 12V Zener diodes are recommended. All Turn-ON and Turn-OFF tests are performed with a 12V Zener clamp in series with a small-signal diode connected between VS and the GATE output to simulate the effects of a 12V protection Zener clamp connected across the GATE-SOURCE of the power MOSFET. Note 4: Time for VGATE to drop below 1V. U W TYPICAL PERFOR A CE CHARACTERISTICS Standby Supply Current Supply Current per Driver (ON) VIN1 = VIN2 = 0V TA = 25°C 45 20 ONE INPUT = 0N OTHER INPUT = OFF TA = 25°C 1.8 1.6 35 30 25 20 16 1.4 14 1.2 1.0 0.8 12 10 8 0.6 6 10 0.4 4 5 0.2 2 0 0 0 15 0 5 15 20 10 SUPPLY VOLTAGE (V) 25 30 LTC1255 • TPC01 VCLAMP = 12V 18 VGATE – VS (V) SUPPLY CURRENT (mA) 40 SUPPLY CURRENT (µA) Gate Voltage Above Supply 2.0 50 0 5 15 20 10 SUPPLY VOLTAGE (V) 25 30 LTC1255 • TPC02 0 5 15 20 10 SUPPLY VOLTAGE (V) 25 30 LTC1255 • TPC03 3 LTC1255 U W TYPICAL PERFOR A CE CHARACTERISTICS Input Threshold Voltage Drain Sense Threshold Voltage 2.4 2.0 1.8 1.6 VON 1.4 VOFF 1.2 1.0 0.8 0.6 0.4 0 5 15 20 10 SUPPLY VOLTAGE (V) 25 50 TA = 25°C 120 115 110 105 100 95 90 85 5 15 20 10 SUPPLY VOLTAGE (V) 30 0 500 400 VGS = 5V CGATE = 1000pF TIME FOR VGATE < 1V 0 30 25 20 15 35 30 25 20 15 10 5 5 0 0 0 5 15 20 10 SUPPLY VOLTAGE (V) LTC1255 • TA07 25 0 30 Supply Current per Channel (ON) 1.8 2.2 40 1.6 20 VS = 18V VS = 24V 15 10 0 –50 –25 25 50 0 TEMPERATURE (°C) 1.2 1.0 0.8 75 100 VS = 24V 0.6 0.2 LTC1255 • TA10 4 1.4 0.4 VS = 10V 5 INPUT THRESHOLD VOLTAGE (V) 45 SUPPLY CURRENT (mA) 2.4 25 0 –50 VS = 18V VS = 10V –25 25 30 Input ON Threshold 2.0 30 15 20 10 SUPPLY VOLTAGE (V) LTC1255 • TA09 50 35 5 LTC1255 • TA08 Standby Supply Current 30 40 35 30 25 CGATE = 1000pF TIME FOR VGATE < 1V 45 10 VGS = 2V 25 15 20 10 SUPPLY VOLTAGE (V) Short-Circuit Turn-OFF Delay Time TURN-OFF TIME (µs) TURN-OFF TIME (µs) 600 5 LTC1255 • TA06 40 15 20 10 SUPPLY VOLTAGE (V) 10 50 45 700 5 15 Turn-OFF Time CGATE = 1000pF TA = 25°C 0 20 LTC1255 • TPC05 800 TURN-ON TIME (µs) 25 50 100 25 5 Turn-ON Time 200 30 0 0 1000 300 35 75 LTC1255 • TPC04 900 40 80 30 VCLAMP = 12V TA = 25°C 45 GATE CLAMP CURRENT (µA) DRAIN SENSE THRESHOLD VOLTAGE (V) INPUT THRESHOLD VOLTAGE (V) 2.2 STANDBY SUPPLY CURRENT (µA) Gate Clamp Current 125 2.0 1.8 1.6 VS = 10V 1.4 VS = 24V 1.2 1.0 0.8 0.6 25 50 0 TEMPERATURE (°C) 75 100 LTC1255 • TA11 0.4 –50 –25 25 50 0 TEMPERATURE (°C) 75 100 LTC1255 • TA12 LTC1255 U U U PI FU CTIO S Input Pin The LTC1255 input pin is active high and activates all of the protection and charge pump circuitry when switched ON. The LTC1255 logic and shutdown inputs are high impedance CMOS gates with ESD protection diodes to ground and supply and therefore should not be forced beyond the power supply rails. The input pin should be held low during the application of power to properly set the input latch. Gate Drive Pin Drain Sense Pin The gate drive pin is either driven to ground when the switch is turned OFF or driven above the supply rail when the switch is turned ON. This pin is of relatively high impedance when driven above the rail (the equivalent of a few hundred kΩ). Care should be taken to minimize any loading of this pin by parasitic resistance to ground or supply. Supply Pin The supply pin of the LTC1255 serves two vital purposes. The first is obvious; it powers the input, gate drive, regulation and protection circuitry. The second purpose is less obvious; it provides a Kelvin connection to the top of the drain sense resistor for the internal 100mV reference. The supply pin of the LTC1255 should never be forced below ground as this may result in permanent damage to the device. A 100Ω resistor should be inserted in series with the ground pin if negative supply voltage transients are anticipated. OPERATIO The LTC1255 is designed to be continuously powered so that the gate of the MOSFET is actively driven at all times. If it is necessary to remove power from the supply pin and then reapply it, the input pin should be cycled (low to high) a few milliseconds after the power is reapplied to reset the input latch and protection circuitry. Also, the input pin should be isolated from the controlling logic by a 10k resistor if there is a possibility that the input pin will be held high after the supply has been removed. The drain sense pin is compared against the supply pin voltage. If the voltage at this pin is more than 100mV below the supply pin, the input latch will be reset and the MOSFET gate will be quickly discharged. Cycle the input to reset the short-circuit latch and turn the MOSFET back on. This pin is also a high impedance CMOS gate with ESD protection and therefore should not be forced outside of the power supply rails. To defeat the overcurrent protection, short the drain sense pin to the supply pin. Some loads, such as large supply capacitors, lamps or motors require high in-rush currents. An RC time delay can be added between the sense resistor and the drain sense pin to ensure that the drain sense circuitry does not false trigger during startup. This time constant can be set from a few microseconds to many seconds. However, very long delays may put the MOSFET at risk of being destroyed by a short-circuit condition (see Applications Information section). U The LTC1255 is a dual 24V MOSFET driver with built-in protection and gate charge pump. The LTC1255 consists of the following functional blocks: olds are set at about 1.3V with approximately 100mV of hysteresis. A low standby current regulator provides continuous bias for the TTL-to-CMOS converter. TTL and CMOS Compatible Inputs and Latches The input/protection latch should be set after initial power-up, or after reapplication of power, by cycling the input low to high. The LTC1255 inputs have been designed to accommodate a wide range of logic families. Both input thresh- 5 LTC1255 OPERATIO U Internal Voltage Regulation Drain Current Sense The output of the TTL-to-CMOS converter drives two regulated supplies which power the low voltage CMOS logic and analog blocks. The regulator outputs are isolated from each other so that the noise generated by the charge pump logic is not coupled into the 100mV reference or the analog comparator. The LTC1255 is configured to sense the current flowing into the drain of the power MOSFET in a high-side application. An internal 100mV reference is compared to the drop across a sense resistor (typically 0.002Ω to 0.10Ω) in series with the drain lead. If the drop across this resistor exceeds the internal 100mV threshold, the input latch is reset and the gate is quickly discharged via a relatively large N-channel transistor. Gate Charge Pump Gate drive for the power MOSFET is produced by an adaptive charge pump circuit which generates a gate voltage substantially higher than the power supply voltage. The charge pump capacitors are included on-chip and therefore no external components are required to generate the gate drive. The charge pump is designed to drive a 12V Zener diode clamp connected across the gate and source of the MOSFET switch. W BLOCK DIAGRA Controlled Gate Rise and Fall Times When the input is switched ON and OFF, the gate is charged by the internal charge pump and discharged in a controlled manner. The charge and discharge rates have been set to minimize RFI and EMI emissions in normal operation. If a short circuit or current overload condition is encountered, the gate is discharged very quickly (typically a few microseconds) by a large N-channel transistor. (One Channel) DRAIN SENSE ANALOG SECTION VS LOW STANDBY CURRENT REGULATOR 10µs DELAY COMP 100mV REFERENCE GATE CHARGE AND DISCHARGE CONTROL LOGIC ANALOG INPUT TTL-TO-CMOS CONVERTER GATE DIGITAL VOLTAGE REGULATOR R ONE SHOT S INPUT LATCH OSCILLATOR AND CHARGE PUMP FAST/SLOW GATE CHARGE LOGIC LTC1255 • BD GND 6 LTC1255 U U W U APPLICATIO S I FOR ATIO MOSFET AND LOAD PROTECTION The LTC1255 protects the power MOSFET switch by removing drive from the gate as soon as an overcurrent condition is detected. Resistive and inductive loads can be protected with no external time delay in series with the drain sense pin. Lamp loads, however, require that the overcurrent protection be delayed long enough to start the lamp but short enough to ensure the safety of the MOSFET. Large inductive loads (> 0.1mH) may require diodes connected directly across the inductor to safely divert the stored energy to ground. Many inductive loads have these diodes included. If not, a diode of the proper current rating should be connected across the load, as shown in Figure 2, to safely divert the stored energy. 12V + RSENSE 0.036Ω 100µF VS DS1 Resistive Loads 1/2 LTC1255 Loads that are primarily resistive should be protected with as short a delay as possible to minimize the amount of time that the MOSFET is subjected to an overload condition. The drain sense circuitry has a built-in delay of approximately 10µs to eliminate false triggering by power supply or load transient conditions. This delay is sufficient to “mask” short load current transients and the starting of a small capacitor (< 1µF) in parallel with the load. The drain sense pin can therefore be connected directly to the drain current sense resistor as shown in Figure 1. 18V 10µF VS RSENSE 0.036Ω DS1 1/2 LTC1255 IRFZ24 G1 GND IRFZ24 G1 GND 12V 1N5400 12V, 1A SOLENOID LTC1255 • F02 Figure 2. Protecting Inductive Loads Capacitive Loads + IN1 IN1 12V CLOAD ≤ 1µF RLOAD 18Ω LTC1255 • F01 Figure 1. Protecting Resistive Loads Large capacitive loads, such as complex electrical systems with large bypass capacitors, should be powered using the circuit shown in Figure 3. The gate drive to the power MOSFET is passed through an RC delay network, R1 and C1, which greatly reduces the turn-on ramp rate of the switch. And since the MOSFET source voltage follows the gate voltage, the load is powered smoothly and slowly from ground. This dramatically reduces the startup current flowing into the supply capacitor(s) which, in turn, reduces supply transients and allows for slower activation 15V VS Inductive Loads Loads that are primarily inductive, such as relays, solenoids and stepper motor windings, should be protected with as short a delay as possible to minimize the amount of time that the MOSFET is subjected to an overload condition. The built-in 10µs delay will ensure that the overcurrent protection is not false triggered by a supply or load transient. No external delay components are required as shown in Figure 2. CDELAY 0.01µF RDELAY 100k + RSENSE 0.036Ω 470µF DS1 D1 1N4148 1/2 LTC1255 IN1 MTP3055E G1 GND R1 100k R2 100k 12V + C1 0.33µF CLOAD 100µF LTC1255 • F03 Figure 3. Powering Large Capacitive Loads 7 LTC1255 U U W U APPLICATIO S I FOR ATIO The RC network, RDELAY and CDELAY, in series with the drain sense input should be set to trip based on the expected characteristics of the load after startup, i.e., with this circuit, it is possible to power a large capacitive load and still react quickly to an overcurrent condition. The ramp rate at the output of the switch as it lifts off ground is approximately: dV/dt = (VGATE – VTH)/(R1 × C1) Therefore, the current flowing into the capacitor during startup is approximately: ISTARTUP = CLOAD × dV/dt Using the values shown in Figure 3, the startup current is less than 100mA and does not false trigger the drain sense circuitry which is set at 2.7A with a 1ms delay. Lamp Loads The in-rush current created by a lamp during turn-on can be 10 to 20 times greater than the rated operating current. The circuit shown in Figure 4 shifts the current limit threshold up by a factor of 11:1 (to 30A) for a short period of time while the bulb is turned on. The current limit then drops down to 2.7A after the in-rush current has subsided. Selecting RDELAY and CDELAY Figure 5 is a graph of normalized overcurrent shutdown time versus normalized MOSFET current. This graph is used to select the two delay components, RDELAY and CDELAY, which make up a simple RC delay between the drain sense input and the drain sense resistor. The Y axis of the graph is normalized to one RC time constant. The X axis is normalized to the set current. (The set current is defined as the current required to develop 100mV across the drain sense resistor.) Note that the shutdown time is shorter for increasing levels of MOSFET current. This ensures that the total energy dissipated by the MOSFET is always within the bounds established by the manufacturer for safe operation. (See MOSFET data sheet for further S.O.A. information.) 10 NORMALIZED DELAY TIME (1 = RC) of sensitive electrical loads. (Resistor R2, and the diode D1, provide a direct path for the LTC1255 protection circuitry to quickly discharge the gate in the event of an overcurrent condition.) 1 0.1 0.01 0.1 1 10 100 NORMALIZED MOSFET CURRENT (1 = SET CURRENT) LTC1255 • F05 12V + 10k 470µF 100k RSENSE 0.036Ω Figure 5. Normalized Delay Time vs MOSFET Current VS DS1 IN1 G1 GND Using a Speed-Up Diode VN2222LL 1/2 LTC1255 MTP3055EL 0.1µF 1M 9.1V 12V/1A BULB LTC1255 • F04 Figure 4. Lamp Driver With Delayed Protection 8 Another way to reduce the amount of time that the power MOSFET is in a short-circuit condition is to “bypass” the delay resistor with a small signal diode as shown in Figure 6. The diode will engage when the drop across the drain sense resistor exceeds about 0.7V, providing a direct path to the sense pin and dramatically reducing the amount of time the MOSFET is in an overload condition. The drain sense resistor value is selected to limit the maximum DC current to 4A. LTC1255 U U W U APPLICATIO S I FOR ATIO 18V CDELAY 0.01µF RDELAY 100k VS + 100µF RSENSE 0.036Ω DS1 1N4148 1/2 LTC1255 IN1 IRF530 G1 GND 12V LOAD The large output capacitors on many switching regulators, on the other hand, may be able to hold the supply pin of the LTC1255 above 3.5V sufficiently long that this extra filtering is not required. Because the LTC1255 is micropower in both the standby and ON state, the voltage drop across the supply filter is very small (typically < 6mV) and does not significantly alter the accuracy of the drain sense threshold voltage which is typically 100mV. LTC1255 • F06 AUTOMOTIVE APPLICATIONS Figure 6. Using a Speed-Up Diode Reverse Battery Protection Current Limited Power Supplies The LTC1255 requires at least 3.5V at the supply pin to ensure proper operation. It is therefore necessary that the supply to the LTC1255 be held higher than 3.5V at all times, even when the output of the switch is short circuited to ground. The output voltage of a current limited regulator may drop very quickly during short circuit and pull the supply pin of the LTC1255 below 3.5V before the shutdown circuitry has had time to respond and remove drive from the gate of the power MOSFET. A supply filter should be added as shown in Figure 7 which holds the supply pin of the LTC1255 high long enough for the overcurrent shutdown circuitry to respond and fully discharge the gate. Linear regulators with small output capacitors are the most difficult to protect as they can “switch” from a voltage mode to a current limited mode very quickly. The LTC1255 can be protected against reverse battery conditions by connecting a resistor in series with the ground lead as shown in Figure 8. The resistor limits the supply current to less than 120mA with – 12V applied. Since the LTC1255 draws very little current while in normal operation, the drop across the ground resistor is minimal. The 5V µP (or controlling logic) is protected by the 10k resistors in series with the input. 14V 5V 28V + 10µF VS µp OR CONTROL LOGIC DS1 1/2 LTC1255 10k IN1 MTP12N06E G1 GND 12V LOAD 100Ω 12V/2A REGULATOR 15V + RSENSE 0.036Ω LTC1255 • F08 + 10Ω* 0.01µF 10µF + VS 47µF* 10µF RSENSE 0.1Ω 100k Transient Overvoltage Protection DS1 1/2 LTC1255 1N4148 IN1 MTP12N06E G1 GND Figure 8. Reverse Battery Protection 12V SHORT CIRCUIT *SUPPLY FILTER COMPONENT LTC1255 • F07 Figure 7. Supply Filter for Current Limited Supplies A common scheme used to limit overvoltage transients on a 14V nominal automotive power bus is to clamp the supply to the module containing the high-side MOSFET switches with a large transient suppressor diode, D1 in Figure 9. This diode limits the supply voltage to 40V under worse case conditions. The LTC1255 is designed to survive short (10ms) 40V transients and return to normal operation after the transient has passed. 9 LTC1255 U U W U APPLICATIO S I FOR ATIO The switches can either be turned OFF by the controlling logic during these transients or latched OFF above 30V by holding the drain sense pin low as shown in Figure 9. 14V + D1 MR2535L 1µF 50V VS Switch status can be ascertained by means of an XNOR gate connected to the input and switch output through 100k current limiting resistors (see Typical Applications section for more detail on this scheme). The switch is reset after the overvoltage event by cycling the input low and then high again. RSENSE 0.036Ω 1k* DS1 1/2 LTC1255 FROM µP, ETC. 10k IN1 IRF530 G1 12V 1N5242B GND 30V* 1N5256B 100Ω The power MOSFET switch should be selected to have a breakdown voltage sufficiently higher than the 40V supply clamp voltage to ensure that no current is conducted to the load during the transient. LOAD LTC1255 • F09 *OPTIONAL OVERVOLTAGE (30V) LATCH-OFF COMPONENTS Figure 9. Overvoltage Transient Protection U TYPICAL APPLICATIO S Dual Automotive High-Side Switch with Overvoltage Protection, XNOR Status and 12µA Standby Current 14V + 0.036Ω 1µF 50V MR2535L* 0.036Ω VS DS1 DS2 10k 10k** MTD3055E 14V/1A SOLENOID 100k IN1 IN2 12V MMBZ5242B GND FAULT FROM TO µP µP, ETC. TRUTH TABLE IN OUT CONDITION 0 0 SWITCH OFF 1 0 OVERCURRENT 0 1 OPEN LOAD** 1 1 SWITCH ON FAULT 1 0 0 1 1/4 74C266† 100Ω FROM FAULT µP, ETC. TO µP MTD3055E 14V/1A SOLENOID 1N5400 1N5400 1/4 74C266† 10 10k G1 LTC1255 G2 12V MMBZ5242B 100k LTC1255 • TA03 * LIMITS VS TRANSIENTS TO <40V. SEE MANUFACTURER DATA SHEET FOR FURTHER DETAIL. ** OPTIONAL OPEN LOAD DETECTION REQUIRES 10k PULL-UP RESISTORS. (ULTRA LOW STANDBY QUIESCENT CURRENT IS SACRIFICED) † POWER FROM 5V LOGIC SUPPLY. 10k** LTC1255 U TYPICAL APPLICATIO S 10 to 12 Cell Battery Switch and 5V Ramped Load Switch with 12µA Standby Current and Optional 3A Overcurrent Shutdown 18V TO 30V FROM BATTERY CHARGER 1N5400 9.1V MMBZ5239BL 10 TO 12 CELL BATTERY PACK 0.033Ω* IRFR024 IRFR024 SWITCHED BATTERY VIN 10k 0.22µF* 100k* + 12V MMBZ5242BL 2N2222 100µF 10k VS HIGH† EFFICIENCY SWITCHING REGULATOR VOUT 5V/1A + DS1 100µF G1 VLOGIC µP OR CONTROL LOGIC LTC1255 100k IN1 1N4148 DS2 IN2 GND 100k 1k MTD3055EL G2 0.1µF 5V/1A (SWITCHED) LTC1255 • TA04 *OPTIONAL 3A OVERCURRENT SHUTDOWN † SEE LTC1149 DATA SHEET FOR CIRCUIT DETAILS Automotive Motor Direction and Speed Control with Stall-Current Shutdown 14V MR2535L + 10µF 50V 0.1µF 0.1µF DS1 5V 30k G1 DIRECTION MOTOR SPEED AND DIRECTION CONTROL LOGIC OR µP 0.02Ω 100k VS DIRECTION IN1 IN2 DS2 GND 30k G2 MTD3055E 12V MMBZ5242B PWM 1 PWM 2 MTD3055E 12V MMBZ5242B LTC1255 14V DC MOTOR 100Ω MTD3055EL MTD3055EL LTC1255 • TA05 11 LTC1255 U TYPICAL APPLICATIO S Low Frequency (fO = 100Hz) PWM Motor Speed Control with Current Limit and 22V Overvoltage Shutdown 14V OFF SLOW MED 1N4148 + MR2535L 0.1µF 50V 0.47µF 0.01Ω 60k 30k 10k VS 9.1k DS1 10k G1 + 5.6V 1µF FAST 10µF 50V 15k IN1 8 4 6 1k DS2 IN2 2 22V MMBZ5251BL LTC1255 GND 100k G2 IRFR024 22V MMBZ5251BL LMC555 5 3 100Ω 1N4148 0.01µF 1 0.1µF MR750 14V MOTOR LTC1255 • TA06 Dual Automotive Lamp Dimmer with Controlled Rise and Fall Times and Short-Circuit Protection 14V MR2535L PULSE WIDTH ADJUST + 10µF 50V + 1N4148 0.1µF DS1 0.1µF IN1 LMC555 5 MTD3055E 3 IN2 100k DS2 GND G2 0.01µF 1 12V MMBZ5242B 30k MTD3055E 12V MMBZ5242B 100Ω #53 14V BULBS LTC1255 • TA06 12 0.05Ω 30k LTC1255 1N4148 0.05Ω G1 8 4 6 2 0.1µF 100k VS 5.6V 10µF 100k 1k 0.1µF 9.1k LTC1255 U TYPICAL APPLICATIO S 18V to 32V Operation with Overcurrent Shutdown and Optional Overvoltage Shutdown 18V TO 32V 1k + 24V 1N5252B 1µF 50V 10k VS RSEN 0.10Ω 1W (IMAX = VBE/RSEN) 1k 2N3906 36V* 1N5258B DS1 2N3904 1/2 LTC1255 FROM µP, ETC. IN1 GND 10k IRF530 G1 12V 1N5242B *OPTIONAL 36V OVERVOLTAGE SHUTDOWN 18V TO 32V LOAD LTC1255 • TA08 Bootstrapped Gate Driver (100Hz < fO < 10kHz) 9V TO 24V High-Side Switch with Thermal Shutdown (PTC Thermistor) 9V TO 24V + 10µF + 1N4148 10µF 0.036Ω VS VS DS1 PTC* THERMISTOR (100°C) DS1 100k 0.1µF 1/2 LTC1255 G1 FROM µP, ETC. IN1 GND *VGS = VS – 0.6V (CLAMPED AT 12V) RISE AND FALL TIMES ARE BETA TIMES FASTER 1/2 LTC1255 2N2222 G1 * IRFZ44 12V 1N5242B FROM µP, ETC. IN1 GND IRF530 12V 1N5242B LOAD *KEYSTONE RL2006-100-100-30-PT 2N3906 LOAD LTC1255 • TA10 LTC1255 • TA09 13 LTC1255 U TYPICAL APPLICATIO S H-Bridge DC Motor Driver (Direction and ON/OFF Control) 9V TO 24V + 10µF 50V 0.33µF VS DS1 100k G1 5V 1N4148 LTC1255 IN1 1/4 74C02 0.036Ω 100k IN2 1/4 74C02 DS2 GND 100k G2 MTD3055E MTD3055E 12V MMBZ5242B 1N4148 12V MMBZ5242B DC MOTOR 1/4 74C02 100k MTD3055EL 1N4148 LTC1255 • TA11 DIRECTION 100k DISABLE MTD3055EL 1N4148 High-Side DC Motor Driver With Electronic Braking and Stalled Motor Shutdown 18V + 100µF 0.47µF 5V VS 1/4 74C02 1/4 74C02 RUN/COAST 0.02Ω 100k DS1 30k G1 IRFZ34 12V 1N5242B IN1 LTC1255 DS2 BRAKE IN2 GND G2 1Ω* 30k IRFZ34 *SIZE RESISTOR TO DISSIPATE ENERGY REGENERATED BY MOTOR DURING BRAKING. 12V 1N5242B LTC1255 • TA12 14 1N5400 18V DC MOTOR LTC1255 U TYPICAL APPLICATIO S Stepper Motor Driver with Overcurrent Protection 12V + 0.036Ω 0.01µF VS 5V 0.036Ω DS1 IRFR024 12V MMBZ5242BL IN1 LTC1255 IRFR024 STEPPER MOTOR WINDINGS A C B C D IN2 GND G2 VS G1 12V MMBZ5242BL DS2 STEPPER MOTOR CONTROL LOGIC 0.01µF 100k 100k DS1 G1 A 100µF LTC1255 IN1 DS2 IRFR024 12V MMBZ5242BL IRFR024 1N4001 B 1N4001 D 1N4001 1N4001 12V MMBZ5242BL G2 GND IN2 LTC1255 • TA13 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC1255 U PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted. N8 Package 8-Lead Plastic DIP 0.400 (10.160) MAX 8 7 6 5 0.250 ± 0.010 (6.350 ± 0.254) 1 0.300 – 0.320 (7.620 – 8.128) +0.635 –0.381 0.130 ± 0.005 (3.302 ± 0.127) 0.065 (1.651) TYP +0.025 0.325 –0.015 8.255 4 3 0.045 – 0.065 (1.143 – 1.651) 0.009 – 0.015 (0.229 – 0.381) ( 2 0.125 (3.175) MIN 0.045 ± 0.015 (1.143 ± 0.381) ) 0.018 ± 0.003 (0.457 ± 0.076) 0.100 ± 0.010 (2.540 ± 0.254) 0.020 (0.508) MIN N8 0393 S8 Package 8-Lead SOIC 0.189 – 0.197 (4.801 – 5.004) 8 7 6 5 0.228 – 0.244 (5.791 – 6.197) 0.150 – 0.157 (3.810 – 3.988) 1 0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 3 4 0.053 – 0.069 (1.346 – 1.752) 0.004 – 0.010 (0.101 – 0.254) 0°– 8° TYP 0.016 – 0.050 0.406 – 1.270 16 2 Linear Technology Corporation 0.014 – 0.019 (0.355 – 0.483) 0.050 (1.270) BSC SO8 0393 LT/GP 0493 10K REV 0 1630 McCarthy Blvd., Milpitas, CA 95035-7487 (408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977 LINEAR TECHNOLOGY CORPORATION 1993