NTE NTE859 Integrated circuit quad, low noise, jfet input operational amplifier Datasheet

NTE859/NTE859SM
Integrated Circuit
Quad, Low Noise, JFET Input
Operational Amplifier
Description:
The NTE859 (14–Lead DIP) and NTE859SM (SOIC–14 Surface Mount) JFET–input operational amplifiers are low noise amplifiers with low noise input bias, offset currents, and fast slew rate. The low
harmonic distortion and low noise make these devices ideally suited as amplifiers for high–fidelity and
audio preamplifier applications. Each amplifier features JFET–inputs (for high input impedance)
coupled with bipolar output stages all integrated on a single monolithic chip.
Features:
D Low Power Consumption
D Wide Common–Mode and Differential Voltage Ranges
D Low Input Bias and Offset Currents
D Output Short–Circuit Protection
D Low Total Harmonic Distortion: 0.003% Typ
D Low Noise: Vn = 18nV√HZ Typ
D High Input Impedance: JFET–Input Stage
D Internal Frequency Compensation
D Latch–Up Free Operation
D High Slew Rate: 13V/µs Typ
Absolute Maximum Ratings: (TA = 0 to +70°C unless otherwise specified)
Supply Voltage (Note 1), VCC(+) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18V
Supply Voltage (Note1), VCC(–) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18V
Differential Input Voltage (Note 2), VID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30V
Input Voltage Range (Note 1, Note 3),VIDR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±15V
Duration of Output Short Circuit (Note 4),tS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited
Power Dissipation (TA = +25°C), PD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 680mW
Derate Above 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mW/°C
Operating Ambient Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0° to +70°C
Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65° to +150°C
Lead Temperature (During Soldering, 1/16” from Case for 10sec), TL . . . . . . . . . . . . . . . . . . +260°C
Note 1. All voltage values, except differential voltages, are with reapect to the midpoint between
VCC(+) and VCC(–).
Note 2. Differential voltages are at the non–inverting input pin with respect to the inverting pin.
Note 3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage
or 15V, whichever is less.
Note 4. The output may be shorted to GND or to either supply. Temperature and/or supply voltages
must be limited to ensure that the dissipation rating is not exceeded.
Electrical Characteristics: (VCC = ±15V, TA = 0 to+70°C unless otherwise specified)
Parameter
Symbol
Input Offset Voltage
VIO
αVIO
Temperature Coefficient of Input Offset
Voltage
Input Offset Current
IIO
Input Bias Current
IIB
Test Conditions
VO = 0, RS = 50Ω
TA = +25°C
VO = 0, RS = 50Ω
VO = 0, Note 6
VO = 0, Note 6
TA = +25°C
TA = +25°C
Min
Typ
Max
Unit
–
3
10
mV
–
–
13
mV
–
10
–
µV/°C
–
5
100
pA
–
–
2
nA
–
30
200
pA
–
–
7
nA
Common–Mode Input Voltage Range
VICR
TA = +25°C
±11
±12
–
V
Maximum Peak Output Voltage Range
VOM
RL = 10kΩ, TA = +25°C
±12
±13.5
–
V
RL = ≥10kΩ
±12
–
–
V
RL = ≥2kΩ
±10
±12
–
V
25
200
–
V/mV
15
–
–
V/mV
Large–Signal Differential Voltage
Amplification
AVD
VO = ±10V,
RL ≥ 2kΩ
Ω
TA = +25°C
Unity–Gain Bandwidth
B1
TA = +25°C
–
3
–
MHz
Input Resistance
ri
TA = +25°C
–
1012
–
Ω
VIC = VICRmin, VO = 0, RS = 50Ω,
TA = +25°C
70
86
–
dB
VCC = ±15V to ±9V, VO = 0,
RS = 50Ω, TA = +25°C
70
86
–
dB
No Load, VO = 0, TA = +25°C
–
1.4
2.5
mA
–
120
–
dB
Common–Mode Rejection Ratio
CMRR
SupplyVoltage Rejection Ratio
(∆VCC±/∆VIO)
kSVR
Supply Current (Per Amplifier)
ICC
Crosstalk Attenuation
Vo1/Vo2 AVD = 100, TA = +25°C
Note 5. All characteristics are measured under open–loop conditions with zero common–mode voltage unless otherwise specified.
Note 6. Input bias currents of a FET–input operational amplifier are normal junction reverse currents,
which are temperature sensitive. Pulse techniques must be used that will maintain the junction temperatures as close to the ambient temperature as is possible.
Operating Characteristics: (VCC = ±15V, TA = +25°C unless otherwise specified)
Parameter
Slew Rate at Unity Gain
Rise Time Overshoot Factor
Equivalent Input Noise Voltage
Equivalent Input Noise Current
Total Harmonic Distortion
Symbol
Test Conditions
Min
Typ
Max
Unit
SR
VI = 10V, RL = 2kΩ, CL = 100pF
8
13
–
V/µs
tr
VI = 10V, RL = 2kΩ, CL = 100pF
–
0.1
–
µs
–
10
–
%
f = 1kHz
–
18
–
nV/√Hz
f = 10Hz to 10kHz
–
4
–
µV
RS = 100Ω, f = 1kHz
–
0.01
–
pA/√Hz
VO(rms)= 10V, RS ≤ 1kΩ, RL ≥ 2kΩ, f = 1kHz
–
0.003
–
%
Vn
In
THD
RS = 100Ω
Pin Connection Diagram
Output 1
1
14 Output 3
Invert Input 1
Non–Invert Input 1
2
3
4
13 Invert Input 3
12 Nojn–Invert Input 3
11 VCC (–)
Non–Invert Input 2
5
10 Non–Invert Input 4
Invert Input 2
Output 2
6
7
9
8
VCC (+)
Invert Input 4
Output 4
NTE859 (14–Lead DIP)
14
8
1
7
.785 (19.95)
Max
.300
(7.62)
.200 (5.08)
Max
.100 (2.45)
.099 (2.5) Min
.600 (15.24)
NTE859SM (SOIC–14)
.340 (8.64)
14
8
1
7
.236
(5.99)
.154
(3.91)
016
(.406)
.050 (1.27)
061
(1.53)
.006 (.152)
NOTE: Pin1 on Beveled Edge
.198 (5.03)
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