NTF3055L175 Preferred Device Power MOSFET 2.0 A, 60 V, Logic Level N−Channel SOT−223 Designed for low voltage, high speed switching applications in power supplies, converters and power motor controls and bridge circuits. http://onsemi.com 2.0 A, 60 V RDS(on) = 175 m Features • Pb−Free Packages are Available Applications • • • • N−Channel Power Supplies Converters Power Motor Controls Bridge Circuits D G MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Symbol Value Unit Drain−to−Source Voltage VDSS 60 Vdc Drain−to−Gate Voltage (RGS = 1.0 M) VDGR 60 Vdc Gate−to−Source Voltage − Continuous − Non−repetitive (tp ≤ 10 ms) VGS ± 15 ± 20 Vdc Vpk Drain Current − Continuous @ TA = 25°C − Continuous @ TA = 100°C − Single Pulse (tp ≤ 10 s) ID ID 2.0 1.2 6.0 Adc 2.1 1.3 0.014 W W W/°C Rating Total Power Dissipation @ TA = 25°C (Note 1) Total Power Dissipation @ TA = 25°C (Note 2) Derate above 25°C IDM PD 1 SOT−223 CASE 318E STYLE 3 2 3 MARKING DIAGRAM TJ, Tstg −55 to 175 °C Single Pulse Drain−to−Source Avalanche Energy − Starting TJ = 25°C (VDD = 25 Vdc, VGS = 5.0 Vdc, IL(pk) = 3.6 A, L = 10 mH, VDS = 60 Vdc) EAS 65 mJ Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds 4 Apk Operating and Storage Temperature Range Thermal Resistance − Junction−to−Ambient (Note 1) − Junction−to−Ambient (Note 2) S 5L175 L WW = Device Code = Location Code = Work Week 5L175 LWW PIN ASSIGNMENT 4 Drain °C/W RJA RJA 72.3 114 TL 260 °C 1. When surface mounted to an FR4 board using 1″ pad size, 1 oz. (Cu. Area 0.995 in2). 2. When surface mounted to an FR4 board using minimum recommended pad size, 2−2.4 oz. (Cu. Area 0.272 in2). 1 Gate 2 3 Drain Source ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. Preferred devices are recommended choices for future use and best overall value. Semiconductor Components Industries, LLC, 2004 February, 2004 − Rev. 2 1 Publication Order Number: NTF3055L175/D NTF3055L175 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Symbol Characteristic Min Typ Max Unit 60 − 72.8 74.4 − − − − − − 1.0 10 − − ± 100 1.0 − 1.7 4.2 2.0 − − 155 175 − 0.32 0.57 0.42 − gfs − 3.2 − Mhos Ciss − 194 270 pF Coss − 70 100 Crss − 29 40 td(on) − 10.2 20 tr − 21 40 td(off) − 14.3 30 tf − 15.3 30 QT − 5.1 10 Q1 − 1.4 − Q2 − 2.5 − − − 0.84 0.68 1.0 − trr − 28.3 − ta − 15.6 − tb − 12.7 − QRR − 0.027 − OFF CHARACTERISTICS V(BR)DSS Drain−to−Source Breakdown Voltage (Note 3) (VGS = 0 Vdc, ID = 250 Adc) Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (VDS = 60 Vdc, VGS = 0 Vdc) (VDS = 60 Vdc, VGS = 0 Vdc, TJ = 150°C) Gate−Body Leakage Current Vdc Adc IDSS (VGS = ± 15 Vdc, VDS = 0 Vdc) IGSS mV/°C nAdc ON CHARACTERISTICS (Note 3) Gate Threshold Voltage (Note 3) (VDS = VGS, ID = 250 Adc) Threshold Temperature Coefficient (Negative) VGS(th) Static Drain−to−Source On−Resistance (Note 3) (VGS = 5.0 Vdc, ID = 1.0 Adc) RDS(on) Static Drain−to−Source On−Resistance (Note 3) (VGS = 5.0 Vdc, ID = 2.0 Adc) (VGS = 5.0 Vdc, ID = 1.0 Adc, TJ = 150°C) VDS(on) Forward Transconductance (Note 3) (VDS = 8.0 Vdc, ID = 1.5 Adc) Vdc mV/°C m Vdc DYNAMIC CHARACTERISTICS Input Capacitance (VDS = 25 Vdc, Vd VGS = 0 V, V f = 1.0 MHz) Output Capacitance Transfer Capacitance SWITCHING CHARACTERISTICS (Note 4) Turn−On Delay Time Rise Time Turn−Off Delay Time (VDD = 30 Vdc, ID = 2.0 Adc, VGS = 5.0 5 0 Vdc, Vdc RG = 9.1 ) (Note 3) Fall Time Gate Charge (VDS = 48 Vdc, Vd ID = 2.0 2 0 Adc, Ad VGS = 5.0 Vdc) (Note 3) ns nC SOURCE−DRAIN DIODE CHARACTERISTICS Forward On−Voltage (IS = 2.0 Adc, VGS = 0 Vdc) (IS = 2.0 Adc, VGS = 0 Vdc, TJ = 150°C) (Note 3) Reverse Recovery Time (IS = 2.0 Adc, VGS = 0 Vdc, dIS/dt = 100 A/s) (Note 3) Reverse Recovery Stored Charge 3. Pulse Test: Pulse Width ≤ 300 s, Duty Cycle ≤ 2.0%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 VSD Vdc ns C 3.2 3.2 2.8 2.8 ID, DRAIN CURRENT (AMPS) ID, DRAIN CURRENT (AMPS) NTF3055L175 VGS = 3.5 V 2.4 VGS = 4 V 2.0 VGS = 3 V 1.6 VGS = 5 V 1.2 0.8 VGS = 2.5 V 0.4 0 1.2 0.8 0.4 2.0 1.6 2.4 2 1.6 1.2 TJ = 100°C 0.8 TJ = 25°C 0.4 1 2.8 TJ = −55°C 2.2 2.6 3 3.4 3.8 Figure 2. Transfer Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE () Figure 1. On−Region Characteristics VGS = 5 V TJ = 100°C 0.24 0.2 TJ = 25°C 0.16 0.12 TJ = −55°C 0.08 0.04 0.5 1 1.5 2 2.5 3 3.5 4 4.2 0.28 VGS = 10 V 0.24 0.2 0.16 TJ = 25°C 0.12 0.08 0.04 0 0 0.5 1 1.5 2 2.5 3 3.5 ID, DRAIN CURRENT (AMPS) ID, DRAIN CURRENT (AMPS) Figure 3. On−Resistance versus Gate−to−Source Voltage Figure 4. On−Resistance versus Drain Current and Gate Voltage 4 1000 2 1.8 1.8 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 0.28 0 1.4 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) VGS = 0 V ID = 1 A VGS = 5 V IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE () RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 2.4 0 0 0 VDS ≥ 10 V 1.6 1.4 1.2 1 TJ = 150°C 100 TJ = 125°C 10 TJ = 100°C 0.8 0.6 −50 1 −25 0 25 50 75 100 125 150 175 0 10 20 30 40 50 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current versus Voltage http://onsemi.com 3 60 700 VGS = 0 V VDS = 0 V TJ = 25°C 600 C, CAPACITANCE (pF) VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) NTF3055L175 Ciss 500 400 Crss 300 Ciss 200 Coss 100 Crss 0 10 5 VGS 0 VDS 5 10 15 20 25 Q2 3 2 1 ID = 2 A TJ = 25°C 0 0 1 2 3 4 5 6 Figure 8. Gate−to−Source and Drain−to−Source Voltage versus Total Charge 2 IS, SOURCE CURRENT (AMPS) 10 tf td(off) td(on) 1 10 100 VGS = 0 V TJ = 25°C 1.6 1.2 0.8 0.4 0 0.6 0.64 0.68 0.76 0.72 0.8 0.84 0.88 RG, GATE RESISTANCE () VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage versus Current VGS = 15 V SINGLE PULSE TC = 25°C 10 ms 1 ms 100 s 10 s 1 0.1 0.01 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.001 0.1 1 dc 10 100 EAS, SINGLE PULSE DRAIN−TO−SOURCE AVALANCHE ENERGY (mJ) t, TIME (ns) ID, DRAIN CURRENT (AMPS) Q1 4 Figure 7. Capacitance Variation tr 10 QT 5 Qg, TOTAL GATE CHARGE (nC) VDS = 30 V ID = 2 A VGS = 5 V 100 VGS 6 GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) 100 1 7 70 ID = 6 A 60 50 40 30 20 10 0 25 50 75 100 125 150 175 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy versus Starting Junction Temperature http://onsemi.com 4 r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED) NTF3055L175 100 D = 0.5 10 0.2 0.1 0.05 1 P(pk) TEST TYPE > MIN PAD 1 OZ (Cu Area = 0.272 sq in) < DIE SIZE 56 X 56 MILS 0.01 t1 RJC = MIN PAD 1 OZ (Cu Area = 0.272 sq in) °C/W SINGLE PULSE t2 DUTY CYCLE, D = t1/t2 0.1 0.00001 0.0001 0.001 0.1 0.01 1 10 100 1000 t, TIME (s) Figure 13. Thermal Response ORDERING INFORMATION Package Shipping† NTF3055L175T1 SOT−223 (TO−261) 1000 / Tape & Reel NTF3055L175T1G SOT−223 (TO−261) (Pb−Free) 1000 / Tape & Reel NTF3055L175T3 SOT−223 (TO−261) 4000 / Tape & Reel NTF3055L175T3G SOT−223 (TO−261) (Pb−Free) 4000 / Tape & Reel NTF3055L175T3LF SOT−223 (TO−261) 4000 / Tape & Reel NTF3055L175T3LFG SOT−223 (TO−261) (Pb−Free) 4000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 5 NTF3055L175 PACKAGE DIMENSIONS SOT−223 (TO−261) CASE 318E−04 ISSUE K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. A F INCHES DIM MIN MAX A 0.249 0.263 B 0.130 0.145 C 0.060 0.068 D 0.024 0.035 F 0.115 0.126 G 0.087 0.094 H 0.0008 0.0040 J 0.009 0.014 K 0.060 0.078 L 0.033 0.041 M 0 10 S 0.264 0.287 4 S B 1 2 3 D L G J C 0.08 (0003) STYLE 3: PIN 1. 2. 3. 4. M H K MILLIMETERS MIN MAX 6.30 6.70 3.30 3.70 1.50 1.75 0.60 0.89 2.90 3.20 2.20 2.40 0.020 0.100 0.24 0.35 1.50 2.00 0.85 1.05 0 10 6.70 7.30 GATE DRAIN SOURCE DRAIN SOLDERING FOOTPRINT* 3.8 0.15 2.0 0.079 2.3 0.091 2.3 0.091 6.3 0.248 2.0 0.079 1.5 0.059 SCALE 6:1 mm inches SOT−223 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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