bq771600, bq771601, bq771602 www.ti.com SLUSAX0 – DECEMBER 2012 Overvoltage Protection for 2-Series to 4-Series Cell Li-Ion Batteries with External Delay Capacitor Check for Samples: bq771600, bq771601, bq771602 FEATURES APPLICATIONS • • • • • • • 1 • • • 2-, 3-, and 4-Series Cell Overvoltage Protection External Capacitor-Programmed Delay Timer Fixed OVP Threshold High-Accuracy Overvoltage Protection: ±10 mV Low Power Consumption ICC ≈ 1 µA (VCELL(ALL) < VPROTECT) Low Leakage Current Per Cell Input < 100 nA Small Package Footprint – 8-pin QFN (3 mm x 4 mm) Power Tools UPS Battery Backup Light Electric Vehicles – eBike – eScooter – Pedal Assist Bicycles DESCRIPTION The bq7716xy family of products is an overvoltage monitor and protector for Li-Ion battery pack systems. Each cell is monitored independently for an overvoltage condition. In the bq7716xy device, an external delay timer is initiated upon detection of an overvoltage condition on any cell. Upon expiration of the delay timer, the output is triggered into its active state (either high or low, depending on the configuration). The external delay timer feature also includes the ability to detect an open or shorted delay capacitor on the CD pin, which will similarly trigger the output driver in an overvoltage condition. For quicker production-line testing, the bq7716xy device provides a Customer Test Mode with greatly reduced delay time. VDD 1 8 OUT V4 2 7 CD V3 3 6 VSS V2 4 5 V1 Figure 1. bq7716xy Pinout 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2012, Texas Instruments Incorporated bq771600, bq771601, bq771602 SLUSAX0 – DECEMBER 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION TA Part Number Package Package Designator OV Hysteresis (V) Output Drive Tape and Reel (Large) Tape and Reel (Small) bq771600 4.300 0.300 CMOS Active High bq771600DPJR bq771600DPJT bq771601 4.225 0.050 CMOS Active High bq771601DPJR bq771601DPJT bq771602 4.225 0.050 NCH Active Low, Open Drain bq771602DPJR bq771602DPJT 4.325 0.050 NCH Active Low, Open Drain bq771603DPJR bq771603DPJT 0–0.300 CMOS Active High or NCH Active Low, Open Drain bq7716xyTBD bq7716xyTBD –40°C to 110°C 8-pin QFN DPJ bq771603 (1) bq7716xy (2) (1) (2) OVP (V) 3.850–4.650 Product Preview only Future Option, contact TI. THERMAL INFORMATION bq7716xy THERMAL METRIC (1) 8 PINS θJA Junction-to-ambient thermal resistance 56.6 θJC(top) Junction-to-case(top) thermal resistance 56.4 θJB Junction-to-board thermal resistance 30.6 ψJT Junction-to-top characterization parameter 1.0 ψJB Junction-to-board characterization parameter 37.8 θJC(bottom) Junction-to-case(bottom) thermal resistance 11.3 (1) 2 UNITS °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: bq771600 bq771601 bq771602 bq771600, bq771601, bq771602 www.ti.com SLUSAX0 – DECEMBER 2012 PIN FUNCTIONS bq771600 Pin Name Type I/O 1 VDD P Power supply Description 2 V4 I Sense input for positive voltage of the fourth cell from the bottom of the stack 3 V3 I Sense input for positive voltage of the third cell from the bottom of the stack 4 V2 I Sense input for positive voltage of the second cell from the bottom of the stack 5 V1 I Sense input for positive voltage of the lowest cell in the stack 6 VSS P Electrically connected to IC ground and negative terminal of the lowest cell in the stack 7 CD I/O External capacitor connection for delay timer 8 OUT OA Output drive for overvoltage fault signal PIN DETAILS In the bq7716xy device, each cell is monitored independently. Overvoltage is detected by comparing the actual cell voltage to a protection voltage reference, VOV. If any cell voltage exceeds the programmed OV value, a timer circuit is activated. This timer circuit charges the CD pin to a nominal value, then slowly discharges it with a fixed current back down to VSS. When the CD pin falls below a nominal threshold near VSS, the OUT terminal goes from inactive to active state. Additionally, a timeout detection circuit checks to ensure that the CD pin successfully begins charging to above VSS and subsequently drops back down to VSS, and if a timeout error is detected in either direction, it will similarly trigger the OUT pin to become active. See Figure 2 for reference. Cell Voltage (V) (V4–V3, V3–V2, V2–V1, V1–VSS) For an NCH Open Drain Active Low configuration, the OUT pin pulls down to VSS when active (OV present) and is high impedance when inactive (no OV). VOV VOV –VHYS tDELAY OUT (V) Figure 2. Timing for Overvoltage Sensing Copyright © 2012, Texas Instruments Incorporated Product Folder Links: bq771600 bq771601 bq771602 Submit Documentation Feedback 3 bq771600, bq771601, bq771602 SLUSAX0 – DECEMBER 2012 www.ti.com Figure 3 shows the behavior of the CD pin during an OV sequence. Fault condition present Fault response becomes active VCD V(CD) t CHGDELAY t CD ICHG I(CD) IDSG VOUT1 V(OUT) Note: Active High OUT version shown Figure 3. CD Pin Mechanism Sense Positive Input for Vx This is an input to sense each single battery cell voltage. A series resistor and a capacitor across the cell for each input is required for noise filtering and stable voltage monitoring. Output Drive, OUT This terminal serves as the fault signal output, and may be ordered in either active HIGH or LOW options. Supply Input, VDD This terminal is the unregulated input power source for the IC. A series resistor is connected to limit the current, and a capacitor is connected to ground for noise filtering. External Delay Capacitor, CD This terminal is connected to an external capacitor that is used for setting the delay timer during an overvoltage fault event. The CD pin includes a timeout detection circuit to ensure that the output drives active even with a shorted or open capacitor during an overvoltage event. The capacitor connected on the CD pin rapidly charges to a voltage if any one of the cell inputs exceeds the OV threshold. Then the delay circuit gradually discharges the capacitor on the CD pin. Once this capacitor discharges below a set voltage, the OUT transitions from an inactive to active state. 4 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: bq771600 bq771601 bq771602 bq771600, bq771601, bq771602 www.ti.com SLUSAX0 – DECEMBER 2012 To calculate the delay, use the following equation: tCD (sec) = K * CCD (µF), where K = 10 to 20 range. (1) Example: If CCD= 0.1 µF (typical), then the delay timer range is tCD (sec) = 10 * 0.1 = 1 s (Minimum) tCD (sec) = 20 * 0.1 = 2 s (Maximum) NOTE The tolerance on the capacitor used for CCD increases the range of the tCD timer. FUNCTIONAL BLOCK DIAGRAM PACK+ R VD C VD VDD RIN CIN RIN VC3 RIN CIN VC2 Sensing Circuit VC4 VOV Enable Delay Charging/ Active Discharging Circuit CIN VC1 RIN OUT CIN VSS CD CCD PACK– ABSOLUTE MAXIMUM RATINGS Over operating free-air temperature range (unless otherwise noted) (1) PARAMETER Supply voltage range Input voltage range Output voltage range CONDITION VALUE/UNIT VDD–VSS –0.3 to 30 V V4–V3, V3–V2, V2–V1, V1–VSS, or CD–VSS –0.3 to 30 V OUT–VSS Continuous total power dissipation, PTOT –0.3 to 30 V See package dissipation rating. Functional temperature –40 to 110°C Storage temperature range, TSTG –65 to 150°C Lead temperature (soldering, 10 s), TSOLDER (1) 300°C Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum–rated conditions for extended periods may affect device reliability. Copyright © 2012, Texas Instruments Incorporated Product Folder Links: bq771600 bq771601 bq771602 Submit Documentation Feedback 5 bq771600, bq771601, bq771602 SLUSAX0 – DECEMBER 2012 www.ti.com RECOMMENDED OPERATING CONDITIONS Over operating free-air temperature range (unless otherwise noted) PARAMETER Supply voltage, VDD Input voltage range MIN (1) V4–V3, V3–V2, V2–V1, V1–VSS, or CD–VSS Operating ambient temperature range, TA (1) NOM MAX UNIT 3 20 V 0 5 V –40 110 °C See APPLICATION SCHEMATIC. DC CHARACTERISTICS Typical values stated where TA = 25°C and VDD = 14.4 V, MIN/MAX values stated where TA = –40°C to 110°C and VDD = 3 V to 20 V (unless otherwise noted). SYMBOL PARAMETER CONDITION MIN TYP MAX UNIT Voltage Protection Threshold VCx bq771600 4.300 V bq771601 4.225 V bq771602 4.225 V bq771603 (1) 4.325 V V(PROTECT) Overvoltage Detection VOV VHYS OV Detection Hysteresis bq771600 250 300 400 mV bq771601, bq771602, bq771603 25 50 75 mV VOA OV Detection Accuracy TA = 25°C –10 10 mV TA = –40°C –40 44 mV TA = 0°C –20 20 mV TA = 60°C –24 24 mV TA = 110°C –54 54 mV 2 µA 0.1 µA VOADRIFT OV Detection Accuracy Across Temperature Supply and Leakage Current ICC Supply Current (V4–V3) = (V3–V2) = (V2–V1) = (V1–VSS) = 4.0 V (See Figure 13.) IIN Input Current at Vx Pins (V4–V3) = (V3–V2) = (V2–V1) = (V1–VSS) = 4.0 V (See Figure 13.) 1 –0.1 Output Drive OUT, CMOS Active High Versions Only (V4–V3), (V3–V2), (V2–V1), or (V1–VSS) > VOV, VDD = 14.4 V, IOH = 100 µA VOUT1 Output Drive Voltage, Active High 6 V If three of four cells are short circuited, only one cell remains powered and > VOV, VDD = Vx (cell voltage), IOH = 100 µA VDD – 0.3 (V4–V3), (V3–V2), (V2–V1), and (V1–VSS) < VOV, VDD = 14.4 V, IOL = 100 µA measured into OUT pin 250 IOUTH1 OUT Source Current (V4–V3), (V3–V2), (V2–V1), or (V1–VSS) > VOV, (During OV) VDD = 14.4 V, OUT = 0 V. Measured out of OUT pin IOUTL1 OUT Sink Current (No OV) (V4–V3), (V3–V2), (V2–V1), and (V1–VSS) < VOV, VDD = 14.4 V, OUT = VDD. Measured into OUT pin 0.5 V 400 mV 4.5 mA 14 mA 400 mV 14 mA 100 nA Output Drive OUT, NCH Open Drain Active Low Versions Only (1) 6 VOUT2 Output Drive Voltage, Active Low (V4–V3), (V3–V2), (V2–V1), or (V1–VSS) > VOV, VDD = 14.4 V, IOL = 100 µA measured into OUT pin IOUTH2 OUT Sink Current (During OV) (V4–V3), (V3–V2), (V2–V1), or (V1–VSS) > VOV, VDD = 14.4 V. OUT = VDD. Measured into OUT pin IOUTLK OUT Pin Leakage (V4–V3), (V3–V2), (V2–V1), and (V1–VSS) < VOV, VDD = 14.4 V, OUT = VDD. Measured out of OUT pin 250 0.5 Product Preview only Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: bq771600 bq771601 bq771602 bq771600, bq771601, bq771602 www.ti.com SLUSAX0 – DECEMBER 2012 DC CHARACTERISTICS (continued) Typical values stated where TA = 25°C and VDD = 14.4 V, MIN/MAX values stated where TA = –40°C to 110°C and VDD = 3 V to 20 V (unless otherwise noted). SYMBOL PARAMETER CONDITION MIN TYP MAX UNIT 1 1.5 2 s Delay Timer CCD = 0.1 µF (For capacitor sizing, see PIN DETAILS.) tCD OV Delay Time VCD CD Fault Detection External Comparator The CD pin will first be quickly charged to this value Threshold, Initial before being discharged back to VSS. Charge Value tCHGDELAY 1.5 20 V CD Charging Delay OVP to OUT delay with CD shorted to ground ICHG OV Detection Charging Current CD pin fast charging current from VSS to VCD to begin delay countdown 300 µA IDSG OV Detection Discharging Current CD pin discharging current from VDELAY to VSS 100 nA Copyright © 2012, Texas Instruments Incorporated Product Folder Links: bq771600 bq771601 bq771602 170 Submit Documentation Feedback ms 7 bq771600, bq771601, bq771602 SLUSAX0 – DECEMBER 2012 www.ti.com TYPICAL CHARACTERISTICS 0.316 4.40 Mean Min Max 4.39 4.38 0.315 4.36 VHYS (V) VOUT (V) 4.37 4.35 4.34 4.33 0.314 0.313 4.32 4.31 4.30 −50 −25 0 25 50 Temperature (°C) 75 100 125 0.312 −50 −25 0 G001 Figure 4. Overvoltage Threshold (OVT) vs. Temperature 25 50 Temperature (°C) 75 100 125 G002 Figure 5. Hysteresis VHYS vs. Temperature 1.8 1.6 1.5 1.6 1.4 1.4 1.2 ICELL (µA) IDD (µA) 1.3 1.1 1.0 1.2 1.0 0.9 0.8 0.8 0.7 0.6 −50 −25 0 25 50 Temperature (°C) 75 100 125 0.6 −50 Figure 6. IDD Current Consumption vs. Temperature at VDD = 16 V −3.68 8 −3.70 7 25 50 Temperature (°C) 75 100 125 G004 6 −3.74 −3.76 VOUT (V) IOUT (mA) 0 Figure 7. ICELL vs. Temperature at VCELL= 9.2 V −3.72 −3.78 −3.80 −3.82 5 4 3 2 −3.84 1 −3.86 −3.88 −50 −25 0 25 50 Temperature (°C) 75 100 Figure 8. Output Current IOUT vs. Temperature 8 −25 G003 Submit Documentation Feedback 125 0 0 5 10 G005 15 VDD (V) 20 25 30 G006 Figure 9. VOUT vs. VDD Copyright © 2012, Texas Instruments Incorporated Product Folder Links: bq771600 bq771601 bq771602 bq771600, bq771601, bq771602 www.ti.com SLUSAX0 – DECEMBER 2012 APPLICATION INFORMATION Figure 10 shows each external component. C VD VDD RVD Cell 4 Cell 3 RIN CIN CD V4 CCD RIN V3 VSS V2 V1 CIN RIN Cell 2 Cell1 OUT CIN RIN CIN Figure 10. Application Configuration NOTE In the case of an Open Drain Active Low configuration, an external pull-up resistor is required on the OUT terminal. Changes to the ranges stated in Table 1 will impact the accuracy of the cell measurements. Changes to the ranges stated in Table 1 will impact the accuracy of the cell measurements. Table 1. Parameters PARAMETER EXTERNAL COMPONENT MIN NOM MAX 1000 1100 Ω 0.1 µF Voltage monitor filter resistance RIN 900 Voltage monitor filter capacitance CIN 0.01 100 Supply voltage filter resistance RVD Supply voltage filter capacitance CVD 0.1 1K CD external delay capacitance CCD 0.1 OUT Open drain version pull-up resistance to PACK+ ROUT 100k UNIT Ω µF 1 µF Ω NOTE The device is calibrated using an RIN value = 1 kΩ. Using a value other than this recommended value changes the accuracy of the cell voltage measurements and VOV trigger level. Copyright © 2012, Texas Instruments Incorporated Product Folder Links: bq771600 bq771601 bq771602 Submit Documentation Feedback 9 bq771600, bq771601, bq771602 SLUSAX0 – DECEMBER 2012 www.ti.com APPLICATION SCHEMATIC CVD CVD VDD RVD V4 OUT VDD RVD CD OUT V4 CD V3 VSS V2 V1 CCD V3 CCD VSS Cell 3 V2 RIN Cell 2 Cell 1 RIN V1 CIN RIN CIN Cell 2 CIN Cell 1 Figure 11. 2-Series Cell Configuration with Capacitor-Programmed Delay RIN CIN RIN CIN Figure 12. 3-Series Cell Configuration with Capacitor-Programmed Delay NOTE In these application examples of 2s and 3s, an external pull-up resistor is required on the OUT terminal to configure for an Open Drain Active Low operation. 10 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: bq771600 bq771601 bq771602 bq771600, bq771601, bq771602 www.ti.com SLUSAX0 – DECEMBER 2012 CUSTOMER TEST MODE It is possible to reduce test time for checking the overvoltage function by simply shorting the external CD capacitor to VSS. In this case, the OV delay would be reduced to the t(CHGDELAY) value, which has a maximum of 170 ms. CAUTION Avoid exceeding any Absolute Maximum Voltages on any pins when placing the part into Customer Test Mode. Also avoid exceeding Absolute Maximum Voltages for the individual cell voltages (V4–V3), (V3–V2), (V2–V1), and (V1–VSS). Stressing the pins beyond the rated limits may cause permanent damage to the device. Figure 13 shows the timing for the Customer Test Mode. OV Condition V(VCELL) ≤ 170 ms V(OUT) V(CD) CD pin held low Figure 13. Timing for Customer Test Mode Copyright © 2012, Texas Instruments Incorporated Product Folder Links: bq771600 bq771601 bq771602 Submit Documentation Feedback 11 bq771600, bq771601, bq771602 SLUSAX0 – DECEMBER 2012 www.ti.com Figure 14 shows the measurement for current consumption for the product for both VDD and Vx. I CC IIN VDD OUT V4 CD IIN V3 VSS IIN V2 V1 Cell4 Cell3 Cell2 IIN Cell1 Figure 14. Configuration for IC Current Consumption Test 12 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: bq771600 bq771601 bq771602 PACKAGE OPTION ADDENDUM www.ti.com 23-Dec-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Qty Drawing Eco Plan Lead/Ball Finish (2) MSL Peak Temp Samples (3) (Requires Login) BQ771600DPJR ACTIVE WSON DPJ 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ771600DPJT ACTIVE WSON DPJ 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ771601DPJR ACTIVE WSON DPJ 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ771601DPJT ACTIVE WSON DPJ 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ771602DPJR ACTIVE WSON DPJ 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ771602DPJT ACTIVE WSON DPJ 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 23-Dec-2012 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 22-Dec-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing BQ771600DPJR WSON DPJ 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3000 330.0 12.4 3.3 4.3 1.1 8.0 12.0 Q2 BQ771600DPJT WSON DPJ 8 250 180.0 12.4 3.3 4.3 1.1 8.0 12.0 Q2 BQ771601DPJR WSON DPJ 8 3000 330.0 12.4 3.3 4.3 1.1 8.0 12.0 Q2 BQ771601DPJT WSON DPJ 8 250 180.0 12.4 3.3 4.3 1.1 8.0 12.0 Q2 BQ771602DPJR WSON DPJ 8 3000 330.0 12.4 3.3 4.3 1.1 8.0 12.0 Q2 BQ771602DPJT WSON DPJ 8 250 180.0 12.4 3.3 4.3 1.1 8.0 12.0 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 22-Dec-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) BQ771600DPJR WSON DPJ 8 3000 367.0 367.0 35.0 BQ771600DPJT WSON DPJ 8 250 210.0 185.0 35.0 BQ771601DPJR WSON DPJ 8 3000 367.0 367.0 35.0 BQ771601DPJT WSON DPJ 8 250 210.0 185.0 35.0 BQ771602DPJR WSON DPJ 8 3000 367.0 367.0 35.0 BQ771602DPJT WSON DPJ 8 250 210.0 185.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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