FQD1N80 / FQU1N80 N-Channel QFET® MOSFET 800 V, 1.0 A, 20 Ω Description Features This N-Channel enhancement mode power MOSFET is produced using Fairchild Semiconductor’s proprietary planar stripe and DMOS technology. This advanced MOSFET technology has been especially tailored to reduce on-state resistance, and to provide superior switching performance and high avalanche energy strength. These devices are suitable for switched mode power supplies, active power factor correction (PFC), and electronic lamp ballasts. • 1.0 A, 800 V, RDS(on) = 2̀0 Ω (Max.) @ VGS = 10 V, ID = 0.5 A • Low Gate Charge (Typ. 5.5 nC) • Low Crss (Typ. 2.7 pF) • 100% Avalanche Tested D D G S I-PAK D-PAK G D G S S Absolute Maximum Ratings Symbol VDSS ID TC = 25°C unless otherwise noted. Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current FQD1N80TM / FQU1N80TU 800 Unit V - Continuous (TC = 100°C) IDM Drain Current VGSS Gate-Source Voltage EAS Single Pulsed Avalanche Energy IAR EAR dv/dt PD A A 4.0 A ± 30 V (Note 2) 90 mJ Avalanche Current (Note 1) 1.0 A Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TA = 25°C) * (Note 1) 4.5 4.0 2.5 mJ V/ns W 45 0.36 -55 to +150 W W/°C °C 300 °C (Note 3) Power Dissipation (TC = 25°C) TJ, TSTG TL - Pulsed (Note 1) 1.0 0.63 - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering, 1/8" from case for 5 seconds Thermal Characteristics Symbol RJC RJA Parameter FQD1N80TM / FQU1N80TU Thermal Resistance, Junction to Case, Max. 2.78 Thermal Resistance, Junction to Ambient (Minimum Pad of 2-oz Copper), Max. 110 2 Thermal Resistance, Junction to Ambient (*1 in Pad of 2-oz Copper), Max. ©2009 Fairchild Semiconductor Corporation FQD1N80 / FQU1N80 Rev. C2 1 Unit oC/W 50 www.fairchildsemi.com FQD1N80 / FQU1N80 — N-Channel QFET® MOSFET January 2014 FQD1N80TM Top Mark FQD1N80 Package D-PAK Packing Method Tape and Reel Reel Size 330 mm Tape Width 16 mm Quantity 2500 units FQU1N80TU FQU1N80 I-PAK Tube N/A N/A 70 units Part Number Electrical Characteristics Symbol TC = 25°C unless otherwise noted. Parameter Test Conditions Min. Typ. Max. Unit 800 -- -- V -- V/°C Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C -- 1.0 VDS = 800 V, VGS = 0 V -- -- 10 µA VDS = 640 V, TC = 125°C -- -- 100 µA IDSS Zero Gate Voltage Drain Current IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA 3.0 -- 5.0 V On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA RDS(on) Static Drain-Source On-Resistance VGS =10 V, ID =0.5 A -- 15.5 20 Ω gFS Forward Transconductance VDS = 50 V, ID = 0.5 A -- 0.75 -- S VDS = 25 V, VGS = 0 V, f = 1.0 MHz -- 150 195 pF -- 20 26 pF -- 2.7 3.5 pF ns Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 400 V, ID = 1.0 A, RG = 25 Ω (Note 4) VDS = 640 V, ID = 1.0 A, VGS = 10 V (Note 4) -- 10 30 -- 25 60 ns -- 15 40 ns -- 25 60 ns -- 5.5 7.2 nC -- 1.1 -- nC -- 3.3 -- nC A Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 1.0 ISM -- -- 4.0 A VSD Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 1.0 A Drain-Source Diode Forward Voltage -- -- 1.4 V trr Reverse Recovery Time -- 300 -- ns Qrr Reverse Recovery Charge -- 0.6 -- µC VGS = 0 V, IS = 1.0 A, dIF / dt = 100 A/µs Notes: 1. Repetitive rating : pulse-width limited by maximum junction temperature. 2. L = 170 mH, IAS = 1.0 A, VDD = 50 V, RG = 25 Ω, starting TJ = 25°C. 3. ISD ≤ 1.0 A, di/dt ≤ 200 A/µs, VDD ≤ BVDSS, starting TJ = 25°C. 4. Essentially independent of operating temperature. ©2009 Fairchild Semiconductor Corporation FQD1N80 / FQU1N80 Rev. C2 2 www.fairchildsemi.com FQD1N80 / FQU1N80 — N-Channel QFET® MOSFET Package Marking and Ordering Information VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V Bottom : 5.5 V Top : ID, Drain Current [A] 0 ID, Drain Current [A] 0 10 -1 10 10 o 150 C o 25 C o -55 C ※ Notes : 1. 250μ s Pulse Test 2. TC = 25℃ -2 10 ※ Notes : 1. VDS = 50V 2. 250μ s Pulse Test -1 -1 0 10 10 1 10 10 2 4 8 6 10 VGS, Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 50 IDR , Reverse Drain Current [A] RDS(ON) [Ω ], Drain-Source On-Resistance 40 VGS = 10V 30 VGS = 20V 20 10 ※ Note : TJ = 25℃ 0 10 150℃ 25℃ ※ Notes : 1. VGS = 0V 2. 250μ s Pulse Test -1 0.0 0.2 0.4 0.6 0.8 1.0 1.4 1.6 1.8 10 2.0 0.2 0.4 0.6 0.8 1.0 1.2 ID, Drain Current [A] VSD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 250 12 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 200 150 Coss 100 ※ Notes : 1. VGS = 0 V 2. f = 1 MHz Crss 50 VDS = 160V 10 Ciss VGS, Gate-Source Voltage [V] Capacitance [pF] 1.2 VDS = 400V VDS = 640V 8 6 4 2 ※ Note : ID = 1.0 A 0 -1 10 0 10 0 1 10 Figure 5. Capacitance Characteristics ©2009 Fairchild Semiconductor Corporation FQD1N80 / FQU1N80 Rev. C2 0 1 2 3 4 5 6 QG, Total Gate Charge [nC] VDS, Drain-Source Voltage [V] Figure 6. Gate Charge Characteristics 3 www.fairchildsemi.com FQD1N80 / FQU1N80 — N-Channel QFET® MOSFET Typical Characteristics (Continued) 3.0 1.2 RDS(ON) , (Normalized) Drain-Source On-Resistance BV DSS , (Normalized) Drain-Source Breakdown Voltage 2.5 1.1 1.0 ※ Notes : 1. VGS = 0 V 2. ID = 250 μ A 0.9 0.8 -100 -50 0 50 100 150 2.0 1.5 1.0 ※ Notes : 1. VGS = 10 V 2. ID = 0.5 A 0.5 0.0 -100 200 -50 o 0 50 100 150 200 o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 1.2 1 Operation in This Area is Limited by R DS(on) 10 1.0 1 ms 0 10 ID, Drain Current [A] ID, Drain Current [A] 100μ s 10 ms DC -1 10 0.8 0.6 0.4 ※ Notes : 0.2 o 1. TC = 25 C o 2. TJ = 150 C 3. Single Pulse -2 10 0 10 1 2 10 0.0 25 3 10 10 50 Figure 9. Maximum Safe Operating Area ZJC(t), Thermal Response [oC/W] 75 100 125 150 TC, Case Temperature [℃] VDS, Drain-Source Voltage [V] Figure 10. Maximum Drain Current vs. Case Temperature D = 0 .5 10 0 ※ N o te s : 1 . Z θ J C ( t) = 2 .7 8 ℃ /W M a x . 2 . D u ty F a c to r , D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C ( t) 0 .2 0 .1 0 .0 5 10 PDM 0 .0 2 -1 0 .0 1 t1 s i n g l e p u ls e 10 -5 10 -4 10 -3 10 -2 10 -1 t2 10 0 10 1 t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ] Figure 11. Transient Thermal Response Curve ©2009 Fairchild Semiconductor Corporation FQD1N80 / FQU1N80 Rev. C2 4 www.fairchildsemi.com FQD1N80 / FQU1N80 — N-Channel QFET® MOSFET Typical Characteristics 200nF 12V FQD1N80 / FQU1N80 — N-Channel QFET® MOSFET VGS Same Type as DUT 50KΩ Qg 10V 300nF VDS VGS Qgs Qgd DUT IG = const. 3mA Charge Figure 12. Gate Charge Test Circuit & Waveform VDS RG RL VDS 90% VDD VGS VGS DUT V 10V GS 10% td(on) tr td(off) t on tf t off Figure 13. Resistive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L VDS BVDSS IAS ID RG V 10V GS GS VDD ID (t) VDS (t) VDD DUT tp Time tp Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms ©2009 Fairchild Semiconductor Corporation FQD1N80 / FQU1N80 Rev. C2 5 www.fairchildsemi.com + VDS _ I SD L Driver RG VGS VGS ( Driver ) I SD ( DUT ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms ©2009 Fairchild Semiconductor Corporation FQD1N80 / FQU1N80 Rev. C2 6 www.fairchildsemi.com FQD1N80 / FQU1N80 — N-Channel QFET® MOSFET DUT FQD1N80 / FQU1N80 — N-Channel QFET® MOSFET Mechanical Dimensions Figure 16. TO252 (D-PAK), Molded, 3-Lead, Option AA&AB Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TT252-003 ©2009 Fairchild Semiconductor Corporation FQD1N80 / FQU1N80 Rev. C2 7 www.fairchildsemi.com FQD1N80 / FQU1N80 — N-Channel QFET® MOSFET Mechanical Dimensions Figure 17. TO251 (I-PAK), Molded, 3-Lead Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TO251-003 ©2009 Fairchild Semiconductor Corporation FQD1N80 / FQU1N80 Rev. C2 8 www.fairchildsemi.com tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I66 ©2009 Fairchild Semiconductor Corporation FQD1N80 / FQU1N80 Rev. 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