ON FAN6605 Pwm controller Datasheet

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FAN6605
mWSaver™ PWM Controller
Features

Description
™
mWSaver Technology Provides Industry’s Best-inClass Standby Power
- <100 mW at 25-mW Load for LCDM Adaptor
- Internal High-Voltage JFET Startup
- Low Operating Current: Under 2 mA
- Adaptively Decrease PWM Frequency with
Cycle Skipping to 23 kHz at Light-Load
Condition for Better Efficiency
- Feedback Impedance Switching During
Minimum Load or No Load

Proprietary Asynchronous Frequency Hopping
Technique that Reduces EMI




Fixed PWM Frequency: 65 kHz



Soft Gate Drive with Clamped Output Voltage: 18 V



Internal Leading-Edge Blanking
Built-in Synchronized Slope Compensation
Auto-Restart Protection: Feedback Open-Loop
Protection (OLP), VDD Over-Voltage Protection
(OVP), Over-Temperature Protection (OTP), and
Line Over-Voltage Protection
VDD Under-Voltage Lockout (UVLO)
Programmable Constant Power Limit
(Full AC Input Range)
Internal OTP Sensor with Hysteresis
Build-in 5-ms Soft-Start Function
Input Voltage Sensing (VIN Pin) for Brown-In/Out
Protection with Hysteresis and Line Over-Voltage
Protection
This highly integrated PWM controller provides several
features to enhance the performance of flyback
converters.
To minimize standby power consumption, a proprietary
adaptive green-mode function reduces switching
frequency at light-load condition. To avoid acousticnoise problems, the minimum PWM frequency is set
above 23 kHz. This green-mode function enables the
power supply to meet international power conservation
®
requirements, such as Energy Star . With the internal
high-voltage startup circuitry, the power loss caused by
bleeding resistors is also eliminated. To further reduce
power consumption, FAN6605 uses the BiCMOS
process, which allows an operating current of only
2 mA. The standby power consumption can be under
100 mW for most of LCD monitor power supply designs.
FAN6605 — mWSaver™ Controller
January 2015
FAN6605 integrates a frequency-hopping function that
reduces EMI emission of a power supply with minimum
line
filters.
The
built-in
synchronized
slope
compensation achieves a stable peak-current-mode
control and improves noise immunity. The proprietary
line compensation ensures constant output power limit
over a wide AC input voltage range from 90 VAC to
264 VAC.
FAN6605 provides many protection functions. The
internal feedback open-loop protection circuit protects
the power supply from open-feedback-loop condition or
output-short condition. It also has line under-voltage
protection (brownout protection) and over-voltage
protection using an input voltage sensing pin (VIN).
FAN6605 is available in a 7-pin SOP package.
Applications
General-purpose switched-mode power supplies and
flyback power converters, including:


LCD Monitor Power Supply
Open-Frame SMPS
ENERGY STAR® is a registered trademark of the U.S. Department of Energy and the U.S. Environmental Protection Agency.
© 2014 Fairchild Semiconductor Corporation
FAN6605 • Rev. 1.0
www.fairchildsemi.com
Part Number
Operating
Temperature
Range
FAN6605MX
-40 to +105°C
Package
7-Lead, Small Outline Integrated Circuit
(SOIC), Depopulated JEDEC MS-112, .150
Inch Body
PWM
Frequency
Packing
Method
65 kHz
Reel & Tape
Application Diagram
N
EMI
Filter
Vo+
+
+
FAN6605— mWSaver™ Controller
Ordering Information
L
Vo-
1
7
HV
VIN
VDD 6
+
GATE 5
2
FB
SENSE 3
4
FAN6605
Figure 1.
© 2014 Fairchild Semiconductor Corporation
FAN6605 • Rev. 1.0
Typical Application
www.fairchildsemi.com
2
HV
7
Re-start
Protection
Brownout Protection
OTP
OVP
OLP
VIN-OVP
VDD
Soft
Driver
VPWM
Cycle
Skipping
VDD
6
S
VDD-ON /VDD-OFF
Pattern
Generator
Soft-Start
…
Current Limit
Comparator
VLimit
Green
Mode
PWM
Comparator
Max.
Duty
VIN-ON / VIN-OFF
Brownout Protection
High/Low
Line Compensation
VLimit
OLP
Debounce
Circuit
Blanking
OVP
VDD-OVP
1
SENSE
Soft-Start
Comparator
VRESET
VIN
3
Q
VRESET
OSC
Debounce
GATE
R
Internal
BIAS
UVLO
5
FAN6605— mWSaver™ Controller
Internal Block Diagram
5.3V
VPWM
Slope
Compensation
3R
2
FB
R
OLP
Delay
VIN-OVP
OLP
Comparator
VIN-Protect
VFB-OLP
4
GND
Figure 2.
Internal Block Diagram
Marking Information
7
Z: Plant Code
X: 1-Digit Year Code
Y: 1-Digit Week Code
TT: 2-Digit Die Run Code
T: Package Type (M: SOP)
M: Manufacture Flow Code
ZXYTT
6605
TM
Figure 3. Top Mark
© 2014 Fairchild Semiconductor Corporation
FAN6605 • Rev. 1.0
www.fairchildsemi.com
3
FAN6605— mWSaver™ Controller
Pin Configuration
SOP-7
VIN
1
FB
2
SENSE
GND
Figure 4.
7
HV
3
6
VDD
4
5
GATE
Pin Configuration (Top View)
Pin Definitions
Pin #
Name
Description
1
VIN
Line-voltage detection. The line-voltage detection is used for brownout protection with hysteresis.
Constant output power limit over universal AC input range is also achieved using this VIN pin. It
is suggested to add a low-pass filter to filter out line ripple on the bulk capacitor. Pulling VIN
HIGH also triggers auto-restart protection.
2
FB
The signal from the external compensation circuit is fed into this pin. The PWM duty cycle is
determined in response to the signal on this pin and the current-sense signal on the SENSE pin.
3
SENSE
Current sense. The sensed voltage is used for peak-current-mode control and cycle-by-cycle
current limiting.
4
GND
Ground
5
GATE
The totem-pole output driver. Soft-driving waveform is implemented for improved EMI.
6
VDD
7
HV
Power supply. The internal protection circuit disables PWM output as long as V DD exceeds the
OVP trigger point.
For startup, this pin is connected to the line input or bulk capacitor in series with resistors.
© 2014 Fairchild Semiconductor Corporation
FAN6605 • Rev. 1.0
www.fairchildsemi.com
4
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Min.
Max.
Unit
(1, 2)
VVDD
DC Supply Voltage
30
V
VFB
FB Pin Input Voltage
-0.3
6.0
V
SENSE Pin Input Voltage
-0.3
6.0
V
VVIN
VIN Pin Input Voltage
-0.3
6.0
V
VHV
HV Pin Input Voltage
700
V
PD
Power Dissipation (TA＜50°C)
400
mW
JA
Thermal Resistance (Junction-to-Air)
153
C/W
TJ
Operating Junction Temperature
-40
+125
C
Storage Temperature Range
-55
+150
C
+260
C
VSENSE
TSTG
TL
ESD
Lead Temperature (Wave Soldering or IR, 10 Seconds)
Human Body Model,
JEDEC: JESD22-A114
All Pins Except HV Pin
Charged Device Model,
JEDEC: JESD22-C101
All Pins Except HV Pin
FAN6605— mWSaver™ Controller
Absolute Maximum Ratings
5.5
kV
2.0
Notes:
1. All voltage values, except differential voltages, are given with respect to the network ground terminal.
2. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
3. ESD with HV pin: CDM=2000 V and HBM=3500 V.
© 2014 Fairchild Semiconductor Corporation
FAN6605 • Rev. 1.0
www.fairchildsemi.com
5
VDD=11~24 V and TA=-40~105C unless otherwise noted.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
22
V
VDD Section
VOP
Continuously Operating Voltage
Full Load
VDD-ON
Start Threshold Voltage
15
16
17
V
VDD-OFF
Protection Mode
9
10
11
V
UVLO
Normal Mode
6.8
7.8
8.8
V
IDD-ST
Startup Current
VDD-ON – 0.16 V
30
µA
VDD=15 V, GATE Open
IDD-OP
Operating Supply Current
IDD-OLP
Internal Sink Current
2
mA
30
60
90
µA
VDD-OLP
Threshold Voltage on VDD for HV
JFET Turn-On
6.5
7.5
8.0
V
VDD-OVP
VDD Over-Voltage Protection
25
26
27
V
tD-VDDOVP
VDD Over-Voltage Protection
Debounce Time
75
125
200
µs
2.0
3.5
5.0
mA
1
20
µA
VDD-OLP+0.1 V
FAN6605— mWSaver™ Controller
Electrical Characteristics
HV Section
IHV
IHV-LC
Supply Current Drawn from HV Pin
VDC=120 V, VDD=10 µF,
VDD=0 V
Leakage Current after Startup
HV=700 V, VDD=VDDOFF+1 V
VDD
VDD
VDD-ON
VDD-ON
VDD-OFF
UVLO
VDD-OLP
t
t
Normal Mode
Protection Mode
Figure 5.
VDD Behavior
Continued on the following page…
© 2014 Fairchild Semiconductor Corporation
FAN6605 • Rev. 1.0
www.fairchildsemi.com
6
VDD=11~24 V and TA=-40~105C unless otherwise noted.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
62
65
68
±4.5
±5.2
±5.9
Green-Mode Frequency
20
23
26
kHz
Hopping Period
10
12
14
ms
200
220
ms
Oscillator Section
Center Frequency
fOSC
Frequency in Normal Mode
kHz
Hopping Range
fOSC-G
tHOP
tSKIP-N
tSKIP-G
Pulse-Skipping Period
(4)
VFB-SKIP<VFB<VFB-N
180
Pulse-Skipping Period
(4)
VFB-G<VFB<VFB-SKIP
90
ms
fDV
Frequency Variation vs. VDD
Deviation
VDD=11 V to 22 V
5
%
fDT
Frequency Variation vs.
Temperature Deviation
TA=TJ =-40 to 105C
5
%
FAN6605— mWSaver™ Controller
Electrical Characteristics
VIN Section
VIN-OFF
PWM Turn-Off (Brownout)
Threshold Voltage
0.66
0.70
0.74
V
VIN-ON
PWM Turn-On (Brown-in)
Threshold Voltage
VIN-OFF+
0.17
VIN-OFF+
0.20
VIN-OFF+
0.23
V
5.1
5.3
5.5
V
60
100
140
µs
VIN-Protect
tVIN-Protect
Threshold Voltage of VIN OverVoltage Protection
Debounce Time of VIN OverVoltage Protection
Current-Sense Section
VLIMIT at
VIN=1 V
Threshold Voltage for Current Limit
VIN=1 V
0.80
0.83
0.86
V
VLIMIT at
VIN=3 V
Threshold Voltage for Current Limit
VIN=3 V
0.67
0.70
0.73
V
tPD
Delay to Output
100
200
ns
tLEB
Leading-Edge Blanking Time
Steady State
240
290
340
ns
tSS
Period During Soft-Start Time
Startup Time
4.0
5.5
7.0
ms
VLimit
VIN-OFF =0.92V
VIN-Protect =5.3V
VSENSE =0.83V
VSENSE =0.7V
VIN
VIN=1V
VIN=3V
Figure 6.
VIN vs. VSENSE
Continued on the following page…
© 2014 Fairchild Semiconductor Corporation
FAN6605 • Rev. 1.0
www.fairchildsemi.com
7
VDD=11~24 V and TA=-40~105C unless otherwise noted.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
1/4.5
1/4.0
1/3.5
V/V
Feedback Input Section
AV
Internal FB Voltage Attenuation
ZFB
Input Impedance
VFB=4 V
10
15
19
kΩ
VFB-OPEN
The Maximum Clamp of FB Voltage
FB Pin Open
5.1
5.3
5.5
V
VFB-OLP
FB Open-Loop Protection Triggering
Level
TA=25C
4.4
4.6
4.8
V
tD-OLP
Delay Time of FB Pin Open-loop
Protection
45.0
62.5
70.0
ms
VFB-N
Green-Mode Entry FB Voltage
2.8
3.0
3.2
V
VFB-G
Green-Mode Ending FB Voltage
VFB-N - 0.6
V
VFB-SKIP
FB Threshold Voltage for Changing
(4)
Pulse-Skipping Period
2.5
2.7
2.9
V
VFB-ZDCR
FB Threshold Voltage for Zero-Duty
Recovery
1.6
1.8
2.0
V
VFB-ZDC
FB Threshold Voltage for Zero-Duty
1.4
1.6
1.8
V
0.12
0.15
0.19
V
VFB-ZDCR ZDC Hysteresis
VFB-ZDC
FAN6605— mWSaver™ Controller
Electrical Characteristics
PWM Frequency
with cycle skipping
fOSC
fOSC-G
VFB- ZDC VFB- ZDCR VFB-G VFB-SKIP
Figure 7.
VFB-N
VFB
Cycle Skipping vs. VFB
Continued on the following page…
© 2014 Fairchild Semiconductor Corporation
FAN6605 • Rev. 1.0
www.fairchildsemi.com
8
VDD=11~24 V and TA=-40~105C unless otherwise noted.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
60
75
90
%
1.5
V
GATE Section
DCYMAX
Maximum Duty Cycle
VGATE-L
Gate Low Voltage
VDD=15 V, IO=50 mA
VGATE-H
Gate High Voltage
VDD=12 V, IO=50 mA
tr
Gate Rising Time
VDD=15 V, CL=1 nF
100
ns
tf
Gate Falling Time
VDD=15 V, CL=1 nF
30
ns
Gate Source Current
VDD=15 V, GATE=6 V
700
mA
Gate Output Clamping Voltage
VDD=22 V
IGATESOURCE
VGATECLAMP
8
V
18
V
FAN6605— mWSaver™ Controller
Electrical Characteristics
Over-Temperature Protection Section (OTP)
TOTP
TRestart
Protection Junction Temperature
Restart Junction Temperature
(5,7)
(6,7)
125
°C
TOTP-25
°C
Notes:
4. Guarantee by design.
5. When OTP is activated, the PWM switching is shut down.
6. When junction temperature is lower than this level, IC resumes PWM switching.
7. These parameters are guaranteed by design.
© 2014 Fairchild Semiconductor Corporation
FAN6605 • Rev. 1.0
www.fairchildsemi.com
9
Figure 8. Startup Current (IDD-ST) vs. Temperature
Figure 9. Operation Supply Current (IDD-OP)
vs. Temperature
Figure 10. Start Threshold Voltage (VDD-ON)
vs. Temperature
Figure 11. Minimum Operating Voltage (VDD-OFF)
vs. Temperature
Figure 12. Supply Current Drawn from HV Pin (IHV)
vs. Temperature
Figure 13. HV Pin Leakage Current After Startup
(IHV-LC) vs. Temperature
Figure 14. Frequency in Normal Mode (fOSC)
vs. Temperature
Figure 15. Maximum Duty Cycle (DCYMAX)
vs. Temperature
© 2014 Fairchild Semiconductor Corporation
FAN6605 • Rev. 1.0
FAN6605— mWSaver™ Controller
Typical Performance Characteristics
www.fairchildsemi.com
10
Figure 16. FB Open-Loop Trigger Level (VFB-OLP)
vs. Temperature
Figure 17. Delay Time of FB Pin Open-Loop Protection
(tD-OLP) vs. Temperature
Figure 18. PWM Turn-Off Threshold Voltage
(VIN-OFF & VIN-ON) vs. Temperature
Figure 19. VDD Over-Voltage Protection (VDD-OVP)
vs. Temperature
FAN6605— mWSaver™ Controller
Typical Performance Characteristics
Figure 20. VIN vs. VLIMIT
© 2014 Fairchild Semiconductor Corporation
FAN6605 • Rev. 1.0
www.fairchildsemi.com
11
Startup Current
Gate Output / Soft Driving
For startup, the HV pin is connected to the line input or
bulk capacitor in series with diodes and/or resistors. If HV
pin is connected to the line input, a 1-kV/ 1-A diode and a
100 kΩ resistor are recommended. If HV pin is connected
to the bulk capacitor, only the resistor is required. Startup
current drawn from pin HV (typically 3.5 mA) charges the
hold-up capacitor through the diode and resistor. When
the VDD capacitor level reaches VDD-ON, the startup current
switches off. At this moment, only the VDD capacitor
supplies the FAN6605 to maintain VDD before the
auxiliary winding of the main transformer to provide the
operating current.
The BiCMOS output stage is a fast totem-pole gate
driver. Cross conduction has been avoided to minimize
heat dissipation, increase efficiency, and enhance
reliability. The output driver is clamped by an internal
18 V Zener diode to protect power MOSFET transistors
against undesirable gate over-voltage. A soft-driving
circuit is implemented to minimize EMI.
Soft-Start
For many applications, it is necessary to minimize the
inrush current at startup. The built-in 5.5 ms soft-start
circuit significantly reduces the startup current spike and
output voltage overshoot.
Operating Current
FAN6605— mWSaver™ Controller
Functional Description
Slope Compensation
Operating current is below 2 mA. The low operating
current enables better efficiency and reduces the
requirement of VDD hold-up capacitance.
The sensed voltage across the current-sense resistor is
used for peak-current-mode control and pulse-by-pulse
current limiting. Built-in slope compensation improves
stability and prevents sub-harmonic oscillation.
FAN6605 inserts a synchronized positive-going ramp at
every switching cycle as slope compensation.
Green-Mode Operation
The proprietary green-mode function provides an offtime modulation to reduce the switching frequency in
light-load and no-load conditions. The on time is limited
for better abnormal or brownout protection. VFB, which is
derived from the voltage feedback loop, is taken as the
reference. Once VFB is lower than the threshold voltage,
switching frequency is continuously decreased with
cycle skipping to the minimum green-mode frequency of
around 23 kHz.
Constant Output Power Limit
For constant output power limit over universal inputvoltage range, the peak-current threshold is adjusted by
the voltage of the VIN pin. Since the VIN pin is
connected to the rectified AC input line voltage through
the resistive divider, a higher line voltage generates a
higher VIN voltage. The threshold voltage decreases as
VIN increases, making the maximum output power at
high-line input voltage equal to that at low-line input.
The value of R-C network should not be so large that it
affects the power limit (shown in Figure 21). R and C
should be less than 100  and 470 pF, respectively.
Current Sensing / PWM Current Limiting
Peak-current-mode control is utilized to regulate output
voltage and provide pulse-by-pulse current limiting. The
switching current is detected by the current-sensing
resistor of SENSE pin. The PWM duty cycle is
determined by this current sense signal and VFB, the
feedback voltage. When the voltage on the SENSE pin
reaches around VCOMP=(VFB–0.6)/4, the PWM switching
turns off immediately.
Leading-Edge Blanking (LEB)
Each time the power MOSFET is switched on, a turn-on
spike occurs on the sense resistor. To avoid premature
termination of the switching pulse, a leading-edge
blanking time is built in. During this blanking period, the
current-limit comparator is disabled and cannot switch
off the gate driver.
FAN6605
Blanking
Circuit
GATE
R
SENSE
C
Under-Voltage Lockout (UVLO)
The turn-on and turn-off thresholds are fixed internally at
16 V and 7.8 V in normal mode. During startup, the
hold-up capacitor must be charged to 16 V through the
startup resistor to enable the IC. The hold-up capacitor
continues to supply VDD before the energy can be
delivered from auxiliary winding of the main transformer.
VDD must not drop below 7.8 V during startup. This
UVLO hysteresis window ensures that the hold-up
capacitor is adequate to supply VDD during startup.
© 2014 Fairchild Semiconductor Corporation
FAN6605 • Rev. 1.0
Figure 21.
Current-Sense R-C Filter
www.fairchildsemi.com
12
Feedback Impedance Switching
Limited Power Control
FAN6605 actively varies FB-pin impedance (ZFB) to
reduce no-load power consumption. This technique
can further reduce operating current of the controller
when FB-pin voltage drops below V FB-ZDC.
The FB voltage is saturated HIGH when the power
supply output voltage drops below its nominal value and
shunt regulator (KA431) does not draw current through
the opto-coupler. This occurs when the output feedback
loop is open or output is short circuited. If the FB voltage
is higher than a built-in threshold for longer than tD-OLP,
PWM output is turned off. As PWM output is turned off,
VDD begins decreasing since no more energy is
delivered from the auxiliary winding.
Brownout Protection
Since the VIN pin is connected through a resistive
divider to the rectified AC input line voltage, it can also
be used for brownout protection. If VIN is less than 0.7 V,
the PWM output is shut off. When VIN reaches over
0.9 V, the PWM output is turned on again. The
hysteresis window for ON/OFF is around 0.2 V. The
brownout voltage setting is determined by the potential
divider formed with RUpper and RLower. Equations to
calculate the resistors are shown below:
VIN 
RLower
 VAC 2 , (unit  V )
RLower  RUpper
As the protection is triggered, VDD enters into UVLO
mode. This protection feature continues as long as the
over loading condition persists. This prevents the power
supply from overheating due to overloading conditions.
Noise Immunity
Noise on the current sense or control signal may cause
significant pulse-width jitter, particularly in continuousconduction mode. Slope compensation helps alleviate
this problem. Good placement and layout practices
should be followed. Avoiding long PCB traces and
component leads, locating compensation and filter
components near the FAN6605, and increasing the gate
resistor from GATE pin to MOSFET improve
performance.
(1)
Thermal Overload Protection
Thermal overload protection limits total power
dissipation. When the junction temperature exceeds TJ=
+140C, the thermal sensor signals the shutdown logic
© 2014 Fairchild Semiconductor Corporation
FAN6605 • Rev. 1.0
FAN6605— mWSaver™ Controller
VDD over-voltage protection prevents damage due to
abnormal conditions. Once the VDD voltage is over the
over-voltage protection voltage (VDD-OVP), and lasts for tDVDDOVP, the PWM pulses are disabled. When the VDD
voltage drops below the UVLO, the internal startup circuit
turns on, and VDD is charged to VDD-ON to restart IC.
and turns off most of the internal circuitry. The thermal
sensor turns internal circuitry on again after the IC’s
junction temperature drops by 25C. Thermal overload
protection is designed to protect the FAN6605 in the
event of a fault condition. For continual operation, the
controller should not exceed the absolute maximum
junction temperature of TJ = +140C.
VDD Over-Voltage Protection
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13
R6
12V 1
1
C7
N1 8
R7
12V
L2
P1
2
12V
C5
1
N1
N1 A
N2
3
C1
L1
M1
4
2
L
1
ZD 1
TX 1
12
11
C2
C11
+
R14
N5 N6 6
1
D3
VIN
2
N3
11
N
N1 7 D1
R4
N2 1
8 R5
N2 0
7
1
3
R2
4
C4
4
R3
AC IN
N4
C3
N2 8
1
1
2
3
2
CN 1
+ C9
3
BD 1
R1
+ C8
2
2
F1
R8
C10
N7
10
9
2
D4
C6
5V 1
1
5V
L3
P2
2
5V
2
R17
3
C15
+ C14
2
+ C13
C12
R13
D5
1
2
R9
N8
Q1
N1 0
R10
D2
1 N9
R11
3
2
N3 0
SG ND
N2 9
R15
R12
1
HV
P3
R16
VIN
U1
4
C16
HV
7
R20
VD D
FB
SEN SE
GN D
VD D
GA TE
5V 1
R19
6
1
3
VIN
N1 2
N1 3
U2
5
R22
GA TE
12V
FAN6605MX
FA
N6755
C17
R28
C18
+
5V
C19
K
3
SEN SE
2
2
4
1
FB
FAN6605 — mWSaver™ Controller
Typical Application Circuit
U3
N1 4
R21
C20
R23
R24
R26
R27
R25
N1 5
R
N1 6
A
R18
Figure 22.
© 2014 Fairchild Semiconductor Corporation
FAN6605 • Rev. 1.0
44 W Flyback 12 V/2 A, 5 V/4 A Application Circuit
www.fairchildsemi.com
14
Designator
Part Type
Designator
Part Type
BD1
BD 4 A/600 V
Q1
MOS 9 A/600 V
C1
YC 2200 pF/Y1
R1
R 1.5 M 1/4 W
C2
YC 2200 pF/Y1
R2
R 1.5 M 1/4 W
C3
XC 0.33 µF/300 V
R3
R 10 M 1/4 W
C4
NC
R4, R5, R6, R7
R 47  1/4 W
C5
YC 2200 pF/Y1
R8, R17, R25, R27
NC
C6
CC 2200 pF/100 V
R9
R 50 K 1/4 W
C7
CC 1000 pF/100 V
R10
R 50 K 1/4 W
C8
EC 1000 µF/25 V
R11
R 0  1/8 W
C9
EC 470 µF/25 V
R12
R 47  1/8 W
C10
CC 100 pF/50 V
R13
R 100 K 1/8 W
C11
EC 100 µF/400 V
R14
R 0  1/4 W
C12
C 1 µF/50 V
R15
R 10 K 1/8 W
C13
EC 1000 µF/10 V
R16
R 1  1/8 W
C14
EC 470 µF/10 V
R18
R 0  1/8 W
C15
CC 100 pF/50 V
R19
R 100  1/8 W
C16
C 1 nF/50 V
R20
R 1 K 1/8 W
C17
C 470 pF/50 V
R21
R 4.7 K 1/8 W
C18
EC 47 µF/50 V
R22
R 7.5 K 1/8 W
C19
C 0.01 µF/50 V
R23
R 120 K 1/8 W
C20
C 0.1 µF/50 V
R24
R 15 K 1/8 W
D1
FYP1010
R26
R 10 K 1/8 W
D2
1N4148
R28
R 0.43  2 W
D3
FR107
TX1
800 µH(ERL-28)
D4
FR103
U1
IC FAN6605
D5
FYP1010
U2
IC PC817
ZD1
P6KE150A
U3
IC TL431
F1
FUSE 4A/250 V
M1
VZ 9G
L1
13 mH
L2
Inductor (2 µH)
L3
Inductor (2 µH)
© 2014 Fairchild Semiconductor Corporation
FAN6605 • Rev. 1.0
FAN6605 — mWSaver™ Controller
Bill of Materials
www.fairchildsemi.com
15
5.00
4.80
7
A
3.81
3.81
6
0.65TYP
5
B
1.75TYP
6.20
5.80
PIN #1
4.00
3.80
1
2 3
4
1.27
(0.33)
3.85 7.35
0.25
C B A
TOP VIEW
1.27
LAND PATTERN RECOMMENDATION
SEE DETAIL A
0.25
0.19
0.25
0.10
OPTION A - BEVEL EDGE
C
1.75 MAX
0.51
0.33
FRONT VIEW
0.10 C
OPTION B - NO BEVEL EDGE
0.50
0.25
R0.23
NOTES:
GAGE PLANE
R0.23
0.36
A) THIS PACKAGE DOES NOT FULLY
CONFORMS TO JEDEC MS-012,
VARIATION AA, ISSUE C.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
0.90
0.406
SEATING PLANE
(1.04)
DETAIL A
SCALE: 2:1
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
D) DRAWING FILENAME : M07Arev4.
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