NSC MM54C193N Synchronous 4-bit up/down decade counter Datasheet

MM54C192/MM74C192
Synchronous 4-Bit Up/Down Decade Counter
MM54C193/MM74C193
Synchronous 4-Bit Up/Down Binary Counter
General Description
Features
These up/down counters are monolithic complementary
MOS (CMOS) integrated circuits. The MM54C192 and
MM74C192 are BCD counters, while the MM54C193 and
MM74C193 are binary counters.
Counting up and counting down is performed by two count
inputs, one being held high while the other is clocked. The
outputs change on the positive-going transition of this clock.
These counters feature preset inputs that are set when load
is a logical ‘‘0’’ and a clear which forces all outputs to ‘‘0’’
when it is at a logical ‘‘1’’. The counters also have carry and
borrow outputs so that they can be cascaded using no external circuitry.
Y
Y
Y
Y
Y
Y
High noise margin
1V guaranteed
Tenth power TTL compatible
Drive 2 LPTTL loads
Wide supply range
3V to 15V
Carry and borrow outputs for N-bit cascading
Asynchronous clear
High noise immunity
0.45 VCC (typ.)
Connection Diagram
Dual-In-Line Package
TL/F/5901 – 1
Top View
Order Number MM54C192, MM74C192,
MM54C193 or MM74C193
C1995 National Semiconductor Corporation
TL/F/5901
RRD-B30M105/Printed in U. S. A.
MM54C192/MM74C192 Synchronous 4-Bit Up/Down Decade Counter
MM54C193/MM74C193 Synchronous 4-Bit Up/Down Binary Counter
February 1988
Absolute Maximum Ratings (Note 1)
Storage Temperature Range (TS)
Maximum VCC Voltage
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Voltage at Any Pin
b 0.3V to VCC a 0.3V
Operating Temperature Range (TA)
MM54C154
MM74C154
b 55§ C to a 125§ C
b 40§ C to a 85§ C
b 65§ C to a 150§ C
18V
Power Dissipation (PD)
Dual-In-Line
Small Outline
Operating VCC Range
3V to 15V
Lead Temperature (TA)
(Soldering, 10 sec.)
260§ C
700 mW
500 mW
DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CMOS TO CMOS
VIN(1)
Logical ‘‘1’’ Input Voltage
VCC e 5V
VCC e 10V
3.5
8.0
VIN(0)
Logical ‘‘0’’ Input Voltage
VCC e 5V
VCC e 10V
VOUT(1)
Logical ‘‘1’’ Output Voltage
VCC e 5V, IO e b10 mA
VCC e 10V, IO e b10 mA
VOUT(0)
Logical ‘‘0’’ Output Voltage
VCC e 5V, IO e 10 mA
VCC e 10V, IO e 10 mA
IIN(1)
Logical ‘‘1’’ Input Current
VCC e 15V, VIN e 15V
IIN(0)
Logical ‘‘0’’ Input Current
VCC e 15V, VIN e 0V
ICC
Supply Current
VCC e 15V
V
V
1.5
2.0
4.5
9.0
V
V
0.5
1.0
0.005
b 1.0
V
V
1.0
b 0.005
0.05
V
V
mA
mA
300
mA
CMOS TO LPTTL INTERFACE
VIN(1)
Logical ‘‘1’’ Input Voltage
54C VCC e 4.5V
74C VCC e 4.75V
VIN(0)
Logical ‘‘0’’ Input Voltage
54C VCC e 4.5V
74C VCC e 4.75V
VOUT(1)
Logical ‘‘1’’ Output Voltage
54C VCC e 4.5V, IO e b100 mA
74C VCC e 4.75V, IO e b100 mA
VOUT(0)
Logical ‘‘0’’ Output Voltage
54C VCC e 4.5V, IO e 360 mA
74C VCC e 4.75V, IO e 360 mA
VCC b 1.5
VCC b 1.5
V
V
0.8
0.8
2.4
2.4
V
V
V
V
0.4
0.4
V
V
OUTPUT DRIVE (See 54C/74C Family Characteristics Data Sheet) (Short Circuit Current)
ISOURCE
Output Source Current
VCC e 5V, VIN(0) e 0V
TA e 25§ C, VOUT e 0V
b 1.75
mA
ISOURCE
Output Source Current
VCC e 10V, VIN(0) e 0V
TA e 25§ C, VOUT e 0V
b8
mA
ISINK
Output Sink Current
VCC e 5V, VIN(1) e 5V
TA e 25§ C, VOUT e VCC
1.75
mA
ISINK
Output Sink Current
VCC e 10V, VIN(1) e 10V
TA e 25§ C, VOUT e VCC
8
mA
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
2
AC Electrical Characteristics* TA e 25§ C, CL e 50 pF, unless otherwise noted
Typ
Max
Units
tpd
Symbol
Propagation Delay Time to Q
from Count Up or Down
Parameter
VCC e 5V
VCC e 10V
Conditions
Min
250
100
400
160
ns
ns
tpd
Propagation Delay Time to Q
Borrow from Count Down
VCC e 5V
VCC e 10V
120
50
200
80
ns
ns
tpd
Propagation Delay Time to
Carry from Count Up
VCC e 5V
VCC e 10V
120
50
200
80
ns
ns
tS
Time Prior to Load that Data
Must be Present
VCC e 5V
VCC e 10V
100
30
160
50
ns
ns
tW
Minimum Clear Pulse Width
VCC e 5V
VCC e 10V
300
120
480
190
ns
ns
tW
Minimum Load Pulse Width
VCC e 5V
VCC e 10V
100
40
160
65
ns
ns
tpd0, tpd1
Propagation Delay Time to Q
from Load
VCC e 5V
VCC e 10V
300
120
480
190
ns
ns
tW
Minimum Count Pulse Width
VCC e 5V
VCC e 10V
120
35
200
80
ns
ns
fMAX
Maximum Count Frequency
VCC e 5V
VCC e 10V
tr, tf
Count Rise and Fall Time
VCC e 5V
VCC e 10V
CIN
Input Capacitance
(Note 2)
5
pF
CPD
Power Dissipation Capacitance
(Note 3)
100
pF
2.5
6
4
10
MHz
MHz
15
5
ms
ms
*AC Parameters are guaranteed by DC correlated testing.
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
Note 2: Capacitance is guaranteed by periodic testing.
Note 3: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see 54C/74C Family Characteristics, Application Note
AN-90.
Cascading Packages
Guaranteed Noise Margin
as a Function of VCC
TL/F/5901 – 3
TL/F/5901 – 2
3
Timing Diagrams
MM54C192/MM74C192
TL/F/5901 – 4
Note 1: Clear ouptuts to zero.
Note 2: Load (preset) to binary thirteen.
Note 3: Count up to fourteen, fifteen, carry, zero, one and two.
Note 4: Count down to one, zero, borrow, fifteen, fourteen, and thirteen.
MM54C193/MM74C193
TL/F/5901 – 5
Note 1: Clear ouptuts to zero.
Note 2: Load (preset) to BCD seven.
Note 3: Count up to eight, nine, carry, zero, one, and two.
Note 4: Count down to one, zero, borrow, nine, eight, and seven.
Note A: Clear overrides load, data, and count inputs.
Note B: When counting up, count down input must be high; when counting down, count-up input must be high.
4
Schematic Diagrams
MM54C192 Synchronous 4-Bit Up/Down Decade Counter
TL/F/5901 – 6
MM54C193 Synchronous 4-Bit Up/Down Binary Counter
TL/F/5901 – 7
5
MM54C192/MM74C192 Synchronous 4-Bit Up/Down Decade Counter
MM54C193/MM74C193 Synchronous 4-Bit Up/Down Binary Counter
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number MM54C192J, MM74C192J, MM54C193J or MM74C193J
NS Package Number J16A
Molded Dual-In-Line Package (N)
Order Number MM54C192N, MM74C192N, MM54C193N or MM74C193N
NS Package Number N16E
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