Product Specification
100m Multi-rate 100GE CFP2 Optical Transceiver Module
FTLC8221SCNM
PRODUCT FEATURES
Hot-pluggable CFP2 form factor
Supports 103.1Gb/s and 112Gb/s
aggregate bit rates
Power dissipation < 4W
RoHS-6 compliant (lead-free)
Commercial case temperature range
of 0°C to 70°C
Single 3.3V power supply
Maximum link length of 100m on
OM3 Multimode Fiber (MMF) and
150m on OM4 MMF
Uncooled 10x10Gb/s 850nm
transmitter
CPPI electrical interface
Single MPO24 receptacle
MDIO management interface
Tx/Rx optical power monitoring
functionality
APPLICATIONS
100GBASE-SR10 Ethernet
10x11.2Gb/s Multimode OTN
2x 40GBASE-SR4 Ethernet
10x 10GE-SRLite Ethernet
Finisar’s FTLC8221SCNM 100GE CFP2 transceiver modules are designed for use in 100
Gigabit Ethernet links and 10x11.2G OTN client interfaces over multimode fiber. They
are compliant with the CFP2 MSA1 and with IEEE 802.3ba 100GBASE-SR102. Digital
diagnostics functions are available via the MDIO interface as specified by Finisar
Application Note AN-21xx5. The transceiver is RoHS-6 compliant and lead-free per
Directive 2011/65/EU3, and Finisar Application Note AN-20384.
PRODUCT SELECTION
FTLC8221SCNM
S:
C:
N:
M:
Finisar Corporation – 21-March-2016
OTU4 maximum bit rate (112 Gb/s)
10x10G parallel optics
Flat top module (no heat sink)
MPO receptacle
Rev. B3
Page 1
FTLC8221SCNM Product Specification – March 2016
I.
Pin Descriptions
CFP2 ALT1 configuration, per CFP MSA1.
104
103
Top Row
GND
TX7n
1
2
Bottom Row
GND
TX9n
78
77
Top Row
{REFCLKp}
GND
27
28
Bottom Row
MOD_ABS
MOD_RSTn
102
TX7p
3
TX9p
76
RX7n
29
GLB_ALRMn
101
GND
4
GND
75
RX7p
30
GND
100
TX6n
5
TX8n
74
GND
31
MDC
99
TX6p
6
TX8p
73
RX6n
32
MDIO
98
GND
7
3.3V_GND
72
RX6p
33
PRTADR0
97
TX5n
8
3.3V_GND
71
GND
34
PRTADR1
96
TX5p
9
3.3V
70
RX5n
35
PRTADR2
95
GND
10
3.3V
69
RX5p
36
VND_IO_C
94
TX4n
11
3.3V
68
GND
37
VND_IO_D
93
TX4p
12
3.3V
67
RX4n
38
VND_IO_E
92
GND
13
3.3V_GND
66
RX4p
39
3.3V_GND
91
TX3n
14
3.3V_GND
65
GND
40
3.3V_GND
90
TX3p
15
VND_IO_A
64
RX3n
41
3.3V
89
GND
16
VND_IO_B
63
RX3p
42
3.3V
88
TX2n
17
PRG_CNTL1
62
GND
43
3.3V
87
TX2p
18
PRG_CNTL2
61
RX2n
44
3.3V
86
GND
19
PRG_CNTL3
60
RX2p
45
3.3V_GND
85
TX1n
20
PRG_ALRM1
59
GND
46
GND
84
TX1p
21
PRG_ALRM2
58
RX1n
47
RX9n
83
GND
22
PRG_ALRM3
57
RX1p
48
RX9p
82
TX0n
23
GND
56
GND
49
GND
81
TX0p
24
TX_DIS
55
RX0n
50
RX8n
80
GND
25
RX_LOS
54
RX0p
51
RX8p
79
{REFCLKn}
53
GND
52
GND
26 MOD_LOPWR
Finisar Corporation – 21-March-2016
Rev. B3
Page 2
FTLC8221SCNM Product Specification – March 2016
Bottom Row Pin Descriptions
PIN
Name
#
GND
1
2
TX9n
3
TX9p
GND
4
5
TX8n
6
TX8p
GND
7
3.3V_GND
8
3.3V
9
3.3V
10
3.3V
11
3.3V
12
3.3V_GND
13
3.3V_GND
14
VND_IO_A
15
VND_IO_B
16
PRG_CNTL1
17
PRG_CNTL2
18
PRG_CNTL3
19
20 PRG_ALRM1
21 PRG_ALRM2
22 PRG_ALRM3
GND
23
24
TX_DIS
25
RX_LOS
26 MOD_LOPWR
27
MOD_ABS
28
MOD_RSTn
29
GLB_ALRMn
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
GND
MDC
MDIO
PRTADR0
PRTADR1
PRTADR2
VND_IO_C
VND_IO_D
VND_IO_E
3.3V_GND
3.3V_GND
3.3V
3.3V
3.3V
3.3V
3.3V_GND
GND
RX9n
RX9p
GND
RX8n
RX8p
GND
I/O
Logic
Description
I
I
Lane #9 Transmitter pin (+)
Lane #9 Transmitter pin (-)
I
I
Lane #8 Transmitter pin (+)
Lane #8 Transmitter pin (-)
I/O
I/O
I
I
I
O
O
O
3.3V Module Supply Voltage Return Ground, internally connected to Signal Ground
3.3V Module Supply Voltage
3.3V Module Supply Voltage
3.3V Module Supply Voltage
3.3V Module Supply Voltage
3.3V Module Supply Voltage Return Ground, internally connected to Signal Ground
3.3V Module Supply Voltage Return Ground, internally connected to Signal Ground
Module Vendor I/O A. Do Not Connect!
Module Vendor I/O B. Do Not Connect!
LVCMOS w/ PUR Programmable Control 1 set over MDIO
LVCMOS w/ PUR Programmable Control 2 set over MDIO
LVCMOS w/ PUR Programmable Control 3 set over MDIO
LVCMOS
Programmable Alarm 1 set over MDIO
LVCMOS
Programmable Alarm 2 set over MDIO
LVCMOS
Programmable Alarm 3 set over MDIO
I
O
I
O
I
LVCMOS w/ PUR
LVCMOS
LVCMOS w/ PUR
GND
LVCMOS w/ PDR
O
LVCMOS
I/O
I
I
I
I
I/O
I/O
I/O
1.2V CMOS
1.2V CMOS
1.2V CMOS
1.2V CMOS
1.2V CMOS
Transmitter Disable for all lanes, "1" or NC = transmitter disabled, "0" = transmitter enabled
Receiver Loss of Optical Signal, "1": low optical signal, "0": normal condition
Module Low Power Mode. "1" or NC: module in low power (safe) mode, "0": power-on enabled
Module Absent. "1" or NC: module absent, "0": module present, Pull Up Resistor on Host
Module Reset. "0" resets the module, "1" or NC = module enabled, Pull Down Resistor in Module
Global Alarm. “0": alarm condition in any MDIO Alarm register, "1": no alarm condition, Open Drain,
Pull Up Resistor on Host
Management Data I/O bi-directional data (electrical specs as per 802.3ae and ba)
Management Data Clock (electrical specs as per 802.3ae and ba)
MDIO Physical Port address bit 0
MDIO Physical Port address bit 1
MDIO Physical Port address bit 2
Module Vendor I/O C. Do Not Connect!
Module Vendor I/O D. Do Not Connect!
Module Vendor I/O E. Do Not Connect!
3.3V Module Supply Voltage Return Ground, internally connected to Signal Ground
3.3V Module Supply Voltage Return Ground, internally connected to Signal Ground
3.3V Module Supply Voltage
3.3V Module Supply Voltage
3.3V Module Supply Voltage
3.3V Module Supply Voltage
3.3V Module Supply Voltage Return Ground, internally connected to Signal Ground
O
O
Lane #9 Receiver pin (+)
Lane #9 Receiver pin (-)
O
O
Lane #8 Receiver pin (+)
Lane #8 Receiver pin (-)
Notes:
1. REFCLK is not required.
2. Tx_MCLK and Rx_MCLK functionality is not available in a CFP2 module with 10x10G electrical
I/O.
Finisar Corporation – 21-March-2016
Rev. B3
Page 3
FTLC8221SCNM Product Specification – March 2016
II.
Absolute Maximum Ratings
Module performance is not guaranteed beyond the operating range (see Section VI).
Exceeding the limits below may damage the transceiver module permanently.
Parameter
Maximum Supply Voltage
Storage Temperature
Case Operating Temperature
Relative Humidity
Receiver Damage Threshold, per Lane
Symbol
Vcc
TS
TOP
RH
PRdmg
Min
-0.5
-40
0
15
5.5
Typ
Max
4.0
85
70
85
Unit
V
C
C
%
dBm
Ref.
1
Notes:
1.
Non-condensing.
III.
Electrical Characteristics (EOL, TOP = 0 to 70 C, VCC = 3.13 to 3.47 Volts)
Parameter
Supply Voltage
Supply Current
Module Total Power
Transmitter (per Lane)
Signaling rate per lane
Single ended input voltage tolerance
Differential data input swing
Differential input threshold
AC common mode input voltage tolerance
(RMS)
Differential input return loss
Symbol
Vcc
Icc
P
J2 Jitter Tolerance
J9 Jitter Tolerance
Data Dependent Pulse Width Shrinkage
Eye mask coordinates {X1, X2
Y1, Y2}
Receiver (per Lane)
Signaling rate per lane
Single-ended output voltage
Differential data output swing
AC common mode output voltage (RMS)
Termination mismatch at 1 MHx
Differential output return loss
Jt2
Jt9
DDPWS
VinT
Vin,pp
Min
3.13
10.3125
-0.3
120
Finisar Corporation – 21-March-2016
Max
3.47
1.15
4.0
11.1810
4.0
1200
50
15
Vout,pp
10.3125
-0.3
300
11.1810
4.0
800
7.5
5
Per IEEE 802.3ba,
Section 86A.4.2.1
Per IEEE 802.3ba,
Section 86A.4.2.2
28
Jo2
Jo9
PSR
Rev. B3
Unit
V
mA
W
Gb/s
V
mVpp
mV
Ref.
1
2
3
mV
Per IEEE 802.3ba,
Section 86A.4.1.1
0.17
0.29
0.07
0.11, 0.31
95, 350
Common mode output return loss
Output transition time, 20% to 80%
J2 Jitter output
J9 Jitter output
Eye mask coordinates {X1, X2
Y1, Y2}
Power Supply Ripple Tolerance
Typ
0.42
0.65
0.29, 0.5
150, 425
Per CFP MSA1
dB
UI
UI
UI
UI
mV
Gb/s
V
mVpp
mV
%
4
5
2
6
dB
4
dB
4
ps
UI
UI
UI
mV
mVpp
Page 4
5
FTLC8221SCNM Product Specification – March 2016
Notes:
1.
2.
3.
4.
5.
6.
Maximum total power value is specified across the full temperature and voltage range.
+/- 100ppm at 10.3125 Gb/s and +/-20ppm at 11.1810 Gb/s.
After internal AC coupling. Self-biasing 100 differential input.
10 MHz to 11.1 GHz range
Hit ratio = 5 x 10E-5
AC coupled with 100 differential output impedance. Limiting output.
FTLC8221SCNM Clocking Signals
Clock
Name
Status
I/O
Value
REFCLK
Not Required
I
Not required; terminated internally.
Finisar Corporation – 21-March-2016
Rev. B3
Page 5
FTLC8221SCNM Product Specification – March 2016
IV.
Optical Characteristics (EOL, TOP = 0 to 70C, VCC = 3.13 to 3.47 Volts)
Parameter
Transmitter (per Lane)
Signaling Speed per Lane
Center wavelength
RMS Spectral Width
Average Launch Power per Lane
Transmit OMA per Lane
Difference in Power between any two
lanes [OMA]
Peak Power per Lane
Launch Power [OMA] minus TDP per
Lane
TDP per Lane
Optical Extinction Ratio
Optical Return Loss Tolerance
Encircled Flux
Symbol
Min
Typ
10.3125
840
SW
TXPx
TxOMA
DPx
PPx
P-TDP
TDP
ER
ORL
FLX
-7.6
-5.6
Max
11.1810
860
0.65
2.4
3.0
4.0
4.0
dBm
dBm
3.5
dBm
dB
dB
dBm
-6.5
3.0
12
> 86% at 19 um
< 30% at 4.5 um
Unit
GBd
nm
nm
dBm
dBm
dB
Average launch power of OFF
-30
dBm
transmitter, per lane
Relative Intensity Noise
RIN
-128
dB/Hz
Transmitter eye mask definition {X1,
0.23, 0.34, 0.43, 0.27, 0.35, 0.4
X2, X3, Y1, Y2, Y3}
Receiver (per Lane)
Signaling Speed per Lane
10.3125
11.1810
GBd
Center wavelength
840
860
nm
Average Receive Power per Lane
RXPx
-9.5
2.4
dBm
Receive Power (OMA) per Lane
RxOMA
3
dBm
Stressed Receiver Sensitivity (OMA)
SRS
-5.4
dBm
per Lane
Back to Back Receiver Sensitivity
RxSens
-8.7
dBm
(OMA) per Lane
Peak Power, per lane
PPx
4
dBm
Receiver Reflectance
Rfl
-12
dB
Vertical eye closure penalty, per lane
1.9
dB
Stressed eye J2 jitter, per Lane
0.3
UI
Stressed eye J9 jitter, per Lane
0.47
UI
OMA of each aggressor lane
-0.4
dBm
Receiver jitter tolerance [OMA], per
-5.4
dBm
Lane
Rx jitter tolerance: Jitter frequency
(75, 5)
kHz, UI
and p-p amplitude
(375, 1)
kHz, UI
LOS De-Assert
LOSD
-11
dBm
LOS Assert
LOSA
-30
-14
dBm
LOS Hysteresis
0.5
dB
Notes:
1. Transmitter consists of 10 lasers operating at a maximum rate of 11.1810 Gb/s each.
2. Even if TDP is <0.9dB, the OMA min must exceed this value.
3. RIN is scaled by 10*log (10/4) to maintain SNR outside of transmitter.
4. Receiver consists of 10 photodetectors operating at a maximum rate of 11.1810 Gb/s each.
5. Measured using DUT Tx and DUT Rx; no golden transmitters shall be used.
Finisar Corporation – 21-March-2016
Rev. B3
Ref.
1
2
3
4
5
Page 6
FTLC8221SCNM Product Specification – March 2016
V.
General Specifications
Parameter
Symbol
Min
Typ
Max
Bit Rate (all lanes combined)
BR
103.1
112.0
Bit Error Ratio
BER
10-12
Maximum Supported Distances
Fiber Type
OM3 MMF
Lmax1
100
OM4 MMF
Lmax2
150
Notes:
1. Supports 100GBASE-SR10 per IEEE 802.3ba and 10x11.2 multimode OTN.
2. Tested with a 231 – 1 PRBS
VI.
Units
Gb/s
Ref.
1
2
m
m
Environmental Specifications
Finisar FTLC8221 CFP2 transceivers have an operating case temperature range of 0°C to
+70°C.
Parameter
Case Operating Temperature
Storage Temperature
VII.
Symbol
Top
Tsto
Min
0
-40
Typ
Max
70
85
Units
°C
°C
Ref.
Regulatory Compliance
Finisar FTLC8221 CFP2 transceivers are Class 1 laser eye safety compliant per IEC
60825-1. They are certified per the following standards:
Feature
Agency
Standard
Laser Eye
Safety
Laser Eye
Safety
FDA/CDRH
CDRH 21 CFR 1040 and Laser Notice 50
TÜV
R 72130387
Electrical
Safety
Electrical
Safety
TÜV
EN 60950-1: 2006+A11
EN 60825-1: 2007
EN 60825-2: 2004+A1+A2
EN 60950
CLASS 3862.13
CLASS 3862.93
1909932375840
UL/CSA
Certificate
Number
9210176
R 72130387
Copies of the referenced certificates are available at Finisar Corporation upon request.
Finisar Corporation – 21-March-2016
Rev. B3
Page 7
FTLC8221SCNM Product Specification – March 2016
VIII. Digital Diagnostics Functions
FTLC1121 CFP2 transceivers support the MDIO-based diagnostics interface specified in
the CFP MSA Management Interface Specification, Rev 2.21. See also Finisar
Application Note AN-20xx (TBD). Note that Tx/Rx optical power monitoring
functionality is supported by this product.
IX.
Memory Contents
Per the CFP MSA1. See Finisar Application Note AN-20xx (TBD).
X.
Host PCB Layout and Bezel Recommendations
Per CFP2 Hardware Specification1.
Finisar Corporation – 21-March-2016
Rev. B3
Page 8
FTLC8221SCNM Product Specification – March 2016
XI.
Mechanical Specifications
Finisar FTLC8221 CFP2 transceivers are compatible with the CFP2 Hardware
Specification for pluggable form factor modules.
Figure 1. FTLC8221SCNM Mechanical Dimensions.
Finisar Corporation – 21-March-2016
Rev. B3
Page 9
FTLC8221SCNM Product Specification – March 2016
Figure 2. Standard Product Label
.
Figure 3. Optical Lane Assignment
(View from the front, looking into the MPO receptacle)
Finisar Corporation – 21-March-2016
Rev. B3
Page 10
FTLC8221SCNM Product Specification – March 2016
XII.
References
1. CFP2 Hardware Specification and CFP MSA Management Interface Specifications
(MIS), Rev 2.2; CFP MSA, www.cfp-msa.org
2. IEEE 802.3ba, PMD Type 100GBASE-SR10.
3. Directive 2011/65/EU of the European Council Parliament and of the Council, “on
the restriction of the use of certain hazardous substances in electrical and electronic
equipment,” June 8, 2011.
4. “Application Note AN-2038: Finisar Implementation Of RoHS Compliant
Transceivers”, Finisar Corporation, January 21, 2005.
5. “Application Note AN-2xxx: NVR1 and NVR2, 100GBASE-SR10 CFP2
Transceiver Module (FTLC8221xxxx)”, Finisar Corporation.
For More Information:
Finisar Corporation
1389 Moffett Park Drive
Sunnyvale, CA 94089-1133
Tel. 1-408-548-1000
Fax 1-408-541-6138
[email protected]
www.finisar.com
Finisar Corporation – 21-March-2016
Rev. B3
Page 11