Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A Product information presented is for internal use within AAT Inc. only. Details are subject to change without notice. FIVE-CHANNEL DC-DC CONVERTER WITH A 2.5V LDO FEATURES GENERAL DESCRIPTION Complete PWM Power Control Circuitry Input Voltage Range: 1.5 to 5.5V Low Start-Up Voltage: 1.2V Independent On / Off Control for All Channels Internal Soft-Start for All Channels Power-OK Outputs & Overload Protection Adjustable Operation Frequency with External The AAT1415/AAT1415A provides an integrated 5-channel pulse-width-modulation (PWM) solution and a low noise LDO for the power supply of DC-DC converter. This device improves performance and size compared to conventional controllers in battery design. The AAT1415/AAT1415A has three current mode PWM converters (CH1, CH2, and CH3) and two voltage mode PWM converters (CH4 and CH5). Each current-mode channel has on-chip synchronous power FETs. The five channels include: Components Ranging from 100kHz to 1MHz VQFN-40 5*5 Package Available APPLICATIONS Digital Still Cameras Digital Videos PDAs Portable Devices CH1: Boost /buck selectable DC-DC converter, which activates PWM function at 1.2V when it is configured as a boost converter. CH2: Boost / buck selectable DC-DC converter. CH3: Buck DC-DC converter. CH4: Boost DC-DC controller for the CCD positive bias. CH5: Inverting DC-DC controller for the CCD negative bias. PIN CONFIGURATION – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 1 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A ORDERING INFORMATION DEVICE TYPE PART NUMBER PACKAGE PACKING AAT1415 AAT1415 -Q8-T Q8: VQFN 40-5*5 T: Tape and Reel AAT1415A AAT1415A -Q8-T Q8: VQFN 40-5*5 T: Tape and Reel TEMP. RANGE −40 C to +85 C AAT1415 XXXXX XXXX MARKING DESCRIPTION 1. Part Name 2. Lot No. (6~9 Digits) 3. Date Code (4 Digits) −40 C to +85 C AAT1415A XXXXX XXXX 1. Part Name 2. Lot No. (6~9 Digits) 3. Date Code (4 Digits) MARKING NOTE: All AAT products are lead free and halogen free. ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL VALUE UNIT VMDD –0.3 to + 6.0 V Pin Voltage 1 (OUT1, OUT2, VDDC, C3RDY, C4RDY, VDD5, SEL1, SEL2, TR1) VI1 –0.3 to + 6.0 V Pin Voltage 2 (OUT3, VREF, OSC, EO_, EN_, IN_) VI2 –0.3 to (VDD + 0.3) V Pin Voltage 3 (OUT5) VI3 –0.3 to (VDD5 + 0.3) V Pin Voltage 4 (OUT4) VI4 –0.3 to (VDD + 0.3) V Pin Voltage 5 (V2P5) VI5 –0.3 to (VDDC + 0.3) V Pin Voltage 6 (GND_) VI6 Input Voltage 7 (SW1) VI7 –0.3 to (OUT1 + 0.3V) V Input Voltage 8 (SW2) VI8 –0.3 to (OUT2 + 0.3V) V Input Voltage 9 (SW3) VI9 –0.3 to (OUT3 + 0.3V) V SW1 Current ISW1 3.6 A SW2 Current ISW 2 3.6 A SW3 Current ISW3 3.6 A Open Drain NMOS Current (C3RDY, C4RDY) IOD 10 mA Operating Temperature Range TC –40 ° C to + 85 ° C °C TSTORAGE –65 ° C to + 150 ° C °C Supply Voltage (VDD) Storage Temperature Range – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 2 of 32 0.3 to + 0.3 V Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL MIN MAX UNIT TC –40 +85 °C Operating Free-Air Temperature ELECTRICAL CHARACTERISTICS ( TC = 25 ° C , VDD = OUT1 = OUT2 = OUT3 = 3.6V, unless otherwise specified.) General Item PARAMETER SYMBOL TEST CONDITION MIN TYP MAX UNIT 5.5 V 2.45 V Input Voltage Range VVDD 2.6 VDD Under-Voltage Lockout VUVLO 2.35 VDD Under-Voltage Lockout Hysteresis VUHYS 80 CH1 Minimum Startup Voltage VSTART 1.2 1.5 V ISHDN 0.10 10.0 µA Shutdown Supply Current Into VDD Supply Current Into VDD with CH1 Enable Supply Current Into VDD with CH2 Enable Supply Current Into VDD with CH3 Enable Supply Current Into VDD with CH1 And CH4 Enable Supply Current Into VDD with CH1 And CH5 Enable Supply Current Into VDD with CH1 And LDO Enable 2.40 mV ICH1 EN1 = 3.6V, IN1 = 1.5V 450 700 µA ICH2 EN2 = 3.6V, IN2 = 1.5V 400 650 µA ICH3 EN3 = 3.6V, IN3 = 1.5V 400 650 µA ICH4 550 800 µA ICH5 EN1 = EN4 = 3.6V, IN1 = IN4 = 1.5V EN1 = EN5 = 3.6V, IN1 = 1.5V, IN5 = –0.5V 550 800 µA ICHC EN1 = 3.6V, IN1 = 1.5V 100 300 µA MIN TYP MAX UNIT 1.23 1.25 1.27 V Reference Voltage PARAMETER Reference Output Voltage SYMBOL VREF TEST CONDITION IREF = 20 µ A Reference Load Regulation 10 µ A < IREF <200 µ A 4.50 10.0 %/mV Reference Line Regulation 2.7V< VDD <5.5V 1.3 5.0 %/mA – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 3 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A ELECTRICAL CHARACTERISTICS ( TC = 25 ° C , VDD = OUT1 = OUT2 = OUT3 = 3.6V, unless otherwise specified.) Oscillator PARAMETER SYMBOL TEST CONDITION OSC Discharge Trip Level VODT Rising Edge OSC Discharge Resistance RODR OSC = 1.5V, IOSC = 30mA OSC Discharge Pulse Width t OFF OSC Frequency fOSC MIN TYP MAX UNIT 1.225 1.250 1.275 V 52 80 Ω ROSC = 47kΩ, COSC = 100pF 150 ns 500 kHz Power Fail Latch and Thermal Protection PARAMETER SYMBOL CH4, CH5 Overload Condition TEST CONDITION MIN Duty Cycle CH1, CH2 Overload Threshold VF12 CH3 Overload Threshold VF13 IN1, IN2, Fail Detection Voltage IN3 Fail Detection Voltage (AAT1415) IN3 Fail Detection Voltage (AAT1415A) TYP MAX 100 UNIT % 1.07 1.10 1.13 V 1.07 1.10 1.13 V 0.600 0.625 0.650 V Overload Protection Fault Delay 100,000 Cycles Thermal Shutdown TSHDN 160 °C Thermal Hysteresis THYS 20 °C Logic Inputs PARAMETER SYMBOL EN_, SEL_ Input Low Level VIL EN_, SEL_ Input High Level VIH SEL_ Input Leakage IL9 EN_ Impedance to GND REN TR1 Output Low Voltage VTRL – – TEST CONDITION MIN TYP MAX UNIT 0.4 V 1.4 200 1.2mA Into TR1 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 4 of 32 V 0.1 1.0 µA 300 400 kΩ 0.1 0.2 V Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A ELECTRICAL CHARACTERISTICS ( TC = 25 ° C , VDD = OUT1 = OUT2 = OUT3 = 3.6V, unless otherwise specified.) CH1 (Boost / Buck) PARAMETER IN1 Regulation Voltage SYMBOL VIN1 TEST CONDITION IN1 = EO1 IN1 to EO1 Transconductance MIN TYP MAX UNIT 1.231 1.250 1.269 V IN1 = EO1 Boost Mode (SEL1 = VDD ) CH1 Maximum Duty Cycle 85 IL1 IN1 = 0V to 1.5V Current-Sense Amplifier Transresistance OUT1 Leakage Current ILO1 SW1 Leakage Current ILSW1 Switch On-Resistance SW1 Peak Current Limit –100 95 0.01 % % +100 nA Boost Mode (SEL1 = VDD ) 0.25 V/A Buck Mode (SEL1 = GND) 0.5 V/A SEL1 = GND VSW1 = 0V, OUT1 = 3.6V SEL1 = GND VSW1 = OUT1 = 3.6V 0.1 5.0 µA 0.1 5.0 µA RON1(N) N Channel 95 RON1(P) P Channel 200 ILIMIT1(N) Boost Mode (SEL1 = VDD ) 3 A ILIMIT1(P) Buck Mode (SEL1 = GND) 0.8 A 4,096 OSC Cycles mΩ Soft-Start Interval OUT1 Startup-to-Normal Operating Threshold VUVLO1 OUT1 Startup-to-Normal Operating Hysteresis VUHYS1 Startup t OFF Startup Frequency 90 100 Buck Mode (SEL1 = GND) IN1 Input Leakage Current µS 70 Rising Edge 2.30 2.50 2.65 V 80 mV tOS VDD = 1.8V 700 ns fSTART VDD = 1.8V 200 kHz – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 5 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A ELECTRICAL CHARACTERISTICS ( TC = 25 ° C , VDD = OUT2 = 3.6V, unless otherwise specified.) CH2 (Boost / Buck) PARAMETER IN2 Regulation Voltage SYMBOL VIN2 TEST CONDITION IN2 = EO2 IN2 to EO2 Transconductance MIN TYP MAX UNIT 1.231 1.250 1.269 V IN2 = EO2 Boost Mode (SEL2 = VDD ) CH2 Maximum Duty Cycle 85 IL2 IN2 = 0V to 1.5V –100 % +100 nA V/A Buck Mode (SEL2 = GND) 0.5 V/A VSW 2 = 0V, OUT2 = 3.6V 0.1 5.0 µA VSW 2 = OUT2 = 3.6V 0.1 5.0 µA RON2(N) N Channel 95 RON2(P) P Channel 150 ILIMIT2(N) Boost Mode (SEL2 = VDD ) 3 A ILIMIT2(P) Buck Mode (SEL2 = GND) 0.8 A 4,096 OSC Cycles ILO2 SW2 Leakage Current ILSW 2 mΩ Soft-Start Interval OUT2 Under-Voltage Lockout in Buck Mode OUT2 Under-Voltage Lockout in Hysteresis 0.01 % 0.25 OUT2 Leakage Current SW2 Peak Current Limit 95 Boost Mode (SEL2 = VDD ) Current-Sense Amplifier Transresistance Switch On-Resistance 90 100 Buck Mode (SEL2 = GND) IN2 Input Leakage Current µS 70 VUVLO2 SEL2 = GND VUHYS2 – – 2.45 2.50 80 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 6 of 32 2.55 V mV Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A ELECTRICAL CHARACTERISTICS ( TC = 25 ° C , VDD = OUT3 = 3.6V, unless otherwise specified.) CH3 (Buck) PARAMETER IN3 Regulation Voltage SYMBOL VIN3 TEST CONDITION MIN TYP MAX IN3 = EO3 (AAT1415) 1.231 1.250 1.269 IN3 = EO3 (AAT1415A) 0.784 0.800 0.816 V IN3 to EO3 Transconductance IN3 = EO3 CH3 Maximum Duty Cycle IL3 IN3 Input Leakage Current IN3 = 0V to 1.5V Current-Sense Amplifier Transresistance SW3 Leakage Current Switch On-Resistance SW3 Current Limit −100 70 µS 100 % 0.01 +100 0.5 ILSW3 VSW3 = 0V to 3.6V 0.1 RON3(N) N Channel 95 RON3(P) P Channel 150 nA V/A 5.0 µA mΩ ILIMIT3 Soft-Start Interval SW3 Peak Current Limit UNIT ILIMIT3(N) Soft-Start Interval 0.8 A 4,096 OSC Cycles 0.8 A 2,048 OSC Cycles C3RDY Output Low Voltage VC3RDY 0.1mA Into C3RDY 0.01 0.10 V C3RDY Leakage Current IC3RDY EN3 = GND 0.01 1.00 µA – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 7 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A ELECTRICAL CHARACTERISTICS ( TC = 25 ° C , VDD = OUT3 = 3.6V, unless otherwise specified.) CH4 (Buck) PARAMETER IN4 Regulation Voltage SYMBOL VIN4 TEST CONDITION IN4 = EO4 IN4 to EO4 Transconductance IN4 = EO4 CH4 Maximum Duty Cycle IN4 = 0V IL4 IN4 Input Leakage Current OUT4 Driver Resistance IN4 = 0V to 1.5V MIN TYP MAX UNIT 1.231 1.250 1.269 V µS 70 85 90 95 % −100 0.01 +100 nA RON4(N) IOUT4 = 10mA 5 Ω RON4(P) IOUT4 = −10mA 5 Ω 4,096 OSC Cycles Soft-Start Interval C4RDY Output Low Voltage VC4RDY 0.1mA Into C4RDY 0.01 0.10 V C4RDY Leakage Current IC4RDY EN4 = GND 0.01 1.00 µA – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 8 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A ELECTRICAL CHARACTERISTICS ( TC = 25 ° C , VDD = OUT1 = 3.6V, unless otherwise specified.) CH5 PARAMETER IN5 Regulation Voltage SYMBOL TEST CONDITION VIN5 MIN TYP MAX UNIT –0.01 0.00 +0.01 V IN5 to EO5 Transconductance Maximum Duty Cycle IN5 = 0V IL5 IN5 Input Leakage Current OUT5 Driver Resistance IN5 = 0V to 0.5V 85 90 95 % –100 0.1 +100 nA RON5(N) IOUT5 = 10mA 5 Ω RON5(P) IOUT5 = –10mA 5 Ω 4,096 OSC Cycles Soft-Start Interval VDD5 Under-Voltage Lockout Threshold VDD5 Under-Voltage Lockout Hysteresis µS 70 VUVLO5 Rising Edge 2.30 VUHYS5 2.50 2.65 80 V mV ELECTRICAL CHARACTERISTICS ( TC = 25 ° C , VDD = VDDC = 3.6V, unless otherwise specified.) 2.5V LDO PARAMETER SYMBOL TEST CONDITION MIN Input Voltage Range VVDDC IV2P5 = 10mA 2.6 V2P5 Regulation Voltage VV2P5 IV2P5 = 10mA 2.45 VDROP25 IV2P5 = 10mA V2P5 Dropout Voltage V2P5 LDO Output Current VV2P5 V2P5 LDO Output Current Limit ILIMC25 Measure VV2P5 VVDDC = 2.6V ~ 5V Measure VV2P5 IV 2P 5 = 5mA ~ 100mA V2P5 Load Regulation – – 2.50 MAX UNIT 5.5 V 2.55 V 50 mV 100 V2P5 VDDC PSRR V2P5 Line Regulation TYP 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 9 of 32 mA 150 mA 60 dB 10 %/mV 5 %/mA Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A TYPICAL OPERATING CHARACTERISTICS VIN =1.8V , VOUT = 4.4V , IOUT = 250mA VIN = 3 V ,VOUT = 4.4V – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 10 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A TYPICAL OPERATING CHARACTERISTICS VIN =4.2V ,VOUT=3.3V , I OUT= 300mA VIN =4V , V OUT=3.3V 0 VIN =1.8V ,VOUT=3.3V , IOUT=300mA – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 11 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A TYPICAL OPERATING CHARACTERISTICS VIN=2.5V,VOUT=3.3V VIN =4V ,VOUT=2.5V , I OUT= 250mA VIN = 3V , VOUT = 2.5V – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 12 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A TYPICAL OPERATING CHARACTERISTICS VIN =3V , VOUT=1.5V , IOUT=250mA VIN =3V , VOUT=1.5V – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 13 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A TYPICAL OPERATING CHARACTERISTICS VIN =3V , VOUT=12V VIN =3V , VOUT=12V , IOUT=30mA – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 14 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A TYPICAL OPERATING CHARACTERISTICS VIN =3V , VOUT=-8V , IOUT=50mA VIN =3V , VOUT=-8V – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 15 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A PIN DESCRIPTION PIN NO NAME I/O FUNCTION 1 EN3 I ON/OFF Control for CH3 2 IN3 I CH3 Feedback Input 3 EO3 I/O 4 OUT3 I 5 SW3 I/O CH3 Switching Node 6 GND3 - CH3 Power Ground 7 GND1 - CH1 Power Ground 8 SW1 I/O CH1 Switching Node 9 OUT1 I/O Switching Power Input (Boost) / Output (Buck) of CH1 10 SEL1 I 11 EO1 I/O 12 IN1 I CH1 Feedback Input 13 EN1 I ON/OFF Control for CH1 14 VREF O Reference Output 15 OSC I/O Oscillator Control 16 C4RDY O Power-Ok Signal for CH4 17 C3RDY O Power-Ok Signal for CH3 18 TR1 I/O CH1 Feedback Resistor Truly Shutdown Input 19 SEL2 I Configures CH2 as a Buck or a Boost Converter 20 EN2 I ON/OFF Control for CH2 21 IN2 I CH2 Feedback Input 22 EO2 I/O 23 OUT2 I 24 SW2 I/O CH2 Switching Node 25 GND2 - CH2 Power Ground 26 V2P5 O 2.5V LDO Output 27 VDDC I LDO Power Input CH3 Compensation Node CH3 Switching Power Input Configures CH1 as a Buck or a Boost Converter CH1 Compensation Node CH2 Compensation Node CH2 Switching Power Input – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 16 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A 28 GNDC - LDO Ground 29 EN5 I ON/OFF Control for CH5 30 IN5 I CH5 Feedback Input 31 EO5 I/O 32 VDD5 I CH5 Power Source 33 OUT5 O CH5 Gate-Drive Output 34 GND - Internal Circuit Ground 35 IN4 I CH4 Feedback Input 36 EO4 I/O CH4 Compensation Node 37 EN4 I ON/OFF Control for CH4 38 OUT4 I/O 39 GND4 - CH4 Power Ground 40 VDD I Internal Circuit Power Source CH5 Compensation Node CH4 Gate-Drive Output – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 17 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A FUNCTION BLOCK DIAGRAM 40 VDD 13 12 11 EN1 EN2 Fault Protection Fault Protection VF13 IN1 Vref VF13 IN2 EO1 EO2 Current Limit Vref Soft-Start Current Sense Sawtooth1 OUT1 9 PreDriver SW1 8 Digital Block 22 Soft-Start OUT2 PreDriver Digital Block 21 Sawtooth1 Current Sense Current Limit Current Limit 20 SW2 23 24 OSC 7 GND1 10 SEL1 18 GND2 Step-up / Step-down TR1 Step-up / Step-down SEL2 25 19 EN3 EN1 1 Fault Protection 37 EN4 35 IN4 36 VF13 2 IN3 3 EO3 Fault Protection Vref Soft-Start EO4 Soft-Start Vref Sawtooth1 Current Sense Current Limit Sawtooth2 OUT4 Digital Block 38 Digital Block OSC OUT3 PreDriver 4 SW3 5 OSC 39 GND4 GND3 6 VDD OUT1 Low Voltage OSCillator EN5 29 UVLO Normal OSCillator 15 IN5 Fault Protection OSC EO5 0V 14 Reference 30 31 Soft-Start Sawtooth2 VREF VDD5 Digital Block 2.5V 28 26 27 32 33 OSC OUT5 2.5V LDO C4RDY GNDC 16 VF13 V2P5 IN4 VF13 VDDC IN3 GND 34 – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 18 of 32 17 C3RDY Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A TYPICAL APPLICATION CIRCUIT Figure 1. Typical 2-Cell AA-Powered System – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 19 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A TYPICAL APPLICATION CIRCUIT Figure 2. Typical 1-Cell Li+ Powered System (For CCD) – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 20 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A TYPICAL APPLICATION CIRCUIT Figure 3. Typical 1-Cell Li+ Powered System (For CMOS) – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 21 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A C3RDY DETAILED DESCRIPTION The AAT1415/AAT1415A is a complete power-conversion IC for digital still cameras. It can accept input from a variety of sources, including single-cell Li+ batteries and 2-cell alkaline or NiMH batteries. The AAT1415/AAT1415A includes five DC-DC converter channels and a 2.5V LDO to generate all required voltages: Synchronous-rectified converter with boost on-chip or buck DC-DC MOSFETs—Typically supplies 4.6V for lens motor or 3.3V for main system power. Synchronous-rectified boost or Buck DC-DC converter with on-chip MOSFETs— Typically supplies 3.3V for main system power or 2.5V for DDR. C3RDY pulls low when IN3 reaches VF13 (1.1V typ). C3RDY goes high impedance in shutdown, overload, and thermal limit when IN3 is under VF13. A typical use for C3RDY is to enable 3.3V power to the CPU I/O after the CPU core is powered up (Figure 1), thus providing safe sequencing in hardware without system intervention. C4RDY C4RDY pulls low when IN4 reaches VF13 (1.1V typ). C4RDY goes high impedance in shutdown, overload, and thermal limit when IN4 is under VF13. A typical use for C4RDY is to drive a PMOS that gates 5V power to the CCD until the VH CCD bias (generated by CH4) is powered up (Figure 4). Synchronous-rectified buck DC-DC converter with on-chip MOSFETs— Typically supplies 1.5V for the DSP core. Boost controller— Typically used for positive voltage to bias one or more of the LCD, CCD, and LED backlights. Inverter controller— Typically supplies negative CCD bias when high current is needed for large Figure 4. C4RDY Application Circuit pixel-count CCDs. 2.5V LDO— Typically supplies 2.5V for analog-to-digital converter’s reference voltage. Soft-Start The AAT1415/AAT1415A includes three versatile The AAT1415/AAT1415A channels feature a soft-start status outputs that can provide information to the function system. All are open-drain outputs and can directly excessive battery loading at startup by ramping the drive MOSFET switches to facilitate sequencing, output voltage of each channel up to the regulation disconnect loads during overloads, or perform voltage. other hardware-based functions. This is accomplished by ramping the internal reference that limits inrush current and prevent inputs to mostly channel error amplifier from 0V to the TR1 1.25V reference voltage (CH5 from 1.25V to 0V) over a TR1 pulls low when EN1 pulls high. A typical use for period of 4,096 oscillator cycles (16ms at 500kHz) TR1 is to reduce CH1 boost feedback network’s when initial power is applied or when a channel is leakage current when CH1 is disabled (Figure 1). enabled. Soft-start of CH1 is different from others in order to avoid limiting startup capability with loading. – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 22 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A See Figure 6. soft-start mechanism. CH3 soft-start Reference ramp takes half the time (2,048 clock cycles) of the Connect a 0.1µF ceramic bypass capacitor from VREF other channel ramps. This allows the CH3 and CH2 to GND. VREF is enabled when EN1, EN2 or EN3 is output (when set to 3.3V) to track each other and rise high. The AAT1415/AAT1415A has internal 1.250V at nearly the same dV/dt rate on power-up. Once the references. step-down output reaches its regulation point (1.5V or 1.8V typ), the CH2 output (3.3V typ) continues to rise at Oscillator the same ramp rate. See Figure 7 timing chart of The AAT1415/AAT1415A operating frequency is set by soft-start. an RC network (ROSC, COSC) at the OSC pin. The range of usable settings is 100kHz to 1MHz. The oscillation 2.5V LDO frequency changes as the forced voltage (VOSC) ramps The 2.5V LDO regulates the VDDC voltages when the upward following startup. The oscillation frequency is reference voltage (VREF) is ready and VDDC voltage is then constant once the main output is in regulation. At greater than 2.5V. the beginning of a cycle, the timing capacitor charge through the resistor until it reaches VREF. The charge Fault Protection time, t1, is as follows: If any DC-DC converter channel remains faulted for 100,000 clock cycles (200ms at 500kHz), then all t 1 ≈ − R OSC × C OSC × ln(1 − 1.25 ) VOSC outputs latch off until the AAT1415/AAT1415A is The capacitor voltage then decays to zero over reinitialized or by cycling the input power. The time t 2 ≈ 150ns . Choose COSC between 47pF and fault-detection circuitry for any channel is disabled 330pF. Determine ROSC and VOSC. The oscillator during its initial turn-on soft-start sequence. An frequency is as follows: exception to the standard fault behavior is that there is fOSC ≈ no 100,000 clock-cycle delay in entering the fault state 1 t1 + t 2 if the OUT1 pin is dragged below its 2.5V UVLO1 threshold or is shorted. The UVLO1 immediately triggers and shuts down all channels. The CH1 then continues to attempt to start. If the CH1 output short remains, these attempts do not succeed since OUT1 remains near ground. If a soft-short or overload remains on OUT1, the startup oscillator switches the internal NMOS, but fault is retriggered if regulation is not achieved by the end of the soft-start interval. If OUT1 is dragged below the input, the overload is supplied by the body diode of the internal synchronous Figure 5. Oscillator Circuit rectifier or by a Schottky diode connected from the battery to OUT1. – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 23 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A Soft-Start of CH1 Soft-Start of CH2 Soft-Start of CH3 Soft-Start of CH4 4,096 cycles 1.25V 64 Steps 0V EA IN4 Soft-Start of CH5 Figure 6. Soft-Start Mechanism – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 24 of 32 EO4 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A Soft Start Waveform Figure 8. Oscillator Frequency Low-Voltage Startup Oscillator The AAT1415/AAT1415A internal control and reference voltage circuitry receives power from VDD and do not function when VDD is less than 2.5V. To ensure low voltage startup, the CH1 employs a low-voltage startup oscillator (about 200kHz) that activates at 1.2V if a Schottky diode is connected from PWR to OUT1. The startup oscillator drives the internal NMOS at SW1 until VDD reaches 2.5V, at which point voltage control is passed to the normal oscillator (current-mode PWM circuitry). At low input voltages, the CH1 can have difficulty starting into heavy loads. Figure 7. Timing Chart of Soft-Start – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 25 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A Inductor Selection DESIGN PROCEDURE The inductor is typically selected to operate with Programming the Output Voltage continuous conduction mode (CCM) for best efficiency The output voltage for each channel is programmed in using a resistor divider from the output connected to conduction mode (DCM) for better response ability in the feedback pins. When setting the output voltage, boost or inverting controller (Table 1 and Table 2). The connect a resistive voltage divider from the channel recommended inductance value range is between boost or buck converter and discontinuous output to the corresponding IN_ input and then to GND. 2.2µH and 4.7µH for boost. The recommended Choose the lower-side (IN_-to-GND) resistor, then inductance value range is between 6.8µH and 22µH for calculate the upper-side (output-to-IN_) resistor as buck. The recommended inductance value range is follows: between 3.3µH and 6.8µH for Inverting. With the VOUT _ RUPPER _ = RLOWER _ − 1 (For Boost / buck), VIN_ chosen inductance value, the peak current for the inductor in steady state operation can be calculated (Table 3). It also needs to be taken into account that load transients and error conditions may cause higher − VOUT _ (For Inverting), RUPPER _ = RLOWER _ V REF inductor currents. This also needs to be taken into account when selecting an appropriate inductor. Where VIN_ is the feedback regulation voltage, 1.250V (AAT1415/AAT1415A, VIN3 = 0.8V ), and typical values for RLOWER _ are in the range of 10 kΩ to 100 kΩ . Table 1. Response Ability for Various Topologies Topology Response Ability VIN Boost or L Inverting VIN − VOUT L VIN : Input Voltage, VOUT : Output Voltage, Buck L : Inductance, Response Ability Unit: mA µs Table 2. DCM/CCM Critical Inductance Values Topology D DCM/CCM Figure 9a. Feedback Network (For Boost/Buck) 1− Boost Buck Inverting VIN VOUT RLOAD ⋅ D ⋅ (1 − D)2 2 ⋅ fSW VOUT VIN (1 − D) ⋅ RLOAD 2 ⋅ fSW VOUT RLOAD ⋅ (1 − D)2 2 ⋅ fSW VOUT + VIN VIN : Input Voltage, VOUT : Output Voltage, Figure 9b. Feedback Network (For Inverting) RLOAD : Loading, fSW : Switch Frequency, Inductance Unit: Henry – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 26 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A Table 4. Diode and MOS Minimum Voltage Rating Topology Minimum Voltage Rating Table 3. Inductor Peak Current Topology Mode Peak Current CCM Boost IO ∆I + L , (1 − D) 2 VOUT ⋅ D ⋅ (1 − D) ∆IL = , fSW ⋅ L D = 1− VIN VOUT Boost VOUT Buck VIN Inverting VIN + VOUT External MOSFET Selection The boost controller and Inverting controller drive DCM 2 ⋅ ( VOUT − VIN ) ⋅ IO L ⋅ f SW external logic-level MOSFETs. MOSFETs’ maximum drain-to-source voltage ( VDS(MAX) ) rating must be greater than the value in Table 4. Their on-resistance ∆IL , 2 V ⋅ (1 − D) , ( ∆IL = OUT fSW ⋅ L IO + CCM ( RDS(ON) ), total gate charge ( QG ) and reverse transfer capacitance ( CRSS ) are the lower the better. Input Capacitor V D= OUT ) VIN Buck The input current to converters are discontinuous, and therefore input capacitors are required to supply the AC current to converters while maintaining the DC input DCM 2 ⋅ (VIN − VOUT ) ⋅ VOUT ⋅ IO L ⋅ fSW ⋅ VIN V ⋅D ∆I IO + L , ( ∆IL = IN 2 fSW ⋅ L CCM D= Inverting DCM voltage. A low ESR capacitor is required to keep the noise at the IC to a minimum. Ceramic capacitors are preferred, but tantalum or low-ESR electrolytic capacitors may also suffice. For insuring stable , operation a bypass ceramic 0.1µF capacitor should be placed as close to the IC VDD pin as possible. VOUT VOUT + VIN ) Output Capacitor The output capacitor is required to maintain the DC 2 ⋅ VOUT ⋅ IO L ⋅ fSW output voltage. Low ESR capacitors are preferred to keep the output voltage ripple low. The characteristics VIN : Input Voltage, VOUT : Output Voltage, IO : Output Current, L: Inductance, fSW : Switch Frequency, Peak Current Unit: Ampere of the output capacitor also affect the stability of the regulation control system. Ceramic, tantalum, or low ESR electrolytic capacitors are recommended. In the case of ceramic capacitors, the impedance at the Schottky Diode Selection switching frequency is dominated by the capacitance, Choose a Schottky diode who’s maximum reverse and so the output voltage ripple is mostly independent voltage rating is greater than the value in Table 4, and of the ESR. The output voltage ripple is estimated to who’s current rating is greater than the peak inductor be: current. VRIPPLE ≈ – – ∆IL 2π × fSW × COUT 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 27 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A Where VRIPPLE is the output ripple voltage, ∆IL is the inductor ripple current, fSW is the switching frequency and COUT is the output capacitance. In the case of tantalum or low- ESR electrolytic capacitors, the ESR following equation: R C = IL(PK ) × R CS TD% × VIN _ × Gm dominates the impedance at the switching frequency, and so the output ripple is calculated as: VRIPPLE ≈ ∆IL × RESR Where IL(PK ) is the inductor peak current. The output filter capacitor (typically ceramic capacitor) Where VRIPPLE is the output voltage ripple, ∆IL is the is then chosen to cancel the RCCC zero: inductor ripple current, and RESR is the equivalent series resistance of the output capacitors. COUT = Boost Converter Compensation The compensation resistor and capacitor (Figure 9a) are chosen to optimize control-loop stability. The boost converter employs current-mode control, thereby simplifying the control-loop compensation. When the ILOAD × RCCC VOUT _ If the output filter capacitor (typically electrolytic capacitor) has significant equivalent series resistance (ESR), a zero occurs at the following: converter operates with continuous conduction mode (typically the case), a right-half-plane zero appears in ZESR = the loop-gain frequency response. To ensure stability, 1 2π × C OUT × RESR the cross over frequency ( fC ) should be much less than that of the right-half-plane zero. If ZESR >> fC , it can be ignored. If ZESR is less than For CCM, the right-half-plane zero frequency ( fRHPZ ) is given by the following: fC , it should be cancelled with a pole set by capacitor fRHPZ = CP connected from EO_ to GND: CP = VOUT _ × (1 − D)2 C OUT × RESR RC 2π × L × ILOAD If the system wants better transient response, it can Typically target cross over frequency ( fC ) is the value parallel a capacitor CU with RUPPER _ from IN_ to for 1/6 of the RHPZ. Choose fC , and then calculate VOUT _ : compensation capacitor ( CC ) as follows: CU = CC = VIN _ R CS × Gm (1 − D) × 2π ⋅ fC ILOAD (typ), R CS is the current-sense amplifier transresistance, (typ), GM is V 2π × RUPPER _ × fC × IN _ V OUT _ If CP or CU is calculated to be less than 10pF, it can Where VIN _ is the feedback regulation voltage, 1.25V 0.25V/A 1 the error amplifier transconductance, 70µS (typ). Select R C based on the allowed transient-droop ( TD% ) requirements by the – – be omitted. Additionally, CP or CU can suppress the inrush current. So, for a 3.3V/250mA output with VI = 2.0V, L = 3.5µH, RUPPER = 164k, fSW = 500kHz and transient-droop 5%: 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 28 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A CC = 1.25V 70µ A / V (1 − 0.39) × × ≈ 3.3nF , 0.25V / A 2π ⋅ 35kHz 250mA equation: R C = IL(PK ) × 0.25V / A RC = 0.64 × ≈ 36kΩ , 0.05 × 1.25 × 70µ A / V R CS TD% × VIN _ × Gm Where IL(PK ) is the inductor peak current. The output filter capacitor (typically ceramic capacitor) 250mA COUT = × 36kΩ × 3.3nF ≈ 10µF 3.3V is then chosen to cancel the RCCC zero: When the COUT value is two to three times greater than what’s calculated above, better output voltage ripple can be achieved. CU = 1 2π × 164kΩ × 35kHz × (1.25V 3.3V ) I COUT = LOAD × RCCC VOUT _ If the output filter capacitor (typically electrolytic ≈ 100pF capacitor) has significant equivalent series resistance (ESR), a zero occurs at the following: Buck Converter Compensation The buck converter employs current-mode control, thereby simplifying the control-loop compensation. ZESR = 1 2π × C OUT × RESR When the buck converter operates with continuous inductor current (typically the case), a RLOAD COUT pole If ZESR >> fC , it can be ignored. If ZESR is less than appears in the loop-gain frequency response. To fC , it should be cancelled with a pole set by capacitor ensure stability, set the compensation RCCC (Figure 9a) to zero to compensate for the RLOAD COUT pole. CP connected from EO_ to GND: Then set the loop crossover frequency below 1/5 of the switching frequency. The compensation resistor and CP = C OUT × RESR RC capacitor are then chosen to optimize control-loop stability. If the system wants better transient response, it can Choose the compensation capacitor CC to set the parallel a capacitor CU with RUPPER _ from IN_ to desired crossover frequency fC . Determine the value by the following equation: VOUT _ : CU = VIN _ Gm CC = × ILOAD × R CS 2π ⋅ fC 1 V 2π × RUPPER _ × fC × IN _ V OUT _ where VIN _ is the feedback regulation voltage, 1.25V (typ), R CS is the current-sense amplifier transresistance, If CP or CU is calculated to be less than 10pF, it can 0.5V/A (typ), Gm is the error amplifier transconductance, 70µS (typ). Select RC based on the allowed So, for a 1.5V/250mA output with VI = 3.0V, L = 10µH, transient-droop ( TD% ) requirements by the following 3%: – – be omitted. RUPPER = 20 kΩ , fSW = 500kHz and transient-droop 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 29 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A CC = 1.25V 70µ A / V × ≈ 2.2nF , 250mA × 0.5V / A 2π ⋅ 70kHz RC = 0.325A × RC = 0.5V / A ≈ 68kΩ , 0.03 × 1.25 × 70µ A / V The typical RC is under 500 kΩ . If the system wants better transient response, it can 250mA COUT = × 68kΩ × 2.2nF ≈ 22µF , 1.5V CU = 1 2π × 20kΩ × 70kHz × (1.25V 1.5V ) VOUT ⋅ RLOAD ⋅ COUT (2 ⋅ VOUT − VI ) ⋅ CC parallel a capacitor CU with RUPPER _ from IN_ to VOUT _ : ≈ 220pF . CU = Boost Controller Compensation 1 V 2π × RUPPER _ × fC × IN _ V OUT _ The boost controller employs voltage-mode control to regulate their output voltage. A benefit of discontinuous If CU is calculated to be less than 10pF, it can be conduction omitted. Additionally, CU can suppress the inrush mode (DCM) is more flexible loop compensation, better response ability and no maximum current duty-cycle restriction on boost ratio. When the boost So, for a 13V/30mA output with VI = 3.0V, L = 3.5 µH , converter operates with discontinuous conduction RUPPER = 100 kΩ , fSW = 500kHz: mode (typically the CCD VH case), the boost controller has a single pole at the following: fP = CC = 2 × VOUT − VI 2π × RLOAD × COUT × VOUT 13V ⋅ 3V 70µ A / V 13V × × (2 ⋅ 13V − 3V) 2π ⋅ 50kHz 8m ⋅ (13V − 2V) ≈ 4.7nF Set the loop cross over frequency ( fC ) below the lower of 1/10 the switching frequency ( fSW ). Choose the compensation capacitor CC to set the desired crossover frequency fC . Determine the value by the RC = CU = 13V ⋅ 433Ω ⋅ 10µF ≈ 500kΩ , (2 ⋅ 13V − 3V) ⋅ 4.7nF 1 ( 2π × 100k × 50kHz × 1.25V 13V ) ≈ 330pF . following equation: Inverting Controller Compensation VOUT ⋅ VI VOUT Gm CC = × × (2 ⋅ VOUT − VI ) 2π ⋅ fC M ⋅ ( VOUT − VI ) The inverting controller also employs voltage-mode control to regulate their output voltage. To operate in discontinuous conduction mode (DCM) is preferred for Where: simple loop compensation and freedom from duty-cycle restrictions on the inverter input-output ratio. When the 2 ⋅ L ⋅ fSW M= RLOAD Inverting The RCCC zero is then used to cancel the fP pole, so: inverting controller has a single pole at the following: 1 fP = π ⋅ RLOAD ⋅ COUT converter operates with discontinuous conduction mode (typically the CCD VL case), the – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 30 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A Set the loop cross over frequency ( fC ) below the lower of 1/10 the switching frequency ( fSW ). Choose the compensation capacitor CC to set the desired CU = crossover frequency fC . Determine the value by the following equation: 1 VIN _ 2π × 56kΩ × 20kHz × VOUT _ + VIN _ ≈ 1nF LAYOUT CONSIDERATIONS VI Gm CC = × 2 π ⋅ fC ( VOUT + VREF ) ⋅ M Conductors carrying discontinuous currents and any high-current path should be made as short and wide as possible. The compensation network should be very Where: close to the EO_ pin and avoid through VIA. The IC must be bypassed with ceramic capacitors placed 2 ⋅ L ⋅ fSW M= RLOAD close to the VDD and VREF. A separate low-noise ground plane containing the reference and signal The RCCC zero is then used to cancel the fP pole, so: RC = grounds should connect to the power-ground plane at only one point to minimize the effects of power-ground currents. Typically, the ground planes are best joined right at the IC. Tie the feedback resistor divider to be RLOAD ⋅ COUT 2 ⋅ CC very close to output capacitor and far away from the inductor or Schottky diode. Keep the feedback network The typical R C is under 500 kΩ . (IN_) close to the IC. Switching nodes (SW_) should be If the system wants better transient response, it can kept as small as possible and should be routed away parallel a capacitor CU with RUPPER _ from IN_ to from high-impedance nodes such as IN. VOUT _ : CU = 1 VIN _ 2π × RUPPER _ × fC × VOUT _ + VIN _ If CU is calculated to be less than 10pF, it can be omitted. Additional CU can suppress the inrush current. So, for a –7V/50mA output with VI = 3.0V, L = 4.7µH, RUPPER = 56 kΩ , fSW = 500kHz: CC = RC = 3V ( −7 + 1.25V) ⋅ 33.6m × 70 µ A / V ≈ 2.2nF 2π ⋅ 20kHz 140Ω ⋅ 10 µF ≈ 300kΩ , 2 ⋅ 2.2nF – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 31 of 32 Advanced Analog Technology, Inc. May 2008 AAT1415/AAT1415A PACKAGE DIMENSION VQFN40 5*5 Symbol A A1 b C D D2 E E2 e L y Dimensions In Millimeters MIN TYP MAX 0.8 0.9 1.0 0.00 0.02 0.05 0.15 0.20 0.25 -----0.2 -----4.9 5.0 5.1 3.25 3.30 3.35 4.9 5.0 5.1 3.25 3.30 3.35 -----0.4 -----0.35 0.40 0.45 0 -----0.075 – – 台灣類比科技股份有限公司 – Advanced Analog Technology, Inc. – Version 3.00 Page 32 of 32