LINER LAEX 100ma, low voltage, very low dropout linear regulator Datasheet

LT3020/LT3020-1.2/
LT3020-1.5/LT3020-1.8
100mA, Low Voltage,
Very Low Dropout
Linear Regulator
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FEATURES
DESCRIPTIO
■
The LT®3020 is a very low dropout voltage (VLDOTM) linear
regulator that operates from input supplies down to 0.9V.
This device supplies 100mA of output current with a
typical dropout voltage of 150mV. The LT3020 is ideal for
low input voltage to low output voltage applications,
providing comparable electrical efficiency to that of a
switching regulator.
■
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■
■
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■
■
■
■
■
■
■
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■
VIN Range: 0.9V to 10V
Minimum Input Voltage: 0.9V
Dropout Voltage: 150mV Typical
Output Current: 100mA
Adjustable Output (VREF = VOUT(MIN) = 200mV)
Fixed Output Voltages: 1.2V, 1.5V, 1.8V
Stable with Low ESR, Ceramic Output Capacitors
(2.2µF Minimum)
0.2% Load Regulation from 0mA to 100mA
Quiescent Current: 120µA (Typ)
3µA Typical Quiescent Current in Shutdown
Current Limit Protection
Reverse-Battery Protection
No Reverse Current
Thermal Limiting with Hysteresis
8-Lead DFN (3mm × 3mm) and MSOP Packages
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APPLICATIO S
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■
■
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Low Current Regulators
Battery-Powered Systems
Cellular Phones
Pagers
Wireless Modems
Internal protection circuitry includes reverse-battery protection, current limiting, thermal limiting with hysteresis,
and reverse-current protection. The LT3020 is available as
an adjustable output device with an output range down to
the 200mV reference. Three fixed output voltages, 1.2V,
1.5V and 1.8V, are also available.
The LT3020 regulator is available in the low profile
(0.75mm) 8-lead (3mm × 3mm) DFN package with exposed pad and the 8-lead MSOP package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
VLDO is a trademark of Linear Technology Corporation.
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■
The LT3020 regulator optimizes stability and transient
response with low ESR, ceramic output capacitors as
small as 2.2µF. Other LT3020 features include 0% line
regulation and 0.2% typical load regulation. In shutdown,
quiescent current typically drops to 3µA.
TYPICAL APPLICATIO
Minimum Input Voltage
1.8V to 1.5V, 100mA VLDO Regulator
1.1
VIN
1.8V
IN
2.2µF
OUT
LT3020-1.5
2.2µF
SHDN
GND
3020 TA01
VOUT
1.5V
100mA
MINIMUM INPUT VOLTAGE (V)
1.0
IL = 100mA
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
3020 TA02
sn3020 3020fas
1
LT3020/LT3020-1.2/
LT3020-1.5/LT3020-1.8
W W
W
AXI U
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ABSOLUTE
RATI GS
(Note 1)
IN Pin Voltage ........................................................ ±10V
OUT Pin Voltage .................................................... ±10V
Input-to-Output Differential Voltage ....................... ±10V
ADJ Pin Voltage .................................................... ±10V
SHDN Pin Voltage ................................................. ±10V
Output Short-Circut Duration .......................... Indefinite
Operating Junction Temperature Range
(Notes 2, 3) .......................................... – 40°C to 125°C
Storage Temperature Range
DD .................................................... – 65°C to 125°C
MS8 .................................................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
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PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
TOP VIEW
LT3020EDD
OUT 1
OUT 2
ADJ 3
9
GND 4
TOP VIEW
8
IN
OUT 1
7
IN
OUT 2
6
NC
OUT 3
5
SHDN
GND 4
DD PART MARKING
DD PACKAGE
8-LEAD (3mm × 3mm) PLASTIC DFN
LAEX
TJMAX = 125°C, θJA = 35°C/ W*, θJC = 3°C/ W
EXPOSED PAD IS GND (PIN 9) CONNECT TO PIN 4
*SEE THE APPLICATIONS INFORMATION SECTION
ORDER PART
NUMBER
9
8
IN
7
IN
6
NC
5
SHDN
DD PACKAGE
8-LEAD (3mm × 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 35°C/ W*, θJC = 3°C/ W
EXPOSED PAD IS GND (PIN 9) CONNECT TO PIN 4
*SEE THE APPLICATIONS INFORMATION SECTION
ORDER PART
NUMBER
1
2
3
4
DD8 PART MARKING
LBKC
LBKD
LBKF
ORDER PART
NUMBER
TOP VIEW
OUT
OUT
ADJ
GND
LT3020EDD-1.2
LT3020EDD-1.5
LT3020EDD-1.8
TOP VIEW
8
7
6
5
IN
IN
NC
SHDN
MS8 PACKAGE
8-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 125°C/ W, θJC = 40°C/ W
SEE THE APPLICATIONS INFORMATION SECTION
LT3020EMS8
MS8 PART MARKING
LTAGL
OUT
OUT
OUT
GND
1
2
3
4
8
7
6
5
IN
IN
NC
SHDN
MS8 PACKAGE
8-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 125°C/ W, θJC = 40°C/ W
SEE THE APPLICATIONS INFORMATION SECTION
LT3020EMS8-1.2
LT3020EMS8-1.5
LT3020EMS8-1.8
MS8 PART MARKING
LTBKG
LTBKH
LTBKJ
Consult factory for parts specified with wider operating temperature ranges.
sn3020 3020fas
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LT3020/LT3020-1.2/
LT3020-1.5/LT3020-1.8
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TJ = 25°C.
PARAMETER
CONDITIONS
MIN
Minimum Input Voltage (Note 14) ILOAD = 100mA, TJ > 0°C
ILOAD = 100mA, TJ < 0°C
ADJ Pin Voltage (Notes 4, 5)
Regulated Output Voltage
(Note 4)
VIN = 1.5V, ILOAD = 1mA
1.15V < VIN < 10V, 1mA < ILOAD < 100mA
LT3020-1.2
LT3020-1.5
LT3020-1.8
TYP
MAX
UNITS
0.9
0.9
1.05
1.10
V
V
mV
mV
●
196
193
200
200
204
206
VIN = 1.5V, ILOAD = 1mA
1.5V < VIN < 10V, 1mA < ILOAD < 100mA
●
1.176
1.157
1.200
1.200
1.224
1.236
V
V
VIN = 1.8V, ILOAD = 1mA
1.8V < VIN < 10V, 1mA < ILOAD < 100mA
●
1.470
1.447
1.500
1.500
1.530
1.545
V
V
VIN = 2.1V, ILOAD = 1mA
2.1V < VIN < 10V, 1mA < ILOAD < 100mA
●
1.764
1.737
1.800
1.800
1.836
1.854
V
V
Line Regulation (Note 6)
∆VIN = 1.15V to 10V, ILOAD = 1mA
LT3020-1.2
∆VIN = 1.5V to 10V, ILOAD = 1mA
LT3020-1.5
∆VIN = 1.8V to 10V, ILOAD = 1mA
LT3020-1.8
∆VIN = 2.1V to 10V, ILOAD = 1mA
●
●
●
●
–1.75
–10.5
–13
–15.8
0
0
0
0
1.75
10.5
13
15.8
mV
mV
mV
mV
Load Regulation (Note 6)
VIN = 1.15V, ∆ILOAD = 1mA to 100mA
VIN = 1.15V, ∆ILOAD = 1mA to 100mA
–1
–2
0.4
●
1
1
mV
mV
VIN = 1.5V, ∆ILOAD = 1mA to 100mA
VIN = 1.5V, ∆ILOAD = 1mA to 100mA
–6
–12
1
●
6
6
mV
mV
VIN = 1.8V, ∆ILOAD = 1mA to 100mA
VIN = 1.8V, ∆ILOAD = 1mA to 100mA
–7.5
–15
1.5
●
7.5
7.5
mV
mV
VIN = 2.1V, ∆ILOAD = 1mA to 100mA
VIN = 2.1V, ∆ILOAD = 1mA to 100mA
–9
–18
2
●
9
9
mV
mV
85
115
180
mV
mV
150
180
285
mV
mV
120
570
920
2.25
250
µA
µA
µA
mA
LT3020-1.2
LT3020-1.5
LT3020-1.8
Dropout Voltage (Notes 7, 12)
ILOAD = 10mA
ILOAD = 10mA
●
ILOAD = 100mA
ILOAD = 100mA
●
●
GND Pin Current
VIN = VOUT(NOMINAL)
(Notes 8, 12)
ILOAD = 0mA
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 100mA
Output Voltage Noise
COUT = 2.2µF, ILOAD = 100mA, BW = 10Hz to 100kHz, VOUT = 1.2V
ADJ Pin Bias Current
VADJ = 0.2V, RIPPLE = 1.2V (Notes 6, 9)
Shutdown Threshold
VOUT = Off to On
VOUT = On to Off
●
●
VSHDN = 0V, VIN = 10V
VSHDN = 10V, VIN = 10V
●
●
SHDN Pin Current (Note 10)
●
3.5
245
0.25
µVRMS
20
50
nA
0.61
0.61
0.9
V
V
3
±0.3
9.5
µA
µA
9
µA
Quiescent Current in Shutdown
VIN = 6V, VSHDN = 0V
3
Ripple Rejection (Note 6)
VIN – VOUT = 1V, VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 100mA
64
dB
LT3020-1.2 VIN – VOUT = 1V, VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz,
ILOAD = 100mA
60
dB
LT3020-1.5 VIN – VOUT = 1V, VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz,
ILOAD = 100mA
58
dB
LT3020-1.8 VIN – VOUT = 1V, VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz,
ILOAD = 100mA
56
dB
sn3020 3020fas
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LT3020/LT3020-1.2/
LT3020-1.5/LT3020-1.8
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TJ = 25°C.
PARAMETER
Current Limit (Note 12)
CONDITIONS
VIN = 10V, VOUT = 0V
VIN = VOUT(NOMINAL) + 0.5V, ∆VOUT = –5%
MIN
●
110
TYP
360
310
MAX
UNITS
mA
mA
Input Reverse Leakage Current
VIN = –10V, VOUT = 0V
1
10
µA
Reverse Output Current
(Notes 11, 13)
VOUT = 1.2V, VIN = 0V
LT3020-1.2
VOUT = 1.2V, VIN = 0V
LT3020-1.5
VOUT = 1.5V, VIN = 0V
LT3020-1.8
VOUT = 1.8V, VIN = 0V
3
10
10
10
5
15
15
15
µA
µA
µA
µA
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LT3020 regulators are tested and specified under pulse load
conditions such that TJ ≈ TA. The LT3020 is 100% production tested at
TA = 25°C. Performance at –40°C and 125°C is assured by design,
characterization and correlation with statistical process controls.
Note 3: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 4: Maximum junction temperature limits operating conditions. The
regulated output voltage specification does not apply for all possible
combinations of input voltage and output current. Limit the output current
range if operating at maximum input voltage. Limit the input voltage range
if operating at maximum output current.
Note 5: Typically the LT3020 supplies 100mA output current with a 1V
input supply. The guaranteed minimum input voltage for 100mA output
current is 1.10V.
Note 6: The LT3020 is tested and specified for these conditions with an
external resistor divider (20k and 30.1k) setting VOUT to 0.5V. The external
resistor divider adds 10µA of output load current. The line regulation and
load regulation specifications refer to the change in the 0.2V reference
voltage, not the 0.5V output voltage. Specifications for fixed output voltage
devices are referred to the output voltage.
Note 7: Dropout voltage is the minimum input to output voltage differential
needed to maintain regulation at a specified output current. In dropout the
output voltage equals: (VIN – VDROPOUT).
Note 8: GND pin current is tested with VIN = VOUT(NOMINAL) and a current
source load. The device is tested while operating in its dropout region.
This condition forces the worst-case GND pin current. GND pin current
decreases at higher input voltages.
Note 9: Adjust pin bias current flows out of the ADJ pin.
Note 10: Shutdown pin current flows into the SHDN pin.
Note 11: Reverse output current is tested with IN grounded and OUT
forced to the rated output voltage. This current flows into the OUT pin and
out of the GND pin. For fixed voltage devices this includes the current in
the output resistor divider.
Note 12: The LT3020 is tested and specified for these conditions with an
external resistor divider (20k and 100k) setting VOUT to 1.2V. The external
resistor divider adds 10µA of load current.
Note 13: Reverse current is higher for the case of (rated_output) < VOUT <
VIN, because the no-load recovery circuitry is active in this region and is
trying to restore the output voltage to its nominal value.
Note 14: Minimum input voltage is the minimum voltage required by the
control circuit to regulate the output voltage and supply the full 100mA
rated current. This specification is tested at VOUT = 0.5V. At higher output
voltages the minimum input voltage required for regulation will be equal to
the regulated output voltage VOUT plus the dropout voltage.
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TYPICAL PERFOR A CE CHARACTERISTICS
Dropout Voltage
225
225
200
TJ = 125°C
175
150
125
TJ = 25°C
100
75
150
IL = 10mA
100
75
25
3020 G01
IL = 50mA
125
25
10 20 30 40 50 60 70 80 90 100
OUTPUT CURRENT (mA)
IL = 100mA
175
50
0
VOUT = 1.2V
200
50
0
Quiescent Current
250
0
–50
IL = 1mA
QUIESCENT CURRENT (µA)
250
DROPOUT VOLTAGE (mV)
DROPOUT VOLTAGE (mV)
Typical Dropout Voltage
250
VIN = 6V
225 VOUT = 1.2V
IL = 0
200
175
150
125
VSHDN = VIN
100
75
50
25
–25
0
25
50
75
TEMPERATURE (°C)
100
125
3020 G02
0
–50
VSHDN = 0V
–25
0
25
50
75
TEMPERATURE (°C)
100
125
3020 G03
sn3020 3020fas
4
LT3020/LT3020-1.2/
LT3020-1.5/LT3020-1.8
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TYPICAL PERFOR A CE CHARACTERISTICS
1.830
IL = 1mA
1.530
IL = 1mA
1.820
202
200
198
1.810
1.800
1.790
1.780
196
–25
0
25
50
75
TEMPERATURE (°C)
100
1.770
–50 –25
125
50
25
75
0
TEMPERATURE (°C)
100
3020 G04
1.200
1.190
1.180
VOUT = 1.2V
900 IL = 0
TJ = 25°C
800
100
500
400
300
0
125
2000
600
200
2
3 4 5 6 7
INPUT VOLTAGE (V)
8
Quiescent Current
800
TJ = 25°C
2500
2000
700
600
500
400
300
1
2
3 4 5 6 7
INPUT VOLTAGE (V)
9
10
3020 G25
RL = 1.2k, IL = 1mA
0
1
2
3 4 5 6 7
INPUT VOLTAGE (V)
8
1750
1500
RL = 36Ω
IL = 50mA
1250
1000
RL = 180Ω
IL = 10mA
750
1
2
10
3020 G06
RL = 1.8k
IL = 1mA
900
VOUT = 1.5V (LT 3020-1.5)
IL = 0
800
TJ = 25°C
700
600
500
400
300
200
VSHDN = VIN
100
0
9
Quiescent Current
0
8
RL = 120Ω
IL = 10mA
1000
250
VSHDN = 0V
0
750
0
10
RL = 18Ω
IL = 100mA
500
VSHDN = VIN
0
9
VOUT = 1.8V (LT 3020-1.8)
TJ = 25°C
2250
GND PIN CURRENT (µA)
QUIESCENT CURRENT (µA)
VOUT = 1.8V (LT 3020-1.8)
IL = 0
RL = 24Ω
IL = 50mA
1000
GND Pin Current
900
100
1250
3020 G05
3020 G24
200
1500
250
VSHDN = 0V
1
RL = 12Ω
IL = 100mA
1750
500
VSHDN = VIN
0
125
VOUT = 1.2V
TJ = 25°C
2250
700
100
50
25
75
0
TEMPERATURE (°C)
100
GND Pin Current
2500
GND PIN CURRENT (µA)
QUIESCENT CURRENT (µA)
OUTPUT VOLTAGE (V)
1.210
50
25
75
0
TEMPERATURE (°C)
3020 G23
Quiescent Current
1.220
1000
1.490
1.470
–50 –25
125
1000
IL = 1mA
1.170
–50 –25
1.500
3020 G22
Output Voltage
1.230
1.510
1.480
QUIESCENT CURRENT (µA)
194
–50
IL = 1mA
1.520
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
204
ADJ PIN VOLTAGE (mV)
Output Voltage
Output Voltage
ADJ Pin Voltage
206
3 4 5 6 7
INPUT VOLTAGE (V)
8
9
10
3020 G26
VSHDN = 0V
0
0
1
2
3 4 5 6 7
INPUT VOLTAGE (V)
8
9
10
3020 G27
sn3020 3020fas
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LT3020/LT3020-1.2/
LT3020-1.5/LT3020-1.8
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TYPICAL PERFOR A CE CHARACTERISTICS
GND Pin Current vs ILOAD
GND Pin Current
VOUT = 1.5V (LT 3020-1.5)
TJ = 25°C
2250
GND PIN CURRENT (µA)
GND PIN CURRENT (µA)
RL = 15Ω
IL = 100mA
1500
1250
RL = 30Ω
IL = 50mA
1000
750
RL = 150Ω
IL = 10mA
500
RL = 1.5k
IL = 1mA
1200
1000
800
600
400
200
0
0
1
3 4 5 6 7
INPUT VOLTAGE (V)
2
8
9
10
TJ = 25°C
0.4
0.3
0.2
0
–50
10 20 30 40 50 60 70 80 90 100
OUTPUT CURRENT (mA)
0
–25
0
25
50
75
TEMPERATURE (°C)
100
125
3020 G08
ADJ Pin Bias Current
25
VSHDN = 10V
4.0
3.5
3.0
2.5
2.0
1.5
1.0
4.0
ADJ PIN BIAS CURRENT (nA)
SHDN PIN INPUT CURRENT (µA)
SHDN PIN INPUT CURRENT (µA)
0.5
4.5
0.5
3.5
3.0
2.5
2.0
1.5
1.0
20
15
10
5
0.5
1
0
2
3 4 5 6 7 8
SHDN PIN VOLTAGE (V)
9
0
–50
10
–25
0
25
50
75
TEMPERATURE (°C)
3020 G09
350
VIN = 1.7V
250
200
150
100
0
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
VIN = 0V
450 VOUT = 1.2V
350
300
250
200
150
100
3020 G12
–25
0
25
50
75
TEMPERATURE (°C)
125
60
400
0
–50
100
Input Ripple Rejection
50
50
0
25
50
75
TEMPERATURE (°C)
70
RIPPLE REJECTION (dB)
REVERSE OUTPUT CURRENT (µA)
VIN = 10V
–25
3020 G11
Reverse Output Current
VOUT = 0V
300
0
–50
125
500
450
400
100
3020 G10
Current Limit
CURRENT LIMIT (mA)
0.6
SHDN Pin Input Current (µA)
5.0
4.5
500
0.7
3020 G07
SHDN Pin Input Current
0
0.8
0.1
3020 G28
5.0
IL = 1mA
0.9
1400
250
0
1.0
VIN = 1.7V
1800 VOUT = 1.2V
TJ = 25°C
1600
2000
1750
SHDN Pin Threshold
2000
SHDN PIN THRESHOLD (V)
2500
100
125
3020 G13
50
40
30
COUT = 10µF
20
10 VIN = 1.5V + 50mVRMS RIPPLE
VOUT = 0.5V
COUT = 2.2µF
I = 100mA
0 L
10
1k
10k
1M
100
100k
FREQUENCY (Hz)
3020 G14
sn3020 3020fas
6
LT3020/LT3020-1.2/
LT3020-1.5/LT3020-1.8
U W
TYPICAL PERFOR A CE CHARACTERISTICS
1.1
90
1.0
80
0.9
70
60
50
40
30
20
VIN = 1.5V + 0.5VP-P RIPPLE AT f = 120Hz
10 VOUT = 0.5V
IL = 100mA
0
0
25
50
75 100 125
–50 –25
TEMPERATURE (°C)
1.0
IL = 100mA
0.8
LOAD REGULATION (mV)
100
MINIMUM INPUT VOLTAGE (V)
RIPPLE REJECTION (dB)
Load Regulation
∆IL = 1mA to 100mA
Minimum Input Voltage
Input Ripple Rejection
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
–50
–25
0
25
50
75
TEMPERATURE (°C)
3020 G15
100
125
0.6
0.4
0.2
0
–0.2
–0.4 V = 1.15V
IN
–0.6 VOUT = 0.5V
*LOAD REGULATION NUMBER REFERS
–0.8 TO CHANGE IN THE 200mV REFERENCE
VOLTAGE
–1.0
0
25
50
75 100
–50 –25
TEMPERATURE (°C)
3020 G16
125
3020 G17
Transient Response
VOUT
50mV/DIV
IOUT
100mA/DIV
50µs/DIV
IOUT = 10mA TO 100mA
VOUT = 1.5V
RMS Output Noise vs Load
Current (10Hz to 100kHz)
300
VOUT = 1.2V
IL = 100mA
COUT = 2.2µF
No-Load Recovery Threshold
18
VOUT = 1.2V
COUT = 2.2µF
16
1
0.1
OUTPUT CURRENT SINK (mA)
250
OUTPUT NOISE (µVRMS)
OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz)
Output Noise Spectral Density
10
3020 G21
200
150
100
50
14
12
10
8
6
4
2
0.01
10
100
1k
10k
FREQUENCY (Hz)
100k
1M
3020 G18
0
0.01
0.1
1
10
LOAD CURRENT (mA)
100
3020 G19
0
0
5
10
15
OUTPUT OVERSHOOT (%)
20
3020 G20
sn3020 3020fas
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LT3020/LT3020-1.2/
LT3020-1.5/LT3020-1.8
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PI FU CTIO S
OUT (Pins 1, 2): These pins supply power to the load. Use
a minimum output capacitor of 2.2µF to prevent oscillations.
Applications with large load transients require larger output capacitors to limit peak voltage transients. See the
Applications Information section for more information on
output capacitance and reverse output characteristics.
OUT (Pin 3, Fixed Voltage Device Only): This pin is the
sense point for the internal resistor divider. It should be
tied directly to the other OUT pins (1, 2) for best results.
ADJ (Pin 3, Adjustable Device Only): This pin is the
inverting terminal to the error amplifier. Its typical input
bias current of 20nA flows out of the pin (see curve of ADJ
Pin Bias Current vs Temperature in the Typical Performance Characteristics). The ADJ pin reference voltage is
200mV (referred to GND).
GND (Pin 4): Ground.
SHDN (Pin 5): The SHDN pin puts the LT3020 into a low
power state. Pulling the SHDN pin low turns the output off.
Drive the SHDN pin with either logic or an open collector/
drain device with a pull-up resistor. The pull-up resistor
supplies the pull-up current to the open collector/drain
logic, normally several microamperes, and the SHDN pin
current, typically 2.3µA. If unused, connect the SHDN pin
to VIN. The LT3020 does not function if the SHDN pin is not
connected.
IN (Pins 7, 8): These pins supply power to the device. The
LT3020 requires a bypass capacitor at IN if it is more than
six inches away from the main input filter capacitor. The
output impedance of a battery rises with frequency, so
include a bypass capacitor in battery-powered circuits. A
bypass capacitor in the range of 2.2µF to 10µF suffices. The
LT3020 withstands reverse voltages on the IN pin with
respect to ground and the OUT pin. In the case of a reversed
input, which occurs if a battery is plugged in backwards,
the LT3020 acts as if a diode is in series with its input. No
reverse current flows into the LT3020 and no reverse voltage appears at the load. The device protects itself and the
load.
GND (Pin 9, DD8 Package Only): Ground. Solder Pin 9
(the exposed pad) to the PCB. Connect directly to Pin 4 for
best performance.
W
BLOCK DIAGRA
IN
(7, 8)
SHDN
(5)
R3
THERMAL
SHUTDOWN
SHUTDOWN
D1
–
ERROR AMP
200mV
BIAS CURRENT
AND
REFERENCE
GENERATOR
+
Q3
CURRENT
GAIN
Q1
OUT
(1, 2)
D2
212mV
OUT SENSE
(3)
–
NO-LOAD
RECOVERY
Q2
R2
+
25k
NOTE:
FOR LT3020 ADJUST PIN 3 IS CONNECTED TO
THE ADJUST PIN, R1 AND R2 ARE EXTERNAL.
FOR LT3020-1.X PIN 3 IS CONNECTED TO THE
OUTPUT SENSE PIN, R1 AND R2 ARE INTERNAL.
FIXED
VOUT
1.2V
1.5V
1.8V
ADJ
(3)
R1
R1
R2
20k 100k
20k 130k
20k 160k
GND
(4,9)
3020 BD
sn3020 3020fas
8
LT3020/LT3020-1.2/
LT3020-1.5/LT3020-1.8
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APPLICATIO S I FOR ATIO
The LT3020 is a very low dropout linear regulator capable
of 1V input supply operation. Devices supply 100mA of
output current and dropout voltage is typically 150mV.
Quiescent current is typically 120µA and drops to 3µA in
shutdown. The LT3020 incorporates several protection
features, making it ideal for use in battery-powered systems. The device protects itself against reverse-input and
reverse-output voltages. In battery backup applications
where the output is held up by a backup battery when the
input is pulled to ground, the LT3020 acts as if a diode is
in series with its output which prevents reverse current
flow. In dual supply applications where the regulator load
is returned to a negative supply, the output can be pulled
below ground by as much as 10V without affecting startup or normal operation.
Adjustable Operation
The LT3020’s output voltage range is 0.2V to 9.5V. Figure
1 shows that the output voltage is set by the ratio of two
external resistors. The device regulates the output to
maintain the ADJ pin voltage at 200mV referenced to
ground. The current in R1 equals 200mV/R1 and the
current in R2 is the current in R1 minus the ADJ pin bias
current. The ADJ pin bias current of 20nA flows out of the
pin. Use the formula in Figure 1 to calculate output voltage.
An R1 value of 20k sets the resistor divider current to
10µA. Note that in shutdown the output is turned off and
the divider current is zero. Curves of ADJ Pin Voltage vs
Temperature and ADJ Pin Bias Current vs Temperature
appear in the Typical Performance Characteristics section.
IN
VIN
OUT
LT3020-ADJ
SHDN
R2
+
VOUT
ADJ
GND
R1
3020 F01
( )
VOUT = 200mV 1 + R2 – IADJ (R2)
R1
VADJ = 200mV
IADJ = 20nA AT 25°C
OUTPUT RANGE = 0.2V TO 9.5V
Figure 1. Adjustable Operation
Specifications for output voltages greater than 200mV are
proportional to the ratio of desired output voltage to
200mV; (VOUT/200mV). For example, load regulation for
an output current change of 1mA to 100mA is typically
0.4mV at VADJ = 200mV. At VOUT = 1.5V, load regulation is:
(1.5V/200mV) • (0.4mV) = 3mV
Output Capacitance and Transient Response
The LT3020’s design is stable with a wide range of output
capacitors, but is optimized for low ESR ceramic capacitors. The output capacitor’s ESR affects stability, most
notably with small value capacitors. Use a minimum
output capacitor of 2.2µF with an ESR of 0.3Ω or less to
prevent oscillations. The LT3020 is a low voltage device,
and output load transient response is a function of output
capacitance. Larger values of output capacitance decrease
the peak deviations and provide improved transient response for larger load current changes. For output capacitor values greater than 20µF a small feedforward capacitor
with a value of 300pF across the upper divider resistor (R2
in Figure 1) is required.
Give extra consideration to the use of ceramic capacitors.
Manufacturers make ceramic capacitors with a variety of
dielectrics, each with a different behavior across temperature and applied voltage. The most common dielectrics are
Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics
provide high C-V products in a small package at low cost,
but exhibit strong voltage and temperature coefficients.
The X5R and X7R dielectrics yield highly stable
characterisitics and are more suitable for use as the output
capacitor at fractionally increased cost. The X5R and X7R
dielectrics both exhibit excellent voltage coefficient characteristics. The X7R type works over a larger temperature
range and exhibits better temperature stability whereas
X5R is less expensive and is available in higher values.
Figures 2 and 3 show voltage coefficient and temperature
coefficient comparisons between Y5V and X5R material.
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress, similar to the way a piezoelectric accelerometer or microphone
works. For a ceramic capacitor, the stress can be induced
by vibrations in the system or thermal transients. The resulting voltages produced can cause appreciable amounts
of noise. A ceramic capacitor produced Figure 4’s trace in
response to light tapping from a pencil. Similar vibration
induced behavior can masquerade as increased output
voltage noise.
sn3020 3020fas
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LT3020/LT3020-1.2/
LT3020-1.5/LT3020-1.8
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APPLICATIO S I FOR ATIO
20
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
CHANGE IN VALUE (%)
0
X5R
–20
1mV/DIV
–40
–60
Y5V
–80
–100
0
2
4
14
8
6
10 12
DC BIAS VOLTAGE (V)
16
VOUT = 1.3V
COUT = 10µF
ILOAD = 0
1ms/DIV
3020 F04
3020 F02
Figure 2. Ceramic Capacitor DC Bias Characteristics
voltage-controlled current sink that significantly improves
the light load transient response time by discharging the
output capacitor quickly and then turning off. The current
sink turns on when the output voltage exceeds 6% of the
nominal output voltage. The current sink level is then
proportional to the overdrive above the threshold up to a
maximum of approximately 15mA. Consult the curve in
the Typical Performance Characteristics for the No-Load
Recovery Threshold.
40
CHANGE IN VALUE (%)
20
X5R
0
–20
–40
Y5V
–60
–80
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
–100
–50 –25
50
25
75
0
TEMPERATURE (°C)
Figure 4. Noise Resulting from Tapping on a Ceramic Capacitor
100
125
3020 F03
Figure 3. Ceramic Capacitor Temperature Characteristics
No-Load/Light-Load Recovery
A possible transient load step that occurs is where the
output current changes from its maximum level to zero
current or a very small load current. The output voltage
responds by overshooting until the regulator lowers the
amount of current it delivers to the new level. The regulator
loop response time and the amount of output capacitance
control the amount of overshoot. Once the regulator has
decreased its output current, the current provided by the
resistor divider (which sets VOUT) is the only current
remaining to discharge the output capacitor from the level
to which it overshot. The amount of time it takes for the
output voltage to recover easily extends to milliseconds
with microamperes of divider current and a few microfarads of output capacitance.
To eliminate this problem, the LT3020 incorporates a
no-load or light-load recovery circuit. This circuit is a
If external circuitry forces the output above the no load
recovery circuit’s threshold, the current sink turns on in an
attempt to restore the output voltage to nominal. The
current sink remains on until the external circuitry releases
the output. However, if the external circuitry pulls the
output voltage above the input voltage, or the input falls
below the output, the LT3020 turns the current sink off and
shuts down the bias current/reference generator circuitry.
Thermal Considerations
The LT3020’s power handling capability is limited by its
maximum rated junction temperature of 125°C. The power
dissipated by the device is comprised of two components:
1. Output current multiplied by the input-to-output voltage differential: (IOUT)(VIN – VOUT) and
2. GND pin current multiplied by the input voltage:
(IGND)(VIN).
GND pin current is found by examining the GND pin
current curves in the Typical Performance Characteristics.
Power dissipation is equal to the sum of the two components listed above.
sn3020 3020fas
10
LT3020/LT3020-1.2/
LT3020-1.5/LT3020-1.8
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The LT3020 regulator has internal thermal limiting (with
hysteresis) designed to protect the device during overload
conditions. For normal continuous conditions, do not
exceed the maximum junction temperature rating of 125°C.
Carefully consider all sources of thermal resistance from
junction to ambient including other heat sources mounted
in proximity to the LT3020.
The underside of the LT3020 DD package has exposed metal
(4mm2) from the lead frame to where the die is attached.
This allows heat to directly transfer from the die junction
to the printed circuit board metal to control maximum
operating junction temperature. The dual-in-line pin arrangement allows metal to extend beyond the ends of the
package on the topside (component side) of a PCB. Connect this metal to GND on the PCB. The multiple IN and OUT
pins of the LT3020 also assist in spreading heat to the PCB.
The LT3020 MS8 package has pin 4 fused with the lead
frame. This also allows heat to transfer from the die to the
printed circuit board metal, therefore reducing the thermal
resistance. Copper board stiffeners and plated throughholes can also be used to spread the heat generated by
power devices.
The following tables list thermal resistance for several
different board sizes and copper areas for two different
packages. Measurements were taken in still air on 3/32"
FR-4 board with one ounce copper.
Calculating Junction Temperature
Example: Given an output voltage of 1.8V, an input voltage
range of 2.25V to 2.75V, an output current range of 1mA
to 100mA, and a maximum ambient temperature of 70°C,
what will the maximum junction temperature be for an
application using the DD package?
The power dissipated by the device is equal to:
IOUT(MAX)(VIN(MAX) – VOUT) + IGND(VIN(MAX))
where
IOUT(MAX) = 100mA
VIN(MAX) = 2.75V
IGND at (IOUT = 100mA, VIN = 2.75V) = 3mA
so
P = 100mA(2.75V – 1.8V) + 3mA(2.75V) = 0.103W
The thermal resistance is in the range of 35°C/W to
70°C/W depending on the copper area. So the junction
temperature rise above ambient is approximately equal to:
0.103W(52.5°C/W) = 5.4°C
The maximum junction temperature equals the maximum
junction temperature rise above ambient plus the maximum ambient temperature or:
TJMAX = 70°C + 5.4°C = 75.4°C
Table 1. Measured Thermal Resistance for DD Package
COPPER AREA
TOPSIDE*
BACKSIDE
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
2500mm2
2500mm2
2500mm2
35°C/W
900mm2
2500mm2
2500mm2
40°C/W
2
2
2500mm2
55°C/W
2500mm2
2500mm2
60°C/W
2
2
70°C/W
225mm
2500mm
100mm2
2
50mm
2500mm
2500mm
Table 2. Measured Thermal Resistance for MS8 Package
COPPER AREA
TOPSIDE* BACKSIDE
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
2500mm2
2500mm2
2500mm2
110°C/W
2
2
2500mm2
115°C/W
2
2
1000mm
2
2500mm
225mm
2500mm
2500mm
120°C/W
100mm2
2500mm2
2500mm2
130°C/W
50mm2
2500mm2
2500mm2
140°C/W
*Device is mounted on topside.
Protection Features
The LT3020 incorporates several protection features that
make it ideal for use in battery-powered circuits. In addition to the normal protection features associated with
monolithic regulators, such as current limiting and thermal limiting, the device also protects against reverseinput voltages, reverse-output voltages and reverse
output-to-input voltages.
Current limit protection and thermal overload protection
protect the device against current overload conditions at
the output of the device. For normal operation, do not
exceed a junction temperature of 125°C.
The IN pins of the device withstand reverse voltages of
10V. The LT3020 limits current flow to less than 1µA and
no negative voltage appears at OUT. The device protects
both itself and the load against batteries that are plugged
in backwards.
sn3020 3020fas
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LT3020/LT3020-1.2/
LT3020-1.5/LT3020-1.8
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APPLICATIO S I FOR ATIO
The LT3020 incurs no damage if OUT is pulled below
ground. If IN is left open circuit or grounded, OUT can be
pulled below ground by 10V. No current flows from the
pass transistor connected to OUT. However, current flows
in (but is limited by) the resistor divider that sets the output
voltage. Current flows from the bottom resistor in the
divider and from the ADJ pin’s internal clamp through the
top resistor in the divider to the external circuitry pulling
OUT below ground. If IN is powered by a voltage source,
OUT sources current equal to its current limit capability
and the LT3020 protects itself by thermal limiting. In this
case, grounding SHDN turns off the LT3020 and stops
OUT from sourcing current.
The LT3020 incurs no damage if the ADJ pin is pulled
above or below ground by 10V. If IN is left open circuit or
grounded and ADJ is pulled above ground, ADJ acts like a
25k resistor in series with a 1V clamp (one Schottky diode
in series with one diode). ADJ acts like a 25k resistor in
series with a Schottky diode if pulled below ground. If IN
is powered by a voltage source and ADJ is pulled below its
reference voltage, the LT3020 attempts to source its
current limit capability at OUT. The output voltage increases to VIN – VDROPOUT with VDROPOUT set by whatever
load current the LT3020 supports. This condition can
potentially damage external circuitry powered by the
LT3020 if the output voltage increases to an unregulated
high voltage. If IN is powered by a voltage source and ADJ
is pulled above its reference voltage, two situations can
occur. If ADJ is pulled slightly above its reference voltage,
the LT3020 turns off the pass transistor, no output current
is sourced and the output voltage decreases to either the
voltage at ADJ or less. If ADJ is pulled above its no load
recovery threshold, the no load recovery circuitry turns on
and attempts to sink current. OUT is actively pulled low
and the output voltage clamps at a Schottky diode above
ground. Please note that the behavior described above
applies to the LT3020 only. If a resistor divider is connected under the same conditions, there will be additional
V/R current.
In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled to
ground, pulled to some intermediate voltage or is left open
circuit. In the case where the input is grounded, there is
less than 1µA of reverse output current.
If the LT3020 IN pin is forced below the OUT pin or the OUT
pin is pulled above the IN pin, input current drops to less
than 10µA typically. This occurs if the LT3020 input is
connected to a discharged (low voltage) battery and either
a backup battery or a second regulator circuit holds up the
output. The state of the SHDN pin has no effect on the
reverse output current if OUT is pulled above IN.
Input Capacitance and Stability
The LT3020 is designed to be stable with a minimum
capacitance of 2.2µF placed at the IN pin. Ceramic capacitors with very low ESR may be used. However, in cases
where a long wire is used to connect a power supply to the
input of the LT3020 (and also from the ground of the
LT3020 back to the power supply ground), use of low
value input capacitors combined with an output load
current of 20mA or greater may result in an unstable
application. This is due to the inductance of the wire
forming an LC tank circuit with the input capacitor and not
a result of the LT3020 being unstable.
The self-inductance, or isolated inductance, of a wire is
directly proportional to its length. However, the diameter
of a wire does not have a major influence on its selfinductance. For example, the self inductance of a 2-AWG
isolated wire with a diameter of 0.26 in. is about half the
inductance of a 30-AWG wire with a diameter of 0.01 in.
One foot of 30-AWG wire has 465nH of self inductance.
The overall self-inductance of a wire can be reduced in two
ways. One is to divide the current flowing towards the
LT3020 between two parallel conductors. In this case, the
farther the wires are placed apart from each other, the
more inductance will be reduced, up to a 50% reduction
when placed a few inches apart. Splitting the wires basically connects two equal inductors in parallel. However,
when placed in close proximity from each other, mutual
inductance is added to the overall self inductance of the
wires. The most effective way to reduce overall inductance
is to place the forward and return-current conductors (the
wire for the input and the wire for ground) in very close
proximity. Two 30-AWG wires separated by 0.02 in. reduce the overall self-inductance to about one-fifth of a
single isolated wire.
sn3020 3020fas
12
LT3020/LT3020-1.2/
LT3020-1.5/LT3020-1.8
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APPLICATIO S I FOR ATIO
If the LT3020 is powered by a battery mounted in close
proximity on the same circuit board, a 2.2µF input capacitor is sufficient for stability. However, if the LT3020 is
powered by a distant supply, use a larger value input
capacitor following the guideline of roughly 1µF (in addition to the 2.2µF minimum) per 8 inches of wire length. As
power supply output impedance may vary, the minimum
input capacitance needed to stabilize the application may
also vary. Extra capacitance may also be placed directly on
the output of the power supply; however, this will require
an order of magnitude more capacitance as opposed to
placing extra capacitance in close proximity to the LT3020.
Furthermore, series resistance may be placed between the
supply and the input of the LT3020 to stabilize the application; as little as 0.1Ω to 0.5Ω will suffice.
sn3020 3020fas
13
LT3020/LT3020-1.2/
LT3020-1.5/LT3020-1.8
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PACKAGE DESCRIPTIO
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698)
R = 0.115
TYP
5
0.38 ± 0.10
8
0.675 ±0.05
3.5 ±0.05
1.65 ±0.05
2.15 ±0.05 (2 SIDES)
3.00 ±0.10
(4 SIDES)
PACKAGE
OUTLINE
1.65 ± 0.10
(2 SIDES)
PIN 1
TOP MARK
(NOTE 6)
(DD8) DFN 1203
0.200 REF
0.25 ± 0.05
0.50
BSC
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.75 ±0.05
0.00 – 0.05
4
0.25 ± 0.05
1
0.50 BSC
2.38 ±0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
sn3020 3020fas
14
LT3020/LT3020-1.2/
LT3020-1.5/LT3020-1.8
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PACKAGE DESCRIPTIO
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660)
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.889 ± 0.127
(.035 ± .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
0.254
(.010)
8
7 6 5
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
DETAIL “A”
0.52
(.0205)
REF
0° – 6° TYP
GAUGE PLANE
0.42 ± 0.038
(.0165 ± .0015)
TYP
0.65
(.0256)
BSC
1
0.53 ± 0.152
(.021 ± .006)
RECOMMENDED SOLDER PAD LAYOUT
DETAIL “A”
1.10
(.043)
MAX
2 3
4
0.86
(.034)
REF
0.18
(.007)
SEATING
PLANE
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.22 – 0.38
(.009 – .015)
TYP
0.65
(.0256)
BSC
0.127 ± 0.076
(.005 ± .003)
MSOP (MS8) 0204
sn3020 3020fas
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LT3020/LT3020-1.2/
LT3020-1.5/LT3020-1.8
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1121/LT1121HV
150mA, Micropower LDOs
VIN: 4.2V to 30V/36V, VOUT(MIN) = 3.75V, VDO = 0.42V, IQ = 30µA,
ISD = 16µA, Reverse-Battery Protection, SOT-223, S8, Z Packages
LT1129
700mA, Micropower LDO
VIN: 4.2V to 30V, VOUT(MIN) = 3.75V, VDO = 0.4V, IQ = 50µA, ISD = 16µA,
DD, SOT-223, S8, TO220-5, TSSOP20 Packages
LT1761
100mA, Low Noise Micropower LDO
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.3V, IQ = 20µA, ISD < 1µA,
Low Noise: < 20µVRMS, Stable with 1µF Ceramic Capacitor,
ThinSOT Package
LT1762
150mA, Low Noise Micropower LDO
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.3V, IQ = 25µA, ISD < 1µA,
Low Noise: <20µVRMS, MS8 Package
LT1763
500mA, Low Noise Micropower LDO
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.3V, IQ = 30µA, ISD < 1µA,
Low Noise: < 20µVRMS, S8 Package
LT1764/LT1764A
3A, Low Noise, Fast Transient Response LDOs
VIN: 2.7V to 20V, VOUT(MIN) = 1.21V, VDO = 0.34V, IQ = 1mA, ISD < 1µA,
Low Noise: <40µVRMS, “A” Version Stable with Ceramic Capacitors,
DD, TO220-5 Packages
LTC1844
150mA, Low Noise, Micropower VLDO
VIN: 1.6V to 6.5V, VOUT(MIN) = 1.25V, VDO = 0.09V, IQ = 35µA, ISD < 1µA,
Low Noise: < 30µVRMS, ThinSOT Package
LT1962
300mA, Low Noise Micropower LDO
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.27V, IQ = 30µA, ISD < 1µA,
Low Noise: < 20µVRMS, MS8 Package
LT1963/LT1963A
1.5A, Low Noise, Fast Transient Response LDOs
VIN: 2.1V to 20V, VOUT(MIN) = 1.21V, VDO = 0.34V, IQ = 1mA, ISD < 1µA,
Low Noise: < 40µVRMS, “A” Version Stable with Ceramic Capacitors,
DD, TO220-5, SOT223, S8 Packages
LT1964
200mA, Low Noise Micropower, Negative LDO
VIN: –2.2V to –20V, VOUT(MIN) = 1.21V, VDO = 0.34V, IQ = 30µA, ISD = 3µA,
Low Noise: <30µVRMS, Stable with Ceramic Capacitors,
ThinSOT Package
LT3010
50mA, High Voltage, Micropower LDO
VIN: 3V to 80V, VOUT(MIN) = 1.2V, VDO = 0.3V, IQ = 30µA, ISD < 1µA,
Low Noise: <100µVRMS, Stable with 1µF Output Capacitor, Exposed
MS8E Package
LT3150
Low VIN, Fast Transient Response, VLDO Controller
VIN: 1.1V to 10V, VOUT(MIN) = 1.23V, VDO = Set by External MOSFET
RDS(ON), 1.4MHz Boost Converter Generates Gate Drive, SSOP16 Package
sn3020 3020fas
16
Linear Technology Corporation
LT/TP 0604 1K REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
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