PD - 91860H IRHNA57160 JANSR2N7469U2 100V, N-CHANNEL RADIATION HARDENED POWER MOSFET SURFACE MOUNT (SMD-2) REF: MIL-PRF-19500/673 5 TECHNOLOGY Product Summary Part Number Radiation Level IRHNA57160 100K Rads (Si) RDS(on) 0.012Ω IRHNA53160 300K Rads (Si) 0.012Ω 75*A JANSF2N7469U2 IRHNA54160 600K Rads (Si) 0.012Ω 75*A JANSG2N7469U2 0.013Ω 75*A JANSH2N7469U2 IRHNA58160 1000K Rads (Si) ID QPL Part Number 75*A JANSR2N7469U2 SMD-2 International Rectifier’s R5 TM technology provides high performance power MOSFETs for space applications. These devices have been characterized for Single Event Effects (SEE) with useful performance up to an LET of 80 (MeV/(mg/cm2)). The combination of low RDS(on) and low gate charge reduces the power losses in switching applications such as DC to DC converters and motor control. These devices retain all of the well established advantages of MOSFETs such as voltage control, fast switching, ease of paralleling and temperature stability of electrical parameters. Features: n n n n n n n n n Single Event Effect (SEE) Hardened Ultra Low RDS(on) Low Total Gate Charge Simple Drive Requirements Ease of Paralleling Hermetically Sealed Surface Mount Ceramic Package Light Weight Absolute Maximum Ratings Pre-Irradiation Parameter ID @ VGS = 12V, TC = 25°C ID @ VGS = 12V, TC = 100°C IDM PD @ TC = 25°C VGS EAS IAR EAR dv/dt TJ T STG Continuous Drain Current Continuous Drain Current Pulsed Drain Current À Max. Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Á Avalanche Current À Repetitive Avalanche Energy À Peak Diode Recovery dv/dt  Operating Junction Storage Temperature Range Pckg. Mounting Surface Temp. Weight Units 75* 69 300 250 2.0 ±20 363 75 25 6.0 -55 to 150 A W W/°C V mJ A mJ V/ns o C 300 (for 5s) 3.3 (Typical) g * Current is limited by package For footnotes refer to the last page www.irf.com 1 06/09/04 IRHNA57160, JANSR2N7469U2 Pre-Irradiation Electrical Characteristics @ Tj = 25°C (Unless Otherwise Specified) Parameter Min Drain-to-Source Breakdown Voltage 100 — — V — 0.115 — V/°C — — 0.012 Ω 2.0 42 — — — — — — 4.0 — 10 25 V S( ) ∆BV DSS /∆T J Temperature Coefficient of Breakdown Voltage RDS(on) Static Drain-to-Source On-State Resistance VGS(th) Gate Threshold Voltage g fs Forward Transconductance IDSS Zero Gate Voltage Drain Current Typ Max Units µA IGSS IGSS Qg Q gs Q gd td(on) tr td(off) tf LS + LD Gate-to-Source Leakage Forward Gate-to-Source Leakage Reverse Total Gate Charge Gate-to-Source Charge Gate-to-Drain (‘Miller’) Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Inductance — — — — — — — — — — — — — — — — — — — 4.0 100 -100 160 55 65 35 125 75 50 — Ciss C oss C rss Input Capacitance Output Capacitance Reverse Transfer Capacitance — — — 6440 1660 60 — — — Test Conditions VGS = 0V, ID = 1.0mA Reference to 25°C, I D = 1.0mA VGS = 12V, ID = 69A Ã Ω BVDSS nA nC VDS = VGS, ID = 1.0mA VDS ≥ 15V, IDS = 69A à VDS= 80V ,VGS=0V VDS = 80V, VGS = 0V, TJ = 125°C VGS = 20V VGS = -20V VGS =12V, ID = 45A VDS = 50V VDD = 50V, ID = 45A, VGS =12V, RG = 2.35Ω ns nH Measured from the center of drain pad to center of source pad pF VGS = 0V, VDS = 25V f = 1.0MHz Source-Drain Diode Ratings and Characteristics Parameter Min Typ Max Units IS ISM Continuous Source Current (Body Diode) Pulse Source Current (Body Diode) À — — — — 75* 300 A VSD t rr Q RR Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge — — — — — — 1.2 300 2.2 V nS µC ton Forward Turn-On Time Test Conditions Tj = 25°C, IS = 75A, VGS = 0V à Tj = 25°C, IF = 45A, di/dt ≤ 100A/µs VDD ≤ 25V à Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD. * Current is limited by package Thermal Resistance Parameter RthJC RthJ-PCB Junction-to-Case Junction-to-PC board Min Typ Max — — — 1.6 0.5 — Units °C/W Test Conditions soldered to a 2 square copper-clad board Note: Corresponding Spice and Saber models are available on International Rectifier Web site. For footnotes refer to the last page 2 www.irf.com Radiation Characteristics IRHNA57160, JANSR2N7469U2 International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability. The hardness assurance program at International Rectifier is comprised of two radiation environments. Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-3 package. Both pre- and post-irradiation performance are tested and specified using the same drive circuitry and test conditions in order to provide a direct comparison. Table 1. Electrical Characteristics @ Tj = 25°C, Post Total Dose Irradiation ÄÅ Parameter BVDSS VGS(th) IGSS IGSS IDSS RDS(on) RDS(on) VSD Up to 600K Rads(Si)1 1000K Rads (Si)2 Units Min Max Min Max Drain-to-Source Breakdown Voltage Gate Threshold Voltage Gate-to-Source Leakage Forward Gate-to-Source Leakage Reverse Zero Gate Voltage Drain Current Static Drain-to-Source à On-State Resistance (TO-3) Static Drain-to-Source à On-State Resistance (SMD-2) Diode Forward Voltage à Test Conditions 100 2.0 — — — — — 4.0 100 -100 10 0.013 100 1.5 — — — — — 4.0 100 -100 25 0.014 µA Ω VGS = 0V, ID = 1.0mA VGS = VDS, ID = 1.0mA VGS = 20V VGS = -20 V VDS =80V, VGS =0V VGS = 12V, ID = 45A — 0.012 — 0.013 Ω VGS = 12V, ID = 45A — 1.2 — 1.2 V VGS = 0V, IS = 45A V nA 1. Part numbers IRHNA57160 ( JANSR2N7469U2 ), IRHNA53160 ( JANSF2N7469U2 ) and IRHNA54160 ( JANSG2N7469U2 ) 2. Part number IRHNA58160 ( JANSH2N7469U2 ) International Rectifier radiation hardened MOSFETs have been characterized in heavy ion environment for Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2. Table 2. Single Event Effect Safe Operating Area Ion Br I Au LET MeV/(mg/cm2)) 36.7 59.8 82.3 VDS (V) Range (µm) @VGS=0V @VGS=-5V @VGS=-10V @VGS=-15V @VGS=-20V 39.5 100 100 100 100 100 32.5 100 100 100 35 25 28.4 100 100 80 25 — Energy (MeV) 309 341 350 120 VGS 100 80 Br 60 I 40 Au 20 0 0 -5 -10 -15 -20 VDS Fig a. Single Event Effect, Safe Operating Area For footnotes refer to the last page www.irf.com 3 IRHNA57160, JANSR2N7469U2 1000 Pre-Irradiation 1000 VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V BOTTOM 5.0V 100 100 5.0V 10 5.0V 10 20µs PULSE WIDTH TJ = 25 °C 1 0.1 1 10 2.0 V DS = 50V 15 25V WIDTH 20µs PULSE 6.0 7.0 8.0 9.0 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics 4 RDS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) TJ = 25 ° C 10 100 Fig 2. Typical Output Characteristics 1000 100 1 VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics TJ = 150 ° C 20µs PULSE WIDTH TJ = 150 °C 1 0.1 100 VDS , Drain-to-Source Voltage (V) 10 5.0 VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V BOTTOM 5.0V TOP I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) TOP ID = 75A 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = 12V 0 20 40 60 80 100 120 140 160 TJ , Junction Temperature( °C) Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com IRHNA57160, JANSR2N7469U2 Pre-Irradiation VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd C, Capacitance (pF) 8000 Ciss 6000 Coss 4000 2000 20 VGS , Gate-to-Source Voltage (V) 10000 ID = 45A 75A VDS = 80V VDS = 50V VDS = 20V 16 12 8 4 Crss 0 1 10 0 100 FOR TEST CIRCUIT SEE FIGURE 13 0 80 120 160 200 Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 1000 ISD , Reverse Drain Current (A) 40 QG , Total Gate Charge (nC) VDS , Drain-to-Source Voltage (V) 1000 OPERATION IN THIS AREA LIMITED BY R DS(ON) ID, Drain Current (A) 100 100 TJ = 150 ° C 10 TJ = 25 ° C 100us 10 1ms 1 Tc = 25°C Tj = 150°C Single Pulse V GS = 0 V 0.1 0.2 0.6 1.0 1.4 VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage www.irf.com 10ms 1 1.8 1 10 100 1000 VDS, Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area 5 IRHNA57160, JANSR2N7469U2 Pre-Irradiation 120 RD VDS LIMITED BY PACKAGE VGS 100 D.U.T. ID , Drain Current (A) RG + -V DD 80 VGS Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 60 40 Fig 10a. Switching Time Test Circuit VDS 20 0 90% 25 50 75 100 125 150 TC , Case Temperature ( °C) Fig 9. Maximum Drain Current Vs. Case Temperature 10% VGS td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 1 D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM 0.01 t1 t2 0.001 0.00001 Notes: 1. Duty factor D = t1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 6 www.irf.com IRHNA57160, JANSR2N7469U2 Pre-Irradiation 15V L VDS D.U.T. RG VGS 20V IAS DRIVER + - VDD 0.01Ω tp Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS A EAS , Single Pulse Avalanche Energy (mJ) 750 TOP 600 BOTTOM ID 34A 47A 75A 450 300 150 0 25 50 75 100 125 Starting TJ , Junction Temperature ( °C) 150 tp Fig 12c. Maximum Avalanche Energy Vs. Drain Current I AS Current Regulator Same Type as D.U.T. Fig 12b. Unclamped Inductive Waveforms 50KΩ QG 12 V QGS .3µF D.U.T. QGD + V - DS VGS VG 3mA Charge Fig 13a. Basic Gate Charge Waveform www.irf.com 12V .2µF IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit 7 IRHNA57160, JANSR2N7469U2 Pre-Irradiation Footnotes: À Repetitive Rating; Pulse width limited by maximum junction temperature. Á VDD = 50V, starting TJ = 25°C, L= 0.13mH Peak IL = 75A, VGS = 12V  ISD ≤ 75A, di/dt ≤ 340A/µs, VDD ≤ 100V, TJ ≤ 150°C à Pulse width ≤ 300 µs; Duty Cycle ≤ 2% Ä Total Dose Irradiation with VGS Bias. 12 volt VGS applied and V DS = 0 during irradiation per MIL-STD-750, method 1019, condition A. Å Total Dose Irradiation with VDS Bias. 80 volt VDS applied and V GS = 0 during irradiation per MlL-STD-750, method 1019, condition A. Case Outline and Dimensions — SMD-2 IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 IR LEOMINSTER : 205 Crawford St., Leominster, Massachusetts 01453, USA Tel: (978) 534-5776 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. Data and specifications subject to change without notice. 06/2004 8 www.irf.com