PD - 96011A
IRF7805ZPbF
HEXFET® Power MOSFET
Applications
l High Frequency Point-of-Load
Synchronous Buck Converter for
Applications in Networking &
Computing Systems.
l
VDSS
:
Qg (typ.)
30V 6.8m @VGS = 10V
Lead-Free
Benefits
l Very Low RDS(on) at 4.5V VGS
l Ultra-Low Gate Impedance
l Fully Characterized Avalanche Voltage
and Current
l 100% tested for Rg
RDS(on) max
18nC
A
A
D
S
1
8
S
2
7
D
S
3
6
D
G
4
5
D
SO-8
Top View
Absolute Maximum Ratings
Max.
Units
VDS
Drain-to-Source Voltage
Parameter
30
V
VGS
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
± 20
ID @ TA = 25°C
16
IDM
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
120
2.5
ID @ TA = 70°C
f
f
PD @TA = 25°C
Power Dissipation
PD @TA = 70°C
Power Dissipation
TJ
Linear Derating Factor
Operating Junction and
TSTG
Storage Temperature Range
A
12
c
W
1.6
0.02
-55 to + 150
W/°C
°C
Thermal Resistance
Parameter
RθJL
RθJA
g
Junction-to-Ambient fg
Junction-to-Drain Lead
Notes through
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Typ.
Max.
Units
–––
20
°C/W
–––
50
are on page 10
1
06/30/05
IRF7805ZPbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
BVDSS
∆ΒVDSS/∆TJ
RDS(on)
Min. Typ. Max. Units
30
–––
–––
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
–––
–––
0.023
5.5
–––
6.8
V/°C Reference to 25°C, ID = 1mA
mΩ VGS = 10V, ID = 16A
Gate Threshold Voltage
–––
1.35
7.0
–––
8.7
2.25
VGS = 4.5V, ID = 13A
VDS = VGS, ID = 250µA
IDSS
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
–––
–––
- 4.7
–––
–––
1.0
IGSS
Gate-to-Source Forward Leakage
–––
–––
–––
–––
150
100
nA
VDS = 24V, VGS = 0V, TJ = 125°C
VGS = 20V
Gate-to-Source Reverse Leakage
Forward Transconductance
–––
64
–––
–––
-100
–––
S
VGS = -20V
VDS = 15V, ID = 12A
Total Gate Charge
Pre-Vth Gate-to-Source Charge
–––
–––
18
4.7
27
–––
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
–––
–––
1.6
6.2
–––
–––
Qgodr
Qsw
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
–––
–––
5.5
7.8
–––
–––
Qoss
Output Charge
–––
10
–––
nC
RG
td(on)
tr
Gate Resistance
Turn-On Delay Time
Rise Time
–––
–––
–––
1.0
11
10
2.1
–––
–––
Ω
td(off)
tf
Turn-Off Delay Time
Fall Time
–––
–––
14
3.7
–––
–––
ns
Clamped Inductive Load
Ciss
Coss
Input Capacitance
Output Capacitance
–––
–––
2080
480
–––
–––
pF
VGS = 0V
VDS = 15V
Crss
Reverse Transfer Capacitance
–––
220
–––
VGS(th)
∆VGS(th)
gfs
Qg
Qgs1
Qgs2
Qgd
V
Conditions
Drain-to-Source Breakdown Voltage
V
VGS = 0V, ID = 250µA
e
e
mV/°C
µA VDS = 24V, VGS = 0V
VDS = 15V
nC
VGS = 4.5V
ID = 12A
See Fig. 16
VDS = 16V, VGS = 0V
VDD = 15V, VGS = 4.5V
ID = 12A
e
ƒ = 1.0MHz
Avalanche Characteristics
EAS
Parameter
Single Pulse Avalanche Energy
IAR
Avalanche Current
c
d
Typ.
–––
Max.
72
Units
mJ
–––
12
A
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
IS
Continuous Source Current
–––
–––
3.1
ISM
(Body Diode)
Pulsed Source Current
–––
–––
120
VSD
(Body Diode)
Diode Forward Voltage
–––
–––
1.0
V
p-n junction diode.
TJ = 25°C, IS = 12A, VGS = 0V
trr
Qrr
Reverse Recovery Time
Reverse Recovery Charge
–––
–––
29
20
44
30
ns
nC
TJ = 25°C, IF = 12A, VDD = 15V
di/dt = 100A/µs
ton
2
c
Forward Turn-On Time
MOSFET symbol
A
showing the
integral reverse
e
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRF7805ZPbF
1000
15V
10V
4.5V
3.75V
3.25V
3.0V
2.75V
BOTTOM 2.5V
100
10
1
2.5V
100
10
2.5V
20µs PULSE WIDTH
Tj = 25°C
0.1
20µs PULSE WIDTH
Tj = 150°C
1
0.01
0.1
1
10
100
0.01
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
1000
ID, Drain-to-Source Current (Α)
VGS
15V
10V
4.5V
3.75V
3.25V
3.0V
2.75V
BOTTOM 2.5V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
1000
VGS
100
T J = 150°C
10
T J = 25°C
1
2.5
3.0
VDS = 15V
20µs PULSE WIDTH
3.5
4.0
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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ID = 16A
VGS = 10V
1.5
1.0
0.5
4.5
-60 -40 -20
0
20
40
60
80 100 120 140 160
T J , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRF7805ZPbF
10000
12
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
VGS, Gate-to-Source Voltage (V)
ID= 12A
C rss = C gd
C, Capacitance (pF)
C oss = C ds + C gd
Ciss
1000
Coss
Crss
8
6
4
2
0
100
1
10
0
100
10
30
40
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000.0
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
20
QG Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
100.0
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
T J = 150°C
10.0
T J = 25°C
1.0
1msec
1
0.1
0.1
0.2
0.4
0.6
0.8
1.0
1.2
VSD, Source-toDrain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
100µsec
10
VGS = 0V
4
VDS= 24V
VDS= 15V
10
10msec
Tc = 25°C
Tj = 150°C
Single Pulse
1.0
10.0
100.0
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRF7805ZPbF
2.2
VGS(th) Gate threshold Voltage (V)
ID , Drain Current (A)
16
12
8
4
2.0
1.8
ID = 250µA
1.6
1.4
1.2
1.0
0
25
50
75
100
125
-75
150
-50
-25
0
25
50
75
100
125
150
T J , Temperature ( °C )
T J , Junction Temperature (°C)
Fig 10. Threshold Voltage Vs. Temperature
Fig 9. Maximum Drain Current Vs.
Case Temperature
Thermal Response ( Z thJA )
100
10
D = 0.50
0.20
0.10
0.05
1
0.02
0.01
τJ
0.1
R1
R1
τJ
τ1
R2
R2
R3
R3
τC
τ
τ2
τ1
τ3
τ2
τ3
τ4
τ4
Ci= τi/Ri
Ci i/Ri
0.01
Ri (°C/W)
R4
R4
τi (sec)
1.081
0.000437
12.880
0.213428
24.191
2.335
11.862
52
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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5
300
0.03
EAS, Single Pulse Avalanche Energy (mJ)
RDS(on), Drain-to -Source On Resistance ( Ω)
IRF7805ZPbF
0.02
T J = 125°C
0.01
TJ = 25°C
0.00
2.0
4.0
6.0
8.0
10.0
ID
6.0A
6.9A
BOTTOM 12A
TOP
250
200
150
100
50
0
25
VGS, Gate-to-Source Voltage (V)
50
75
100
125
150
Starting T J, Junction Temperature (°C)
Fig 12. On-Resistance Vs. Gate Voltage
Fig 13c. Maximum Avalanche Energy
Vs. Drain Current
15V
LD
VDS
L
VDS
DRIVER
+
VDD -
D.U.T
RG
VGS
20V
IAS
tp
+
V
- DD
D.U.T
A
VGS
0.01Ω
Pulse Width < 1µs
Duty Factor < 0.1%
Fig 13a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
Fig 14a. Switching Time Test Circuit
VDS
90%
10%
VGS
I AS
Fig 13b. Unclamped Inductive Waveforms
6
td(on)
tr
td(off)
tf
Fig 14b. Switching Time Waveforms
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IRF7805ZPbF
D.U.T
Driver Gate Drive
P.W.
+
+
-
-
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
V DD
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D=
Period
+
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
ISD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50KΩ
12V
.2µF
.3µF
D.U.T.
+
V
- DS
Vgs(th)
VGS
3mA
IG
ID
Current Sampling Resistors
Fig 16. Gate Charge Test Circuit
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Qgs1 Qgs2
Qgd
Qgodr
Fig 17. Gate Charge Waveform
7
IRF7805ZPbF
Power MOSFET Selection for Non-Isolated DC/DC Converters
Control FET
Synchronous FET
Special attention has been given to the power losses
in the switching elements of the circuit - Q1 and Q2.
Power losses in the high side switch Q1, also called
the Control FET, are impacted by the Rds(on) of the
MOSFET, but these conduction losses are only about
one half of the total losses.
The power loss equation for Q2 is approximated
by;
*
Ploss = Pconduction + Pdrive + Poutput
(
2
Ploss = Irms × Rds(on)
)
Power losses in the control switch Q1 are given
by;
+ (Qg × Vg × f )
Ploss = Pconduction+ Pswitching+ Pdrive+ Poutput
⎛Q
⎞
+ ⎜ oss × Vin × f + (Qrr × Vin × f )
⎝ 2
⎠
This can be expanded and approximated by;
Ploss = (Irms 2 × Rds(on ) )
⎛
Qgs 2
Qgd
⎞ ⎛
⎞
+⎜I ×
× Vin × f ⎟ + ⎜ I ×
× Vin × f ⎟
ig
ig
⎝
⎠ ⎝
⎠
+ (Qg × Vg × f )
+
⎛ Qoss
× Vin × f ⎞
⎝ 2
⎠
This simplified loss equation includes the terms Qgs2
and Qoss which are new to Power MOSFET data sheets.
Qgs2 is a sub element of traditional gate-source
charge that is included in all MOSFET data sheets.
The importance of splitting this gate-source charge
into two sub elements, Qgs1 and Qgs2, can be seen from
Fig 16.
Qgs2 indicates the charge that must be supplied by
the gate driver between the time that the threshold
voltage has been reached and the time the drain current rises to Idmax at which time the drain voltage begins to change. Minimizing Qgs2 is a critical factor in
reducing switching losses in Q1.
Qoss is the charge that must be supplied to the output capacitance of the MOSFET during every switching cycle. Figure A shows how Qoss is formed by the
parallel combination of the voltage dependant (nonlinear) capacitances Cds and Cdg when multiplied by
the power supply input buss voltage.
8
*dissipated primarily in Q1.
For the synchronous MOSFET Q2, Rds(on) is an important characteristic; however, once again the importance of gate charge must not be overlooked since
it impacts three critical areas. Under light load the
MOSFET must still be turned on and off by the control IC so the gate drive losses become much more
significant. Secondly, the output charge Qoss and reverse recovery charge Qrr both generate losses that
are transfered to Q1 and increase the dissipation in
that device. Thirdly, gate charge will impact the
MOSFETs’ susceptibility to Cdv/dt turn on.
The drain of Q2 is connected to the switching node
of the converter and therefore sees transitions between ground and Vin. As Q1 turns on and off there is
a rate of change of drain voltage dV/dt which is capacitively coupled to the gate of Q2 and can induce
a voltage spike on the gate that is sufficient to turn
the MOSFET on, resulting in shoot-through current .
The ratio of Qgd/Qgs1 must be minimized to reduce the
potential for Cdv/dt turn on.
Figure A: Qoss Characteristic
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IRF7805ZPbF
SO-8 Package Outline
Dimensions are shown in millimeters (inches)
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IRF7805ZPbF
SO-8 Tape and Reel
Dimensions are shown in millimeters (inches)
TERMINAL NUMBER 1
12.3 ( .484 )
11.7 ( .461 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES:
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
330.00
(12.992)
MAX.
14.40 ( .566 )
12.40 ( .488 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
Notes:
Repetitive rating; pulse width limited by
max. junction temperature.
Starting TJ = 25°C, L = 0.94mH
RG = 25Ω, IAS = 12A.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
When mounted on 1 inch square copper board
Rθ is measured at TJ approximately 90°C
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualifications Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.06/05
10
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