Voltage Regulators
AN8038, AN8038S
The AN8038 and AN8038S are self-excited AC-DC
switching power supply control IC that adopt RCC local
resonance control. These ICs are designed to achieve high
efficiency over a wide range of loads (light loads at the
standby mode to heavy loads) for improved conformance
with energy conservation laws, and support input levels
used worldwide. They are particularly appropriate for use
in AV and OA equipments.
8
2
7
3
6
4
5
0.51 min.
3.8±0.25
6.3±0.3
1.2±0.25
1
0.5±0.1
Unit: mm
2.54
■ Overview
AN8038
9.4±0.3
AC-DC switching power supply control IC
with RCC local resonance circuit for
improved conformance with
energy conservation laws
(3.45)
+0.1
3° to 15°
0.15–0.05
7.62±0.25
DIP008-P-0300B
■ Features
Unit: mm
0.15±0.10
(1.05)
0° to10°
0.50±0.20
1.45±0.10
1.75 max.
4.30±0.20
6.40±0.20
AN8038S
5.01±0.20
• Supports improved conformance with energy conser8
5
vation laws by providing two operating modes.
With external resistors, it is possible to set the operating
point at which the modes change over according to the
load power, as shown below.
1.Continuous (RCC) mode
1
4
High efficiency achieved with local resonance operation (zero cross detection).
2.Discontinuous mode (standby) mode
Reduced switching loss and standby power due to re(0.60)
1.27
0.40
duced frequency
0.10
Seating plane
• Input voltage correction function. This function corrects
SOP008-P-0225C
the maximum on-period in a manner inversely proportional to the input voltage.
• Built-in overvoltage protection function (detects at VCC pin)
• Pulse-by-pulse overcurrent protection function (single detection per one cycle)
• Packages: 8-pin DIP ··· AN8038
8-pin SOP ··· AN8038S
+0.10
–0.05
■ Applications
• Facsimiles and other OA equipment
• Printers and other personal computer peripheral equipment
• AV equipment
1
AN8038, AN8038S
Voltage Regulators
8
VCC
■ Block Diagram
OVP
OVP
INIT
R
S (SD latch)
Q
Start
Stop
VREF
7V
7V
Current
reviser (IFB)
RSTB
2
Q
Q
17.5
kΩ
4
Q
I/V
conv.
Out
GND
High-side
clamp
TOFF
Current
reviser (ITR)
RQ
S
(TR latch)
1
1.0 V
Q
S
R
5
R
− 0.2 V
0.25 V
CF
3
Low-side
clamp
CF
latch
VFB
4.2 V
2
6
Q
Q
TON
TR
In
Out
drive
17.5
kΩ
IFB
7
In
CLM
Voltage Regulators
AN8038, AN8038S
■ Pin Descriptions
Pin No. Symbol
Description
1
TR
Transformer reset. When a transformer reset is detected, i.e., a low level is input to this pin, the IC
output goes high.
However, the transformer reset signal is ignored during the minimum off-period determined by
the CF pin. The maximum on-period is also corrected according to the current flowing out of this
pin.
2
RSTB
Adjusts the light-load detection level that determines the when the IC switches from RCC to
discontinuous operation. When the voltage (VFB) which is I-V conversion of current feedback
signal from IFB pin goes up higher than this pin, minimum off-period current at CF pin decreases,
and operating frequency decreases.
The detection level can be adjusted arbitrarily using an external pull-down resistor.
3
CF
Connection for the capacitor that determines the on and off periods for the IC output (Out).
4
IFB
Input for the current feedback signal from the power supply output photocoupler
5
CLM
Input of the pulse-by-pulse overcurrent protection circuit. Normally, it will be necessary to add
an external filter for this input.
6
GND
Ground
7
VOUT
Output to drive a power MOSFET directly
8
VCC
Power supply. This pin watches VCC , and has operating threshold voltages for the start, stop,
OVP, and OVP reset levels.
■ Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
Supply voltage
VCC
28
V
Peak output current
IOP
−1, +2
A
PD (Ta = 25°C)
500
mW
(Independent IC
PD (Ta = 85°C)
260
without a heat sink) AN8038S
PD (Ta = 25°C)
306 *1
PD (Ta = 85°C)
122 *2
Operating temperature
Topr
−30 to +85
°C
Storage temperature
Tstg
−55 to +150
°C
Power dissipation
AN8038
Note) *1: When mounted on a printed circuit board: 477 mW
*2: When mounted on a printed circuit board: 191 mW
■ Recommended Operating Range
Parameter
Supply voltage
Symbol
Range
Unit
VCC
From the stop voltage to the OVP operating voltage
V
3
AN8038, AN8038S
Voltage Regulators
■ Electrical Characteristics at VCC = 18 V, Ta = 25°C
Parameter
Symbol
Low voltage protection (U.V.L.O.)
initial startup supply voltage.
Min
Typ
Max
Unit
Start VCC
12.9
14.4
15.9
V
Low voltage protection (U.V.L.O.)
operation stop supply voltage
Stop VCC
8.0
8.9
9.8
V
Overvoltage protection (OVP)
operating supply voltage
OVP VCC
18.7
20.5
22.3
V
Overvoltage protection (OVP)
release supply voltage
OVPC VCC
6.6
7.5
8.4
V
Overvoltage protection (OVP)
operating time circuit current 1
OVP ICC1
VCC = 22 V → 10 V
0.4
0.53
0.66
mA
Overvoltage protection (OVP)
operating time circuit current 2
OVP ICC2
VCC = 22 V → 18 V
1.3
1.7
2.1
mA
0.15
0.25
0.35
V
1.2
1.5
1.8
V
0
V
Transformer reset detection (TR)
threshold voltage
TR VTH
Transformer reset detection (TR)
upper limit clamp voltage
TR VCLH
ITR = 1 mA
Transformer reset detection (TR)
lower limit clamp voltage
TR VCLL
ITR = −1 mA
Transformer reset detection (TR)
pin source current
TR ITR
VTR = 0.5 V
− 0.3 − 0.15
−5
0
µA
−225
−205
−185
mV
Overcurrent protection (CLM)
threshold voltage
CLM VTH
Oscillator (CF) maximum
on-period current gain
CF GION
IFB = Open
0.8
1.0
1.2
Oscillator (CF) maximum
on-period current
CF ION
ITR = 0 mA
210
280
350
µA
Oscillator (CF) minimum
off-period current 1
CF IOFF1
IIFB = − 0.7 mA
−1 560 −1 250 −940
µA
Oscillator (CF) minimum
off-period current 2
CF IOFF2
IIFB = −1.3 mA
−70
−55
−40
µA
CF = 1 000 pF, ITR = −450 µA
IIFB = − 0.5 mA
105
140
175
kHz
Output oscillator frequency
fOSC
Standby pin (RSTB) voltage
VRSTB
3.2
3.5
3.8
V
RSTB VTH
0.3
0.5
0.7
V
IIFB = − 0.7 mA
5
5.6
6.2
V
Standby operation (RSTB)
threshold voltage
Current feedback pin (IFB) voltage
VIFB
Pre-startup low-level output voltage
STB VOL
VCC = 12 V
1.0
1.25
V
Low-level output voltage
VOL
IOUT = 0.2 A
0.9
2.0
V
High-level output voltage
VOH
IOUT = − 0.1 A
15.5
16.3
V
120
190
280
µA
Circuit current during startup 1
4
Conditions
ISTART1
Circuit current 1
OPR1 ICC1
VCC = 10 V
6.1
8.7
11.3
mA
Circuit current 2
OPR2 ICC2
VCC = 18 V
6.4
9.1
11.8
mA
Voltage Regulators
AN8038, AN8038S
■ Electrical Characteristics at VCC = 18 V, Ta = 25°C (continued)
• Design Reference Data
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
Parameter
Symbol
Low-voltage protection (U.V.L.O.)
Conditions
Min
Typ
Max
Unit
∆VCC
5.4
V
Transformer reset (TR) detection
threshold hysteresis width
TR ∆VTH
0.1
V
Oscillator (CF) upper limit voltage
VCLH
IIFB = − 0.5 mA, CF = 1 000 pF
4.2
V
Oscillator (CF) lower limit voltage 1
VCFL1
IIFB = − 0.5 mA, CF = 1 000 pF
1.0
V
Oscillator (CF) lower limit voltage 2
VCFL2
IIFB = − 0.2 mA, CF = 1 000 pF
0.1
V
Maximum on-period
tON(max)
IIFB = − 0.2 mA, CF = 1 000 pF
VTR = 0.1 V
12
µs
Minimum off-period 1
tOFF(min)1
IIFB = − 0.2 mA, CF = 1 000 pF
VTR = 0.1 V
2.6
µs
Minimum off-period 2
tOFF(min)2
IIFB = −1.3 mA, CF = 1 000 pF
ITR = −450 µA
67
µs
fOSC2
IIFB = −1.3 mA, CF = 1 000 pF
ITR = −450 µA
15
kHz
start/stop supply voltage difference
Light-load oscillator frequency
Output rise time
tr
10% to 90%, IOUT = 0 mA
40
ns
Output fall time
tf
10% to 90%, IOUT = 0 mA
20
ns
tTR
400
ns
tCLM
100
ns
100
190
300
µA
TR output response time
CLM output response time
Circuit current during startup 2
ISTART2
Ta = −30°C to +85°C
■ Terminal Equivalent Circuits
Pin No.
Equivalent Circuit
1
VREF
7V
TR
1
High-side Low-side
clamp
clamp
Description
I/O
TR:
Transformer reset detection input.
When a transformer reset is detected, i.e., a low
level is input to this pin, the IC output goes high.
However, the transformer reset signal is ignored
if the signal is shorter than the minimum offperiod determined by the CF pin. Also note that
the maximum on-period is corrected according
to the source current.
I
5
AN8038, AN8038S
Voltage Regulators
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent Circuit
2
VREF
17.5 kΩ
RSTB
2
Comp.
CF
3
17.5 kΩ
VREF
IOFF
Comp.
VFB
ION
3
CF
4
VREF
×1
×5
VFB
20 kΩ
1 kΩ
Description
I/O
RSTB:
Adjusts the light-load detection level that determines the time when the IC switches from RCC
to discontinuous operation. When the voltage
which is I-V conversion of current feedback signal goes up higher than this pin, operating frequency is reduced.
An arbitrary level can be set by inserting an
external pull-down resistor.
CF:
Connection for the capacitor that determines the
on- and off-periods of the IC output (Out).
The on- and off-periods are corrected by ION
which is proportional to the flowing out current at the TR pin, and IOFF which corresponds
to the current at IFB pin.
IFB:
Connection for the photocoupler used for the
power supply output error-voltage feedback.
This input can decrease the photocoupler dark
current by about 250 µA.
I
CLM:
Input to the pulse-by-pulse overcurrent protection circuit. Normally, we recommend adding
an external filter for this input.
I
4
IFB
5
VREF
Comp.
5
CLM
6
6
GND
6
GND:
IC ground.
Voltage Regulators
AN8038, AN8038S
■ Terminal Equivalent Circuits (continued)
Pin No.
7
Equivalent Circuit
VCC
7
VOUT
8
VCC
8
Description
I/O
VOUT:
Output used to directly drive a power MOSFET.
A totem pole structure is adopted in this output
circuit.
The absolute maximum ratings for the output
current are:
Peak: +2 A, −1 A
DC: +200 mA, −100 mA
I
VCC:
Power supply.
This pin monitors supply voltage and has the
threshold for the start, stop, OVP, and OVP
reset levels.
■ Usage Notes
The circuit current during startup is set to a low level to minimize power loss due to the startup resistor. However,
VCC ripple caused by the power transistor switching on and off may result in incorrect operation of the U.V.L.O. circuit
and failure to start.
The figure shows the allowable range for VCC ripple. Insert a capacitor near the IC's VCC and GND pins to reduce
VCC ripple so that it remains within the allowable range.
Allowable VCC ripple range
3
VCC ripple amplitude (V[p-p])
2.5
2
1.5
Recommended
operating range
1
0.6
0.5
0
10
70 100
300
1 000
10 000
VCC ripple frequency (kHz)
7
AN8038, AN8038S
Voltage Regulators
■ Application Notes
[1] Timing charts
• Circuit diagram
(E)
(F)
TR
(B)
CF
VCC
Out
CLM
(A)
(D)
(C)
(G)
• Normal control waveforms
(A) Bias winding voltage
0V
Off
(B) TR pin voltage
On
Off
On
On
Off
Off
0V
Input voltage correction
EIN: large, tON: short
tON cannot be accepted
during tOFF(min).
(C) CF pin voltage 4.2 V
VFB voltage
VRSTB
Can be modified
with an external
resistor.
0V
IFB correction
VFB: large, tOFF(min): long
(D) Out pin voltage
VCC −1.5 V
Off
On
Off
On
Off
On
Off
0V
Winding current (F) Secondary
winding current
(E) Primary
winding current
0A
Heavy
Load
Continuous (RCC) mode
8
Light
Discontinuous mode
Voltage Regulators
AN8038, AN8038S
■ Application Notes (continued)
[1] Timing charts (continued)
• During pulse-by-pulse overcurrent operation
(A) Bias winding voltage
0V
Off
On
Off
On
Off
On
Off
On
Off
On
(B) TR pin voltage
0V
(C) CF pin voltage 4.2 V
VRSTB
Can be modified
with an external
resistor.
Rapid charging
during CLM
operation
VFB voltage
0V
(D) Out pin voltage
VCC −1.5 V
Off
On
Off
On
Off
On
0V
Primary
winding
current
(E) Winding current
0A
Light
(G) CLM pin voltage
Secondary
winding
current
On-period
limitation during
CLM operation
Heavy
Load
0V
−205 mV
CLM threshold voltage
Overcurrent
detection
9
AN8038, AN8038S
Voltage Regulators
■ Application Notes (continued)
[2] Operation descriptions
After AC rectification
Startup resistor
R1
VCC
C8
GND
1. Start/stop circuit block
• Startup mechanism
After the AC voltage is applied and the
supply voltage due to the current in the startup
resistor reaches the startup voltage and the IC
begins to operate, drive of the power MOSFET
begins. This causes a bias in the transformer,
and the supply voltage is provided to the IC
from the bias winding. (This is point a in figure 1.) During the period between the point
when the startup voltage is reached, and the
point when the bias winding can generate a
voltage enough to supply the IC, the IC supply voltage is provided by the capacitor (C8)
connected to VCC . Since the supply voltage
falls during this period (area b in figure 1), if
the supply voltage falls below the IC stopvoltage before an adequate supply voltage can
be provided by the bias winding, it will not be
possible to start the power supply. (This is the
state at point c in figure 1.)
VOUT
Before
startup
Startup
voltage
Startup
Voltage supplied
from the bias
winding
Startup state
a
Stop
voltage
b
c
Startup failure
Figure 1
• Functions
This IC includes a function that monitors the VCC voltage. It starts IC operation when VCC reaches the startup
voltage (14.4 V typical), and stops operation when the voltage falls below the stop voltage (8.9 V typical). Since
a large voltage difference (5.5 V typical) is taken between the start and stop voltages, it is easy to select values for
the start resistor and the capacitor connected to VCC .
Since high voltages are applied across the startup resistor, measures must be taken to minimize the current that
flows in this resistor. (To use a smaller startup resistor.) To achieve this, the circuit current at startup is set to as
small as 190 µA (typical), and temperature variations, and also sample-to-sample variations are reduced as well.
Since the bias current is reduced, the capacitor connected to VCC can be miniaturized as well.
2. Oscillator circuit
The oscillator circuit determines the pulse width with which the main switch is turned on and off using the
charge and discharge of the capacitor CCF connected to the CF pin (pin 3). This IC implements a control scheme
in which the main switch on-period is the discharge period of the CF pin waveform, and the off-period is the
charge period of that waveform.
Constant-voltage control in a switching power supply using this IC is implemented during RCC (continuous)
operation by holding the main switch off-period fixed and varying the on-period. This on-period is controlled by
directly varying the output pulse-width of the oscillator circuit.
Additionally, the IC reduces the maximum on-period when the input voltage increases by detecting the input
voltage through the flowing out current at the TR pin. (See figure 2.)
Furthermore, this IC features an added function that detects increases of the IFB feedback current, and reduces
the off period, and lowers the operating frequency to reduce power loss during standby (light load) mode and to
prevent being out of control.
During overcurrent protection operation, the IC performs a rapid discharge operation where the CLM pin
voltage reaches the threshold voltage of −205 mV (typical).
10
Voltage Regulators
AN8038, AN8038S
■ Application Notes (continued)
[2] Operation descriptions (continued)
2. Oscillator circuit (continued)
tON is reduced since ITR
increases when EIN is large.
RTR2
ITR
EIN+
NP
RTR1
NB
TR
IFB
20 kΩ
VCC
Out
ITR
VFB
280 µA
typ.
ION
GND
CF
PC
Current mirror
5:1
Current mirror
1:1
ITR = ION
CCF
CF pin voltage
4.2 V
EIN−
Input voltage correction
EIN: larger
→ On-period: shorter
Control switching voltage VRSTB
Output monitoring voltage VFB
0V
VCC − 1.5 V
Out pin voltage
0V
On-period
Off-period
Figure 2. On-period block diagram and control waveforms
11
AN8038, AN8038S
Voltage Regulators
■ Application Notes (continued)
[2] Operation descriptions (continued)
2. Oscillator circuit (continued)
• Notes on switching from RCC operation to discontinuous operation
When the state changes from normal load to standby mode, the post-I-V conversion output monitor voltage VFB
increases along with the increase of the amount of feedback current. Then, when the IFB pin feedback current
exceeds 1 mA (typical) and the VFB voltage becomes larger than the RSTB pin (pin 2) voltage, the minimum offperiod current that is from the CF pin lower limit value until the RSTB pin voltage is reached, is rapidly reduced,
and the operating frequency is lowered. (See figure 3.) This allows the switching loss to be reduced to the minimum, and allows the standby mode power to be reduced.
Furthermore, the RSTB pin voltage, which is operating point for switching from RCC operation to
discontinuous operation, is set by resistor-division of the internal 7 V reference voltage to a typical value of 3.5 V.
This value can be adjusted by connecting an external pull-down resistor, and this can be used to suppress increases of the minimum off-period.
Note that application designs must take into account the sample-to-sample variations of ±15% in the internal
resistors and temperature coefficient of 2 400 ppm/°C.
Allows the
control switching
operating point
17.5 kΩ
to be lowered.
RSTB
7V
Comp.
NB
17.5 kΩ
IFB
PC
VCC
Out
Current mirror
5:1
VFB
GND
IOFF = 1250 µA typ.
(IIFB < 1 mA)
IOFF = 55 µA typ.
(IIFB > 1 mA)
IOFF
EIN−
CF
20 kΩ
NP
EIN+
7V
CCF
a) Normal control - heavy load (IIFB < 1 mA)
4.2 V
b) Standby (IIFB > 1 mA)
4.2 V
CF pin voltage
VFB
CF pin voltage
VRSTB
VRSTB
VFB
0.2 V
0V
0.2 V
0V
VCC −1.5 V
VCC −1.5 V
Out pin voltage
tOFF(min)
tOFF
0V
On
Out pin voltage
tOFF(min)
tOFF
0V
Figure 3. Off-period block diagram and control waveforms
12
The minimum off-period
current is reduced
when VFB ≥ VRSTB .
tOFF (min): large
On
Voltage Regulators
AN8038, AN8038S
■ Application Notes (continued)
[2] Operation descriptions (continued)
2. Oscillator circuit (continued)
• Notes on setting the oscillator frequency
This section describes the calculation of the on- and off-periods.
1) On-period: tON
The output on-period is the discharge period when the CF pin is between the peak value of VCFH = 4.2
V (typical) and VFB .
The following formula can be used to calculate the on-period of the power MOSFET as a reasonable
approximation. (See figure 2.)
tON = CCF × (VCFH − VFB) / ION
Here,
VCFH = 4.2 V typ.
ION = ITR + 280 µA typ.
ITR = (EIN × NB/NP) / (RTR1 + RTR2)
VFB = 0.7 V typ.
(When IIFB ≤ 250 µA)
VFB = 4 kΩ × (IIFB − 250 µA) + 0.7 V
(When IIFB > 250 µA)
2) Off-period: tOFF
The minimum off-period is the charging period from VCFL = 0.2 V (typical) to VRSTB .
The following formula can be used to calculate the minimum off-period as a reasonable approximation.
(See figure 3.)
tOFF(min) = CCF × {VRSTB − VCFL} / IOFF
IOFF1 = 1250 µA typ. (VFB 0.7 V typ. to VRSTB)
IOFF2 = 55 µA typ.
(VFB VRSTB to 4.2 V typ.)
: On-period
: Minimum off-period
: Capacitance of the capacitor connected to the CF pin
: Upper limit voltage for the CF pin.
VCFH = 4.2 V typ.
: Lower limit voltage for the CF pin
: Pin voltage that sets the light load detection level. VRSTB = 3.5 V typ.
This voltage can be adjusted with an external resistor.
VFB
: Value that results from IC internal conversion of feedback current IIFB
ION
: On-period (CF pin discharge) current
IOFF1
: Off-period (CF pin charge) current when IIFB < 1 mA
IOFF2
: Off-period (CF pin charge) current when IIFB > 1 mA
ITR
: Flowing current at TR pin
EIN
: Primary winding voltage
NB
: Number of turns in the bias winding
NP
: Number of turns in the primary winding
RTR1/RTR2 : Resistors connected to the TR pin
tON
tOFF(min)
CCF
VCFH
VCFL
VRSTB
However, the off-period for the local resonance circuit described later, is determined by the time for
the voltage fed back to TR pin (pin 1) if that time is longer than the tOFF time determined by CCF .
The power MOSFET is turned on and off continuously by repeating the above operations.
13
AN8038, AN8038S
Voltage Regulators
■ Application Notes (continued)
[2] Operation descriptions (continued)
3. Local resonance operation (power MOSFET turn on delay circuit)
The AN8038 and AN8038S transformer reset detection functions detect a low-level input to the TR pin. (This
is similar to earlier Panasonic ICs, in particular the AN8026, AN8027, AN8028, and AN8029.)
Local resonance operation is possible with circuits as shown in figure 4. C7 is the resonance capacitor, and R9
and C9 form a delay circuit for adjusting the power MOSFET turn on time.
When the power MOSFET is off, the voltage that occurs in the drive winding is input to the TR pin (pin 1)
through R9 and C9. The power MOSFET will be held in the off state while a high level (a level higher than the
threshold voltage, which is 0.25 V typical) is input to the TR pin.
The TR pin also has a clamping capability for upper and lower limit voltages. The upper limit voltage is clamped
at 1.5 V typical (sink current is −3 mA), and the lower limit voltage is clamped at about − 0.15 V typical (source
current: 3 mA). (See figure 5.) The power MOSFET off-period is determined by the longer period of the following two periods: the period until the TR pin input voltage becomes lower than the threshold voltage as the bias
winding voltage falls after the transformer discharges its energy, and the minimum off-period tOFF(min) stipulated
by the internal oscillator (see the description of the oscillator circuit). As a result, ringing in the bias winding does
not be regarded as a turn on signal during the minimum off-period.
NP N S
EIN+
Startup resistor
R1
DB
VCC
Lower limit clamp
Transformer reset − 0.15 V typ.
comparator
0.25 V typ.
Upper limit clamp
1.5 V typ.
Lower limit
clamp current
C7
TR
Out
R9
C9
GND
Upper limit
clamp current
EIN−
Figure 4
14
NB
VO
Voltage Regulators
AN8038, AN8038S
■ Application Notes (continued)
[2] Operation descriptions (continued)
3. Local resonance operation (power MOSFET turn on delay circuit) (continued)
• Notes on C7 value selection
Figure 5 shows the local resonance
N
VP = P VO
waveform.
NS
tPD
Select values of R9 and C9 to deterVDS
mine the delay time so that the power
VP
MOSFET is turned on at the 1/2 cycle
point in the resonant frequency waveVIN
form. Simply stated, select values so
that the power MOSFET turns on at the
0V
zero voltage point in the voltage waveform. The resonant frequency can be
1.5 V typ.
VTR
roughly determined using the follow0.25 V
ing formula.
0V
1
− 0.15 V typ.
fSYNC =
(Hz)
2π √ L · C7
tTR
C7 : Resonance capacitor
Out
L : Inductance of the transformer
primary winding
0V
Accordingly, the turn on delay time
tPD(ON) to turn on the power MOSFET
ID
at the 1/2 cycle point in the resonant
0V
frequency waveform is given by the
following formula.
Figure 5. Local resonance waveform
tPD(ON) = π √ L · C7 (s)
Furthermore, tPD(ON) should be set to be larger than tTR, since a response time tTR that is the time between
transistor detection and output changeover is about 400 ns.
Note that since insertion of the resonance capacitor C7 results in increased losses, using the parasitic
capacitance of the power MOSFET itself should also be considered. However, in this case the sample-tosample variations and temperature variations should be considered.
• Notes on R9 and C9 value selection
If an excessively low value is used for R9, the current flowing into the TR pin after power supply startup
will exceed the maximum rating for the IC, and incorrect operation (or even, in the worst case, destruction of
the device) may occur. We recommend using a value of R9 in the range that satisfies the following conditions.
VB(−) − The TR lower limit clamp voltage (− 0.15 V typical)
≥ −3 mA
R9
VB(−): The peak voltage when the voltage is negative
VB(+) − The TR upper limit clamp voltage (1.5 V typical)
≤ 3 mA
R9
VB(+): The peak voltage when the voltage is positive
NB
NB
VB(+) =
V
VB(−) = −
E
NS O
NP IN
Also, adjust tPD(ON) by changing the value of C9 in consideration of the resonance capacitance and
inductance of the transformer used.
15
AN8038, AN8038S
Voltage Regulators
■ Application Notes (continued)
[2] Operation descriptions (continued)
4. Power supply output control system (IFB: feedback)
Constant-voltage control of the power supply output is conducted by changing the on- and off-periods of the
power MOSFET. On- and off-periods are controlled as follows: a feedback current responding to the output of
output-voltage detection circuit formed at secondary output side is input to IFB pin through a photocoupler
connected to IFB pin (pin 14), and is converted to VFB voltage. (See figure 6.)
The more AC input voltage becomes higher and/or the more the load current decreases, the more the flowout
current from IFB pin increases. This makes VFB voltage higher and on-period shorter (at the standby, off-period
becomes longer). Furthermore cancellation ability is about 250 µA for the dark current of photocoupler.
Secondary side
power supply output
7V
5:1
250 µA typ.
PC
VFB
20 kΩ
At least 1 mA is
required (to bias the
AN1431T/M.)
AN1431T/M
IFB 4
This transistor
discharges the soft
start capacitance
when the IC stops.
PC
Primary side
Secondary side
Figure 6. Power supply output control system
5
VFB (V)
4
3
2
Dark current
1
0
0
− 0.2
− 0.4
− 0.6
− 0.8
−1.0
IIFB (mA)
Figure 7. Feedback current vs. VFB characteristics
16
−1.2
Voltage Regulators
AN8038, AN8038S
■ Application Notes (continued)
[2] Operation descriptions (continued)
4. Power supply output control system (IFB: feedback) (continued)
• Soft start
When a power supply is started, it starts up in an overloaded state due to the capacitor connected to the power
supply output. Since the power supply output voltage is low in this state, the normal constant-voltage control
would rise the power supply to its maximum duty ratio. Although the pulse-by-pulse overcurrent protection
circuit (CLM) would limit the current, due to filter and other delays, it cannot decrease the pulse width to
zero, and thus large currents could flow in both the main switch (the power MOSFET) and the secondary side
diode. This could result in destruction of these components in the worst case. To prevent this, soft start is used
to suppress surge currents at power supply startup.
Soft start is installed by inserting R3 and C4 between the IFB pin (pin 4) and the GND pin (pin 6) as shown
in figure 8. When the IC supply voltage reaches the startup voltage, and the start circuit operates, an open bias
(about 6.4 V) is output to the IFB pin. A charging current (IIFB) flows from the IFB pin into C4 due to this
voltage. As a result, since startup begins at relatively high VFB, output control is started from short tON. Since
the voltage across C4 rises according to the time constant determined by R3 and C4, IIFB becomes smaller with
time, and the tON time increases gradually.
Due to the above operation, the current that flows in the power MOSFET at power-on increases gradually.
As a result, surge currents are suppressed.
However, this reduces the transient response of the feedback loop, so care is required in designing this
circuit.
Rectified AC
Startup resistor
R1
VCC
C8
IFB
PC1
R3
C4
GND
Out
CLM
R8
C6
R7
To AC(−)
Figure 8
5. Output block
This IC adopts a totem pole (push-pull) structure output circuit in which NPN transistors as shown in figure 9
sinks and sources current to rapidly drive the power MOSFET which is a capacitive load.
This circuit provides maximum sink and source currents of − 0.1 A and +0.2 A (DC), and peak currents of −1 A
and +2 A. Furthermore, this circuit has a sink capability of 1 mA (typical) even when the supply voltage has fallen
under the stop voltage, and thus can turn off the power MOSFET reliably.
17
AN8038, AN8038S
Voltage Regulators
■ Application Notes (continued)
[2] Operation descriptions (continued)
5. Output block (continued)
The main requirement on the control IC in this type of power supply is the ability to provide a large peak current.
That is to say, a high average current is not required in steady state operation. This is because the power MOSFET
is a capacitive load, and while a large peak current is required to drive such a load rapidly, once the load has been
charged or discharged a much smaller current suffices to retain that state.
This IC has a guaranteed peak current capability of −1 A and +2 A, values which were determined by
considering the capacitance of the power MOSFETs that will be used.
The parasitic inductance and capacitance of
the power MOSFET can cause ringing, and pull
down the output pin below the ground level. If
the output pin goes to a negative voltage that is
larger than the voltage drop of the diode, this
state can turn on the parasitic diode formed by
the collector of the output NPN transistor and
the substrate. Insert a Schottky barrier diode between the output and ground if this is a problem. (See figure 9.)
Schottky diode
Figure 9
• Overvoltage protection circuit (OVP)
OVP stands for overvoltage protection. The overvoltage protection circuit is a self-diagnostic function that
shuts down the power supply to protect the load if a voltage that is significantly and abnormally higher than
the normal output voltage occurs in the power supply output, due to, for example, a malfunction in the control
system or an abnormal voltage applied externally. (See figure 10.)
The overvoltage detection function monitors the VCC pin voltage. Since the VCC pin voltage is normally
supplied from the transformer bias winding, this voltage is proportional to the secondary side output voltage.
Thus the overvoltage protection circuit operates when an overvoltage occurs in the secondary side output.
1) If, as a result of an abnormality in the power supply output, the voltage input to the VCC pin exceeds the
threshold value (20.5 V typical), the IC internal reference voltage is shut down, and all control operation
is stopped. The IC then holds this state.
2) The OVP circuit is released (reset) by lowering the supply voltage (VCC < 7.5 V typical). (This is the OVP
release supply voltage.)
Rectified AC
Current supply from the startup resistor
continues as long as the power supply
input voltage (AC) is applied.
Startup resistor
R1
Since output is stopped
after the OVP circuit
operates, no current is
supplied from
the bias winding.
Power supply output
RS latch
S
OVP
operating
voltage
20.5 V typ.
R Q
OVP release voltage
7.5 V typ.
Figure 10. OVP operating circuit
18
When an abnormal
voltage is applied
by some external
source.
Voltage Regulators
AN8038, AN8038S
■ Application Notes (continued)
[2] Operation descriptions (continued)
5. Output block (continued)
• Operating power supply current characteristics
When the OVP circuit operates and the power supply current drops, this can induce a rise of the supply
voltage VCC. In the worst case, it may exceed the IC's guaranteed breakdown voltage (28 V).
Therefore, the circuit is provided with characteristics that cause the supply current to rise in constant
resistance mode when the OVP circuit operates, and thus the increases of the supply voltage.
Due to these characteristics, if the
ICC
supply voltage VCC when the OVP circuit
operates is stabilized at a value (note that
1.7 mA typ.
this value depends on the value of the
startup resistor) that is larger than the OVP
release voltage (7.5 V typical), the OVP
0.53 mA typ.
circuit will not be reset as long as the AC
input is not cut. (See figure 11.) Note that
this does not apply to an external reset.
7.5 V 10 V
18 V VCC
Figure 11. OVP operating circuit current
• Overcurrent protection circuit (pulse-by-pulse overcurrent protection)
This circuit uses the fact that overcurrents in the power supply output are proportional to the current flowing
in the primary side main switch (power MOSFET). This circuit limits overcurrents in the power supply output
by constraining the upper limit of the pulse current flowing in the main switch, and thus protects components
sensitive to excessive current.
The current flowing in the main switch is detected by connecting a resistor between the power MOSFET
source and ground and monitoring the voltage that appears across that resistor. When the power MOSFET is
turned on and the CLM (current limit) threshold voltage is detected, the output is turned off. This controls the
circuit so that a current in excess of that limit cannot flow by turning off the power MOSFET. The CLM
threshold voltage is about −205 mV with respect to ground at Ta = 25°C. While this control operation is repeated
every cycle, once an overcurrent is detected, the off state is held for the remainder of that cycle, and the circuit
is not turned on until the next period. This type of overcurrent detection is called "pulse-by-pulse overcurrent
detection."
R6 and C6 in figure 12 form a
filter circuit that rejects noise generated due to the incidental equivalent
parasitic capacitance when the
power MOSFET is on.
For the grounding point, we recommend that the power MOSFET
source pin and the IC GND pin be
connected over as short a distance
as possible.
CLM
R6 R8 C6
Use a capacitor
with excellent frequency
characteristics.
GND
R7
To AC−
Use resistors with
no inductance.
Figure 12
• Notes on the detection level precision
This overcurrent detection level is reflected on the operating current level of the power supply overcurrent
protection function. Therefore, if this detection level varies with sample-to-sample variations or with temperature, the operating current level of the overcurrent protection function of the power supply itself will vary.
Since variations in this level imply a need for increased ruggedness in parts used, or even the destruction of
circuit components, we have increased the precision of this IC as much as possible.
19
AN8038, AN8038S
Voltage Regulators
■ Application Notes (continued)
[2] Operation descriptions (continued)
5. Output block (continued)
• Overcurrent protection circuit (input voltage correction function)
As an extended application, this section presents a circuit design that applies a correction so that the
overcurrent protection operating point is held fixed with respect to variations in the input voltage. This circuit
uses the proportional relationship between the input voltage and the inverted voltage of the bias winding, and
superposes inverted voltage of the bias winding on the overcurrent protection operating voltage. (See figures
13 and 14.)
EIN+
VCC
VB
GND
CLM
TR
Drs
Out
Rrs
Zrs
VCLM
Input voltage
correction
For an FB voltage: cut off
For an FF voltage:
correction operation
IDS
Determines the
input voltage at
which correction
starts.
Determines the
amount of correction
EIN−
Figure 13
VDS
0V
VB
FB voltage
0V
FF voltage
Amount of correction: larger
IDS
∝
Input voltage: larger
Input voltage
EIN
0A
0V
Correction
corresponding
to the input
voltage
VCLM
Figure 14
20
Voltage Regulators
AN8038, AN8038S
■ Application Notes (continued)
[2] Operation descriptions (continued)
6. Notes on feedback control
If the IC output pin (pin 7) falls to a negative voltage lower than that of the GND pin, the startup operation may
fail or the output oscillation may become unstable.
GND
IFB
ICs in general, not just this IC, do not respond well when negative voltages lower than the ground level are
applied to their pins. (Except for special applications.) This is because parasitic device operations may be induced
when negative voltages are applied due to the structure of ICs themselves.
In the case mentioned above, when the IC output
(VOUT) is turned off, the power MOSFET drain-toRectified AC
source voltage, VDS, jumps from a low voltage to a
high voltage. The voltage chattering that occurs at this
time is superposed on VOUT through the parasitic capacitance CGD between the power MOSFET gate and
drain, and generates a negative voltage with respect
to the pin. No problems occur if the peak voltage, VEX,
CGD
of this negative voltage does not exceed the parasitic
VDS
Out
device conduction voltage (about − 0.7 V).
However, the amplitude of the chattering is larger
for higher input voltages and for larger leakage inductance in the transformer used. Also, the influence
Figure 15
of this phenomenon becomes more noticeable for the
larger CGD of the power MOSFET used, and the VEX
peak value also increases. If the parasitic device conduction voltage is exceeded, then, in this IC, the parts
of the circuit around the feedback circuit (FB) (in parVDS
ticular, the FB discharge circuit) are influenced. This
can cause momentary drops in the IFB pin voltage
(the control voltage), and as a result increase the FB
current (IIFB) and thus does not allow the drive pulse
on-period tON to be increased. It may also prevent
VOUT
stabilization of the circuit. These are symptoms of the
GND
case described here. (See figures 15 and 16.)
VEX
[Countermeasures]
Control
If an application exhibits the symptoms of the case
pin
IFB
described above, or similar symptoms, first insert a
Figure 16
Schottky diode between VOUT and GND. It is not
possible to completely remove the mechanism described above from a power supply system. It is also not possible
to prevent levels from being pulled down to negative voltages in the control IC itself. Therefore, the most important point in designing countermeasures is to prevent such negative voltages from reaching the parasitic device
conduction voltage.
Note) If a Schottky diode is added to the circuit and the condition improves initially but the symptoms reappear when the
input voltage or other parameter is increased, try replacing the Schottky diode with one that has a larger forward current
(both peak and average values). The current capability of the Schottky diode is sometime insufficient.
Reference: Panasonic Schottky Diode
Part No.
MA2C700A (MA700A∗)
MA2C723 (MA723∗)
MA2C719 (MA719∗)
Reverse voltage
30 V
30 V
40 V
Forward current (average)
30 mA
200 mA
500 mA
Forward current (peak)
150 mA
300 mA
1A
Note) ∗: Former part number
21
AN8038, AN8038S
Voltage Regulators
■ Application Circuit Examples
• Application circuit example 1
EIN+
VOUT
CC
PC
8
AN1432MS
RSTB
2
7 Out
IFB
4
6 GND
PC
5 CLM
1
CF 3
TR
EIN−
• Application circuit example 2
∼
+
C2 C3
C1
C4
L1
C5
180 µF
C12
∼
L2
−
R1
68 kΩ
D7
15 V/0.4 A
MA3F750
(MA750∗)
R1
68 kΩ
C16
1 000 µF
D8
R8
C9
15 kΩ 0.033 µF
PC1
R16
MA3D798
(MA10798∗)
D2
0 Ω MA2C166
(MA166∗)
D11
MA2C166
(MA166∗)
C17
1 000 µF
PC1
R10
750 Ω
R11
510 Ω
C15
1.5 µF
6.0 V/0.6 A
R12
500 Ω
R14
1.8 kΩ
Q3
C10
5 CLM
6 GND
7 Out
8 VCC
100 µF
S2
MA2C700 (MA700∗)
R20
5.1 kΩ
D3
MA2C166
(MA166∗)
R5
47 Ω
4
FB
2
3
CF
RSTB
1
TR
0.015 µF
68 kΩ
S1
R13
1.5 kΩ
GND
Q2
C7
2 200 pF
C11 1 000 pF
AN1431M/T
FBI
C18
47 µF
R4
47 Ω 2SK1611
AN8038, AN8038S
MA2C700 (MA700∗)
R3
75 kΩ
D9
C6
MA3D760
(MA7D60∗)
−28 V/30 mA
R7
820 Ω
R15
51 Ω
R6
0.22 Ω
Note) ∗: Former part number
22