APW7045 Advanced PWM and Linear Power Controller Features General Description • The APW7045 integrates PWM controller and linear controller, as well as the monitoring and protection functions into a single package, which provides two controlled power outputs with over-voltage and overcurrent protections. The PWM controller regulates the DDR termination voltage (1.25V) or GPU Voltage (2.05V) with a synchronous-rectified buck converter. The linear controller regulates the Memory Voltage (2.5V). The pre cision reference and voltage-mode PWM control provide ±1% static regulation. The linear controller drives an external N-channel MOSFET to provide adjustable voltage. The APW7045 monitors two output voltages, and a single Power Good signal is issued when the PWM voltage is within ±10% of the DAC setting and the lineat regulator output level is above under-voltage threshold. Additional built-in over-voltage protection for the PWM output uses the lower MOSFET to prevent output voltages above 115% of the DAC setting. The PWM over-current function monitors the output current by using the voltage drop across the upper MOSFET’s RDS(ON), eliminating the need for a current sensing resistor. 2 Regulated Voltage are provided −Switching Power for Fixed Voltage (1.0V) −Linear Regulator for VMEM(2.5V) • Simple Single-Loop Control Design −Voltage-Mode PWM Control • Excellent Output Voltage Regulation −PWM Output: ±1% −Linear Output: ±3% • Fast Transient Response −High-Bandwidth Error Amplifier −Full 0% to 100% Duty Ratio • • • Power-Good Output Voltage Monitor Over-Voltage and Over-Current Fault Monitors Small Converter Size −200KHz Free-Running Oscillator ; Progammable from 50KHz to 800KHz −Reduce External Component Count Pin Description Applications • • • • Motherboard Power Regulation for Computers Low-Voltage Distributed Power Supplies VGA Card Power Regulation DDR SDRAM Power Regulation VC C 1 16 UG ATE DR IVE 2 15 PH AS E PG O O D 3 14 LG ATE SD 4 13 PG ND FB2 5 12 O C SE T SS 6 11 VS EN 1 FAULT 7 10 FB1 GND 8 9 CO M P ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev.A.5 - Jan., 2003 1 www.anpec.com.tw APW7045 Ordering and Marking Information V o lta g e C o d e 1 0 : 1 .0 V P ackage C ode K : S O P - 1 6 (1 5 0 m il) Tem p. R ange C : 0 to 7 0 ° C H a n d lin g C o d e T U : Tube A P W 7 04 5 H a n d lin g C o d e Tem p. R ange P ackage C ode V o lta g e C o d e A P W 7045 XXXXX A P W 7 0 4 5 K /N : N : S S O P -1 6 T R : T ape & Reel X X X X X - D a te C o d e Block Diagram V SEN1 FB2 VCC OC SET Power-on Reset (POR) X1.10 - - + DRIVE 200 µ A + + X0.90 X 0.75 + PGO OD + 1.5V X 1.15 + - VCC INHIBIT SD OV SO FT ST ART & FA ULT LOGIC UG ATE OC1 + - PHASE INHIBIT + - - V CC DAC OS CILLATO R GA TE CONTROL + ERROR AM P1 PW M COM P 1 V CC PW M 1 SY NCH DRIV E + LGATE PGN D GN D FAULT SS Copyright ANPEC Electronics Corp. Rev.A.5 - Jan., 2003 FB1 CO MP 2 www.anpec.com.tw APW7045 Absolute Maximum Ratings Symbol VCC Parameter Rating Unit 15 V GND -0.3 V to VCC +0.3 V Supply Voltage VI , VO Input , Output or I/O Voltage TA Operating Ambient Temperature Range 0 to 70 °C TJ Junction Temperature Range 0 to 125 °C TSTG Storage Temperature Range -65 to +150 °C 300 ,10 seconds °C Value Unit 75 65 °C/W TS Soldering Temperature Thermal Characteristics Symbol θJA Parameter Thermal Resistance in Free Air SOIC SOIC (with 3in2 of Copper) Electrical Characteristics (Recommended operating conditions , Unless otherwise noted) Refer to Block and Simplified Power System Diagrams , and Typical Application Schematic. Symbol Parameter Test Conditions APW7045 Min. Typ. Max. Unit 4 mA VCC Supply Current ICC Nominal Supply Current UGATE, LGATE, DRIVE open Power-on Reset VCC VOCSET VSD Rising VCC Threshold Vocset=4.5V Falling VCC Threshold Vocset=4.5V 10.7 V 8.2 Rising VOCSET Threshold 1.26 Shutdown Input High Voltage 2.0 Shutdown Input Low Voltage 0.8 V Oscillator FOSC ∆VOSC Free Running Frequency Fault= Open Ramp Amplitude Fault= Open Copyright ANPEC Electronics Corp. Rev.A.5 - Jan., 2003 3 185 200 1.9 215 kHz VP-P www.anpec.com.tw APW7045 Electrical Characteristics (Cont.) (Recommended operating conditions, Unless otherwise noted) Refer to Block and Simplified Power System Diagram, and Typical Application Schematic. Symbol Parameter Test Conditions DAC Reference Voltage VDAC Reference Voltage APW7045-10 Reference Voltage accuracy Linear Regulator Reference Voltage Regulation Output Drive Current VDRIVE=4V Synchronous PWM Controller Error Amplifier DC Gain GBWP Gain-Bandwidth Product SR Slew Rate COMP=10pF PWM Controller Gate Driver IUGATE UGATE Source VCC=12V, VUGATE =6V RUGATE UGATE Sink VUGATE1 =1V ILGATE LGATE Source VCC=12V, VLGATE =1V RLGATE LGATE Sink VLGATE= 1V Protection VSEN1 Over-Voltage VSEN1 Rising VSEN1 Over-Voltage Hysteresis IOCSET OCSET Current Source VOCSET= 4.5V ISS Soft Start Current Power Good VSEN1 Upper Threshold VSEN1 Rising VSEN1 Under Voltage VSEN1 Rising VSEN1 Hysteresis Upper /Lower Threshold VPGOOD PGOOD Voltage Low IPGOOD= -4mA APW7045 Min. Typ. Max. 1.00 -1.0 20 170 +1.0 Unit V % 1.5 3 40 V % mA 88 15 6 dB MHz V/µs 1 2.1 1 1.6 A 115 2 200 28 109 93 2 0.2 3.5 3 Ω A Ω 120 % % 230 µA µA 0.8 % % % V Functional Pin Description VCC (Pin 1) DRIVE (Pin 2) Provide a 12V bias supply for the IC to this pin. This pin also provides the gate bias charge for all the MOSFETs controlled by the IC. The voltage at this pin is monitored for Power-On Reset (POR) purposes. Connect this pin to the gate of an external MOSFET. This pin provides the drive for the VMEM regulator’s pass transistor. Copyright ANPEC Electronics Corp. Rev.A.5 - Jan., 2003 4 www.anpec.com.tw APW7045 Functional Pin Description (Cont.) (RT to GND, RT ≥ 10kΩ is more accurate) Conversely, connecting a resistor from this pin to +12V reduces the switching frequency according to the following equation : PGOOD (Pin 3) PGOOD is an open collector output used to indicate the status of the output voltages. This pin is pulled low when the synchronous regulator output is not within ±10% of the DAC reference voltage or linear regulator output is below under-voltage threshold. Fs =200 + SD (Pin 4) (RT to 12V, RT ≥ 250 kΩ is more accurate) Nominally, the voltage at this pin is 1.26V. In the event of an over-voltage or over-current condition, this pin The pin shuts down all the outputs. A TLL-compatible , logic level high signal applied at this pin immediately discharges the soft-start capacitor , disabling all the outputs . Left open , this pin is pulled low by an internal pull-down resistor , enabling operation. is internally pulled to VCC. GND (Pin 8) FB2 (Pin 5) Signal ground for the IC. All voltage levels are measured with respect to this pin. Connect this pin to a resistor divider to set the linear regulator output voltage (VMEM). The output voltage COMP and FB1 (Pin 9, and 10) set by the resistor divider is determined using the following formula : VMEM= 1.5V x (1 + COMP and FB1 are the available external pins of the PWM converter error amplifier. The FB1 pin is the inverting input of the error amplifier. Similarly , the COMP pin is the error amplifier output. These pins are used to compensate the voltage-mode control feedback loop of the synchronous PWM converter. ROUT ) RGND Where ROUT is the resistor connected from VMEM to FB2, and RGND is the resistor connected from FB2 to ground. The voltage at this pin is also monitored for Under-Voltage protection. VSEN1 (Pin 11) This pin is connected to the PWM converter’s output voltage. The PGOOD and OVP comparator circuits use this signal to report output voltage status and for over- voltage protection. SS (Pin 6) Connect a capacitor from this pin to ground. This capacitor , along with an internal 28uA current source , sets the soft-start interval of the converter. OCSET (Pin 12) Connect a resistor (ROCSET ) from this pin to the drain FAULT (Pin 7) of PWM converter’s upper MOSFET. ROCSET, an internal 200µA current source (I OCSET ), and the MOSFET’s on-resistance(RDS(ON)) set the converter’s over-current (OC) trip point according to the following equation: This pin provides oscillator switching frequency adjustment, referring to the typical performence. By placing a resistor (RT, kΩ) from this pin to GND, the nominal 200kHz switching frequency is increased according to the following equation : Fs =200 + 47920 (kHz) RT IPEAK = IOCSET x ROCSET RDS(ON) 4000 x (1.16 - 1.4 ) (kHz) RT RT-1 Copyright ANPEC Electronics Corp. Rev.A.5 - Jan., 2003 5 www.anpec.com.tw APW7045 Functional Pin Description (Cont.) OCSET (Pin 12) PHASE (Pin 15) An over-current trip cycles the soft-start function. The voltage at this pin is monitored for Power-On Reset (POR) purpose and pulling this pin low with an open drain device will shutdown the IC. Connect the PHASE pin to the PWM converter’s upper MOSFET source. This pin is used to monitor the voltage drop across the upper MOSFET for over-current protection. UGATE (Pin 16) PGND (Pin 13) Connect UGATE pin to the PWM converter’s upper MOSFET gate. This pin provides the gate drive for the upper MOSFET. This is the power ground connection. Tie the synchronous PWM converter’s lower MOSFET source to this pin. LGATE (Pin 14) Connect LGATE to the PWM converter’s lower MOSFET gate. This pin provides the gate drive for the lower MOSFET. Simplified Power System Diagram + 3.3 V IN 5.0V IN Q3 Q1 V MEM PW M C ontroller Linea r C ontroller V TT Q2 A P W 7045 Copyright ANPEC Electronics Corp. Rev.A.5 - Jan., 2003 6 www.anpec.com.tw APW7045 Typical Performance Curve RT(KΩ) vs. Switching frequency 10000 RT(KΩ) 1000 100 RT Pull up to 12V 10 RT Pull down to GND 1 0 100 200 300 400 500 600 700 800 900 Switching frequency Typical Application Circuit R8 12V 10R C9 1uF C3 L1 5.0V C2 330uF 220pF 1uH C1 10uF R1 1KR 3.3V C10 330uF 2 Q7 APM3055L 3 4 R9 VMEM (2.5V) Q6A APM7312 R2 1 5 67RF C11 330uF 6 R10 100RF 7 C8 0.1uF 8 VCC UGATE DRIVE PHASE PGOOD LGATE SD PGND FB2 OCSET SS VSEN1 FAULT GND FB1 COMP 16 L2 5.1R 15 14 VTT (1.25V) 7.8uH 13 R3 12 11 Q6B APM7312 C4 330uF R4 100RF 5.1R 10 C5 330uF 9 R11 APW7045 R12 NC OR R6 C6 C7 2700pF Copyright ANPEC Electronics Corp. Rev.A.5 - Jan., 2003 7 10pF R5 400RF 3KR R7 150KR www.anpec.com.tw APW7045 Package Informaion SOP-16 (150mil) D N H GAUGE PLANE E 1 2 3 A e Dim A A1 B D E e H L N φ1 B L 1 A1 Millimeters Min. 0.313 0.024 Inches Max. 0.407 0.059 Min. 0.053 0.004 2.327 0.927 0.386 0.150 0.094 typ. 2.279 0.886 Max. 0.069 0.010 0.016typ. 0.394 0.157 0.295typ. 0.050typ. 0.165 1.441 0.094 0.295 See variations 0° 8° 0.028 0.244 0.016 0.050 See variations 0° 8° Copyright ANPEC Electronics Corp. Rev.A.5 - Jan., 2003 8 www.anpec.com.tw APW7045 Package Informaion SSOP-16 D N H GAUGE PLANE E 1 2 3 A Millimeters 1 A1 B e L Variations- D Dim Min. Max. Variations Min. A 1.350 1.75 SSOP-16 4.75 A1 0.10 B 0.20 Inches Variations- D Max. Dim Min. Max. Variations Min. Max. 5.05 A 0.053 0.069 0.25 A1 0.004 0.010 0.30 B 0.008 0.012 D See variations D See variations E 3.75 E 0.147 e 4.05 0.625 TYP. e 0.160 0.025 TYP. H 5.75 6.25 H 0.226 0.246 L 0.4 1.27 L 0.016 0.050 See variations N See variations N φ1 0° φ1 8° Copyright ANPEC Electronics Corp. Rev.A.5 - Jan., 2003 9 SSOP-16 0.187 0.199 0° 8° www.anpec.com.tw APW7045 Physical Specifications Terminal Material Lead Solderability Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb) Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3. Reflow Condition (IR/Convection or VPR Reflow) temperature Reference JEDEC Standard J-STD-020A APRIL 1999 Peak temperature 183°C Pre-heat temperature Time Classification Reflow Profiles Convection or IR/ Convection Average ramp-up rate(183°C to Peak) 3°C/second max. 120 seconds max Preheat temperature 125 ± 25°C) 60 – 150 seconds Temperature maintained above 183°C Time within 5°C of actual peak temperature 10 –20 seconds Peak temperature range 220 +5/-0°C or 235 +5/-0°C Ramp-down rate 6 °C /second max. 6 minutes max. Time 25°C to peak temperature VPR 10 °C /second max. 60 seconds 215-219°C or 235 +5/-0°C 10 °C /second max. Package Reflow Conditions pkg. thickness ≥ 2.5mm and all bgas Convection 220 +5/-0 °C VPR 215-219 °C IR/Convection 220 +5/-0 °C pkg. thickness < 2.5mm and pkg. volume ≥ 350 mm³ Copyright ANPEC Electronics Corp. Rev.A.5 - Jan., 2003 10 pkg. thickness < 2.5mm and pkg. volume < 350mm³ Convection 235 +5/-0 °C VPR 235 +5/-0 °C IR/Convection 235 +5/-0 °C www.anpec.com.tw APW7045 Reliability test program Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B, A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD 78 Description 245°C , 5 SEC 1000 Hrs Bias @ 125 °C 168 Hrs, 100 % RH , 121°C -65°C ~ 150°C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms , Itr > 100mA Carrier Tape & Reel Dimensions t D P Po E P1 Bo F W Ko Ao D1 T2 J C A B T1 Application SOP- 16 (150mil) Application SSOP-16 A B C J 330 ± 3 100 + 2 13 + 0.5 2 ± 0.5 F D D1 Po 7.5 ± 0.1 P1 1.5 + 0.1 1.5 + 0.25 4.0 ± 0.1 A B 6.95 5.4 T T2 W 0.3±0.05 2.2 12.0±0.3 Copyright ANPEC Electronics Corp. Rev.A.5 - Jan., 2003 D0 T1 T2 16.4 + 0.3 2.5 ± 0.5 - 0.2 D1 2.0 ± 0.1 Ao W 16 ± 0.3 Bo P E 8.0 ± 0.1 1.75 ± 0.1 Ko t 6.5 ± 0.1 10.3 ± 0. 1 2.1 ± 0.1 0.3 ± 0.05 E F P0 P1 P2 1.75±0.1 5.5±0.05 4.0±0.1 8.0±0.1 2.0±0.05 W1 C1 C2 T1 T2 C 9.5 13±0.3 21±0.8 13.5±0.5 2.0±0.2 80±1 1.55±0.05 1.55±0.1 11 (mm) www.anpec.com.tw APW7045 Cover Tape Dimensions Application SOP- 16 SSOP-16 Carrier Width 24 16.8 Cover Tape Width 21.3 12.3 Devices Per Reel 1000 2500 Customer Service Anpec Electronics Corp. Head Office : 5F, No. 2 Li-Hsin Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369 Copyright ANPEC Electronics Corp. Rev.A.5 - Jan., 2003 12 www.anpec.com.tw