NSC MM74HC147 10-to-4 line priority encoder Datasheet

MM54HC147/MM74HC147
10-to-4 Line Priority Encoder
General Description
This high speed 10-to-4 Line Priority Encoder utilizes advanced silicon-gate CMOS technology. It possesses the
high noise immunity and low power consumption of standard CMOS integrated circuits. This device is fully buffered,
giving it a fanout of 10 LS-TTL loads.
The MM54HC147/MM74HC147 features priority encoding
of the inputs to ensure that only the highest order data line
is encoded. Nine input lines are encoded to a four line BCD
output. The implied decimal zero condition requires no input
condition as zero is encoded when all nine data lines are at
a high logic level. All data inputs and outputs are active at
the low logic level.
The 54HC/74HC logic family is functionally as well as pinout compatible with the standard 54LS/74LS logic family.
All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.
Features
Y
Y
Y
Y
Low quiescent power consumption: 40 mW maximum at
25§ C
High speed: 31 ns propagation delay (typical)
Low input current: 1 mA maximum
Wide supply range: 2V to 6V
Connection and Logic Diagrams
Dual-In-Line Package
TL/F/5007 – 1
Top View
Order Number MM54HC147 or MM74HC147
Truth Table
Inputs
Outputs
1
2
3
4
5
6
7
8
9
D
C
B
A
H
X
X
X
X
X
X
X
X
L
H
X
X
X
X
X
X
X
L
H
H
X
X
X
X
X
X
L
H
H
H
X
X
X
X
X
L
H
H
H
H
X
X
X
X
L
H
H
H
H
H
X
X
X
L
H
H
H
H
H
H
X
X
L
H
H
H
H
H
H
H
X
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
L
L
H
H
H
H
H
H
H
H
H
H
L
L
L
L
H
H
H
H
H
H
L
L
H
H
L
L
H
H
L
H
L
H
L
H
L
H
L
TL/F/5007 – 2
H e High Logic Level, L e Low Logic Level, X e Irrelevant
C1995 National Semiconductor Corporation
TL/F/5007
RRD-B30M115/Printed in U. S. A.
MM54HC147/MM74HC147 10-to-4 Line Priority Encoder
November 1995
Absolute Maximum Ratings (Notes 1 & 2)
Operating Conditions
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (VCC)
DC Input or Output Voltage
(VIN, VOUT)
b 0.5 to a 7.0V
Supply Voltage (VCC)
b 1.5 to VCC a 1.5V
DC Input Voltage (VIN)
b 0.5 to VCC a 0.5V
DC Output Voltage (VOUT)
g 20 mA
Clamp Diode Current (IIK, IOK)
g 25 mA
DC Output Current, per pin (IOUT)
g 50 mA
DC VCC or GND Current, per pin (ICC)
b 65§ C to a 150§ C
Storage Temperature Range (TSTG)
Power Dissipation (PD)
(Note 3)
600 mW
S.O. Package only
500 mW
Lead Temp. (TL) (Soldering 10 seconds)
260§ C
Operating Temp. Range (TA)
MM74HC
MM54HC
Min
2
Max
6
0
VCC
Units
V
V
b 40
b 55
a 85
a 125
§C
§C
1000
500
400
ns
ns
ns
Input Rise or Fall Times
VCC e 2.0V
(tr, tf)
VCC e 4.5V
VCC e 6.0V
DC Electrical Characteristics (Note 4)
Symbol
Parameter
Conditions
TA e 25§ C
VCC
74HC
TA eb40 to 85§ C
Typ
54HC
TA eb55 to 125§ C
Units
Guaranteed Limits
VIH
Minimum High Level
Input Voltage
2.0V
4.5V
6.0V
1.5
3.15
4.2
1.5
3.15
4.2
1.5
3.15
4.2
V
V
V
VIL
Maximum Low Level
Input Voltage**
2.0V
4.5V
6.0V
0.5
1.35
1.8
0.5
1.35
1.8
0.5
1.35
1.8
V
V
V
VOH
Minimum High Level
Output Voltage
VIN e VIH or VIL
lIOUTl s20 mA
2.0V
4.5V
6.0V
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
V
V
4.5V
6.0V
4.7
5.2
3.98
5.48
3.84
5.34
3.7
5.2
V
V
2.0V
4.5V
6.0V
0
0
0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
V
V
VIN e VIH or VIL
lIOUTl s4.0 mA
lIOUTl s5.2 mA
4.5V
6.0V
0.2
0.2
0.26
0.26
0.33
0.33
0.4
0.4
V
V
VIN e VIH or VIL
lIOUTl s4.0 mA
lIOUTl s5.2 mA
VOL
Maximum Low Level
Output Voltage
VIN e VIH or VIL
lIOUTl s20 mA
IIN
Maximum Input
Current
VIN e VCC or GND
6.0V
g 0.1
g 1.0
g 1.0
mA
ICC
Maximum Quiescent
Supply Current
VIN e VCC or GND
IOUT e 0 mA
6.0V
8.0
80
160
mA
Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating Ð plastic ‘‘N’’ package: b 12 mW/§ C from 65§ C to 85§ C; ceramic ‘‘J’’ package: b 12 mW/§ C from 100§ C to 125§ C.
Note 4: For a power supply of 5V g 10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing
with this supply. Worst case VIH and VIL occur at VCC e 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and
IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used.
**VIL limits are currently tested at 20% of VCC. The above VIL specification (30% of VCC) will be implemented no later than Q1, CY’89.
2
AC Electrical Characteristics VCC e 5V, TA e 25§ C, CL e 15 pF, tr e tf e 6 ns
Symbol
Parameter
Conditions
tPHL, tPLH
Maximum Propagation
Delay
Typ
Guaranteed
Limit
Units
31
38
ns
AC Electrical Characteristics VCC e 2.0V to 6.0V, CL e 50 pF, tr e tf e 6 ns (unless otherwise specified)
Symbol
Parameter
Conditions
VCC
TA e 25§ C
Typ
74HC
TA eb40 to 85§ C
54HC
TA eb55 to 125§ C
Units
Guaranteed Limits
tPHL, tPLH
Maximum Propagation
Delay
2.0V
4.5V
6.0V
181
36
31
220
44
37
275
55
47
319
64
54
ns
ns
ns
tTLH, tTHL
Maximum Output Rise
and Fall Time
2.0V
4.5V
6.0V
30
8
7
75
15
13
95
19
16
110
22
19
ns
ns
ns
CPD
Power Dissipation
Capacitance (Note 5)
CIN
Maximum Input
Capacitance
(per package)
180
5
pF
10
10
10
pF
Note 5: CPD determines the no load dynamic power consumption, PD e CPD VCC2 f a ICC VCC, and the no load dynamic current consumption, IS e CPD VCC f a ICC.
3
MM54HC147/MM74HC147 10-to-4 Line Priority Encoder
Physical Dimensions inches (millimeters)
Order Number MM54HC147J or MM74HC147J
NS Package J16A
Order Number MM74HC147N
NS Package N16E
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