LINER LT3756EUD-1-PBF 100vin, 100vout led controller Datasheet

LT3756/LT3756-1
100VIN, 100VOUT
LED Controller
FEATURES
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DESCRIPTION
3000:1 True Color PWMTM Dimming
Wide Input Voltage Range: 6V to 100V
Output Voltage Up to 100V
Constant-Current and Constant-Voltage Regulation
100mV High Side Current Sense
Drives LEDs in Boost, Buck Mode, Buck-Boost Mode,
SEPIC or Flyback Topology
Adjustable Frequency: 100kHz to 1MHz
Open LED Protection
Programmable Undervoltage Lockout with Hysteresis
Open LED Status Pin (LT3756)
Frequency Synchronization (LT3756-1)
PWM Disconnect Switch Driver
CTRL Pin Provides Analog Dimming
Low Shutdown Current: <1μA
Programmable Soft-Start
Thermally Enhanced 16-Lead QFN (3mm × 3mm)
and MSOP Packages
APPLICATIONS
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High Power LED Applications
Industrial
Automotive
The LT®3756 and LT3756-1 are DC/DC controllers designed
to operate as a constant-current source for driving high
current LEDs. They drive a low side external N-channel
power MOSFET from an internal regulated 7V supply. The
fixed frequency, current-mode architecture results in stable
operation over a wide range of supply and output voltages.
A ground referenced voltage FB pin serves as the input for
several LED protection features, and also makes it possible
for the converter to operate as a constant-voltage source.
A frequency adjust pin allows the user to program the
frequency from 100kHz to 1MHz to optimize efficiency,
performance or external component size.
The LT3756/LT3756-1 sense output current at the high
side of the LED string. High side current sensing is the
most flexible scheme for driving LEDs, allowing boost,
buck mode or buck-boost mode configuration. The PWM
input provides LED dimming ratios of up to 3000:1, and the
CTRL input provides additional analog dimming capability.
Both parts are available in the 16-lead QFN (3mm × 3mm)
and MSOP packages.
LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
True Color PWM is a trademark of Linear Technology Corporation. All other trademarks are
the property of their respective owners. Protected by U.S. Patents, including 7199560
and 7321203.
TYPICAL APPLICATION
4.7μF
22μH
1M
VREF
332k
332k
4.7μF
FB
96
ISP
14k
LT3756
0.27Ω
CTRL
370mA
ISN
40.2k
GATE
100k
SENSE
0.01μF
10k
100
1M
VIN
SHDN/UVLO
INTVCC
Efficiency vs VIN
94% Efficient 30W White LED Headlamp Driver
EFFICIENCY (%)
VIN
8V TO 60V
(100V TRANSIENT)
28.7k
400kHz
1%
OPENLED
PWM
SS
RT
PWMOUT
VC
GND INTVCC
10k
0.018Ω
30W
LED
STRING
92
88
84
80
4.7μF
0.001μF
0
20
40
VIN (V)
60
80
37561 TA01b
3756 TA01a
37561f
1
LT3756/LT3756-1
ABSOLUTE MAXIMUM RATINGS
(Note 1)
VIN ..........................................................................100V
SHDN/UVLO .......................................... 100V, VIN + 0.3V
ISP, ISN ...................................................................100V
INTVCC ...................................................... 8V, VIN + 0.3V
GATE, PWMOUT ........................................INTVCC + 0.3V
CTRL, PWM, OPENLED .............................................12V
VC, VREF , SS, FB .........................................................3V
SYNC ..........................................................................8V
RT ............................................................................1.5V
SENSE......................................................................0.5V
Operating Junction Temperature Range
(Note 2) ............................................. –40°C to 125°C
Maximum Junction Temperature........................... 125°C
Storage Temperature Range................... –65°C to 125°C
PIN CONFIGURATION
ISN
VREF 1
12 FB
PWM 2
11 PWMOUT
17
SYNC OR OPENLED 3
10 GATE
SS 4
TJMAX = 125°C, θJA = 43°C/W, θJC = 4°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
6
7
8
VIN
MSE PACKAGE
16-LEAD PLASTIC MSOP
9 SENSE
5
INTVCC
GATE
SENSE
VIN
INTVCC
SHDN/UVLO
RT
SS
SYNC OR OPENLED
RT
16
15
14
13
12
11
10
9
SHDN/UVLO
1
2
3
4
5
6
7
8
ISP
16 15 14 13
TOP VIEW
PWMOUT
FB
ISN
ISP
VC
CTRL
VREF
PWM
VC
CTRL
TOP VIEW
UD PACKAGE
16-LEAD (3mm s 3mm) PLASTIC QFN
TJMAX = 125°C, θJA = 68°C/W, θJC = 4.2°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3756EMSE#PBF
LT3756EMSE#TRPBF
3756
16-Lead Plastic MSOP
–40°C to 125°C
LT3756IMSE#PBF
LT3756IMSE#TRPBF
3756
16-Lead Plastic MSOP
–40°C to 125°C
LT3756EMSE-1#PBF
LT3756EMSE-1#TRPBF
37561
16-Lead Plastic MSOP
–40°C to 125°C
LT3756IMSE-1#PBF
LT3756IMSE-1#TRPBF
37561
16-Lead Plastic MSOP
–40°C to 125°C
LT3756EUD#PBF
LT3756EUD#TRPBF
LDMQ
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 125°C
LT3756IUD#PBF
LT3756IUD#TRPBF
LDMQ
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 125°C
LT3756EUD-1#PBF
LT3756EUD-1#TRPBF
LDMR
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 125°C
LT3756IUD-1#PBF
LT3756IUD-1#TRPBF
LDMR
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
37561f
2
LT3756/LT3756-1
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 24V, SHDN/UVLO = 24V, CTRL = 2V, PWM = 5V, unless otherwise noted.
PARAMETER
CONDITIONS
VIN Minimum Operating Voltage
VIN Tied to INTVCC
VIN Shutdown IQ
SHDN/UVLO = 0V, PWM = 0V
SHDN/UVLO = 1.15V, PWM = 0V
VIN Operating IQ (Not Switching)
VC = 0V, RT = 100k to GND
VREF Voltage
100μA ≤ IVREF ≤ 0μA
VREF Line Regulation
6V ≤ VIN ≤ 100V
MIN
l
1.965
98
Current Out of Pin
SS Pull-Up Current
Current Out of Pin
MAX
UNITS
6
V
0.1
1
5
μA
μA
1.4
1.7
mA
2.00
2.045
0.006
SENSE Current Limit Threshold
SENSE Input Bias Current
TYP
108
V
%/V
118
40
mV
μA
8
10.5
13
μA
96
100
103
mV
–13
–10
Error Amplifier
LED Current Sense Threshold (VISP – VISN)
FB = 0V, VISP = 48V
l
LED Current Sense Threshold at CTRL = 0V (VISP – VISN) CTRL = 0V, FB = 0V, VISP = 48V
CTRL Threshold Linear Programming Range
CTRL Input Bias Current
0
Current Out of Pin
50
2.9
LED Current Sense Amplifier Input Common Mode
Range (VISP)
ISP/ISN Short-Circuit Threshold (VISP – VISN)
VISN = 0V
115
150
0
ISP/ISN Short-Circuit Fault Sensing Common Mode
Range (VISN)
–8
mV
1.1
V
100
nA
100
V
200
mV
3
V
0.1
μA
μA
PWM = 5V (Active), VISP = 48V
PWM = 0V (Standby), VISP = 48V
50
0
LED Current Sense Amplifier gm
VISP – VISN = 100mV
120
μS
VC Output Impedance
1V < VVC < 2V
15000
kΩ
VC Standby Input Bias Current
PWM = 0V
ISP/ISN Input Bias Current
–20
l
FB Regulation Voltage (VFB)
VISP = VISN
FB Amplifier gm
1.220
1.232
FB = VFB, VISP = VISN
1.250
1.250
20
nA
1.270
1.265
V
V
480
μS
FB Pin Input Bias Current
Current Out of Pin
40
100
nA
FB Open LED Threshold
OPENLED Falling (LT3756 Only)
VFB –
60mV
VFB –
50mV
VFB –
40mV
V
FB Overvoltage Threshold
PWMOUT Falling
VFB +
50mV
VFB +
60mV
VFB +
70mV
V
VC Current Mode Gain – ΔVVC/ΔVSENSE
4
V/V
Oscillator
Switching Frequency
RT = 100k
RT = 10k
l
90
925
Minimum Off-Time
105
1000
125
1050
170
kHz
kHz
ns
Linear Regulator
INTVCC Regulation Voltage
7
7.15
INTVCC Undervoltage Lockout
3.9
4.1
4.3
V
INTVCC Current Limit
14
18
23
mA
8
12
Dropout (VIN – INTVCC)
INTVCC Current in Shutdown
IINTVCC = –10mA, VIN = 7V
SHDN/UVLO = 0V, INTVCC = 7V
7.3
1
V
V
μA
37561f
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LT3756/LT3756-1
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 24V, SHDN/UVLO = 24V, CTRL = 2V, PWM = 5V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Logic Inputs/Outputs
PWM Input High Voltage
1.5
V
PWM Input Low Voltage
PWM Pin Resistance to GND
45
PWMOUT Output Low (VOL)
V
50
mV
60
0
PWMOUT Output High (VOH)
0.4
kΩ
INTVCC
– 50mV
SHDN/UVLO Threshold Voltage Falling
l
1.185
SHDN/UVLO Rising Hysteresis
V
1.220
1.245
20
SHDN/UVLO Input Low Voltage
IVIN Drops Below 1μA
SHDN/UVLO Pin Bias Current Low
SHDN/UVLO = 1.15V
1.7
SHDN/UVLO Pin Bias Current High
SHDN/UVLO = 1.30V
OPENLED Output Low (VOL)
IOPENLED = 0.5mA (LT3756 Only)
SYNC Pin Resistance to GND
LT3756-1 Only
SYNC Input High
LT3756-1 Only
SYNC Input Low
LT3756-1 Only
V
mV
0.4
V
2.05
2.5
μA
10
100
nA
200
mV
30
kΩ
1.5
V
0.4
V
Gate Driver
tr GATE Driver Output Rise Time
CL = 3300pF
35
ns
tf GATE Driver Output Fall Time
CL = 3300pF
35
ns
GATE Output Low (VOL)
GATE Output High (VOH)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
0.05
INTVCC
– 50mV
V
V
Note 2: The LT3756E and LT3756E-1 are guaranteed to meet performance
specifications from 0°C to 125°C junction temperature. Specifications
over the –40°C to 125°C operating junction temperature range are
assured by design, characterization and correlation with statistical process
controls. The LT3756I and LT3756I-1 are guaranteed to meet performance
specifications over the –40°C to 125°C operating junction temperature
range.
37561f
4
LT3756/LT3756-1
TYPICAL PERFORMANCE CHARACTERISTICS
103
100
102
80
60
40
20
–20
103
VCTRL = 2V
101
100
99
98
101
100
99
98
97
–50
97
0
0.5
1
2
1.5
20
0
VCTRL (V)
40
60
ISP VOLTAGE (V)
80
3756 G01
100
FB Voltage vs Temperature
VREF Voltage vs Temperature
2.03
1.26
2.02
2.02
1.25
2.01
2.01
VREF (V)
2.03
VREF (V)
1.27
2.00
2.00
1.23
1.99
1.99
1.22
1.98
1.98
1.21
1.97
1.97
50
25
0
75
TEMPERATURE (°C)
100
1.96
–50
125
1.96
–25
50
25
0
75
TEMPERATURE (°C)
37561 G04
100
0
125
20
40
60
VIN (V)
1400
100
SHDN/UVLO Hysteresis Current
vs Temperature
Switching Frequency
vs Temperature
10000
80
37561 G06
37561 G05
Switching Frequency vs RT
125
100
VREF Voltage vs VIN
2.04
–25
50
25
0
75
TEMPERATURE (°C)
37561 G03
2.04
1.20
–50
–25
3756 G02
1.28
1.24
VCTRL = 2V
102
VISP - VISN THRESHOLD (mV)
120
0
VFB (V)
VISP – VISN Threshold
vs Temperature
VISP – VISN Threshold vs VISP
VISP –VISN THRESHOLD (mV)
VISP - VISN THRESHOLD (mV)
VISP – VISN Threshold vs VCTRL
TA = 25°C, unless otherwise noted.
2.4
RT = 10k
1000
100
1200
2.2
ISHDN/UVLO (μA)
SWITCHING FREQUENCY (kHz)
SWITCHING FREQUENCY (kHz)
1300
1100
1000
900
800
2.0
1.8
700
10
10
100
RT (k)
37561 G07
600
–50
–25
50
25
0
75
TEMPERATURE (°C)
100
125
37561 G08
1.6
–50
–25
50
25
0
75
TEMPERATURE (°C)
100
125
37561 G09
37561f
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LT3756/LT3756-1
TYPICAL PERFORMANCE CHARACTERISTICS
SHDN/UVLO Threshold
vs Temperature
SENSE Current Limit Threshold
vs Temperature
Quiescent Current vs VIN
110
1.5
1.0
0.5
20
40
60
VIN (V)
80
105
100
95
90
–50
0
0
1.28
SHDN/UVLO VOLTAGE (V)
SENSE THRESHOLD (mV)
2.0
VIN CURRENT (mA)
TA = 25°C, unless otherwise noted.
100
50
25
0
75
TEMPERATURE (°C)
–25
100
1.26
SHDN/UVLO RISING
1.24
SHDN/UVLO FALLING
1.22
1.20
1.18
–50
125
50
25
0
75
TEMPERATURE (°C)
–25
100
125
37561 G10
INTVCC Current Limit
vs Temperature
INTVCC Voltage vs VIN
4
2
20
40
60
VIN (V)
80
18
7.3
16
14
100
50
25
0
75
TEMPERATURE (°C)
–25
SENSE Current Limit Threshold
vs Duty Cycle
125
100
95
90
100
37561 G16
50
25
0
75
TEMPERATURE (°C)
–25
100
Gate Rise/Fall Time
vs Capacitance
100
VCTRL = 2V
100
10% TO 90%
80
75
50
25
0
1.2
125
37561 G15
TIME (ns)
VISP –VISN THRESHOLD (mV)
105
50
75
DUTY CYCLE (%)
7.0
–50
125
V(ISP-ISN) Threshold vs FB Voltage
110
25
100
37561 G14
37561 G13
0
7.2
7.1
12
10
–50
0
0
7.4
INTVCC (V)
INTVCC CURRENT LIMIT (mA)
VINTVCC (V)
6
SENSE THRESHOLD (mV)
INTVCC Voltage vs Temperature
20
8
GATE RISE
TIME
60
GATE
FALL TIME
40
20
0
1.22
1.24
1.26
FB VOLTAGE (V)
1.28
37561 G17
0
2
4
6
CAPACITANCE (nF)
8
10
37561 G18
37561f
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LT3756/LT3756-1
PIN FUNCTIONS
(MSOP/QFN)
PWMOUT (Pin 1/Pin 11): Buffered Version of PWM Signal
for Driving LED Load Disconnect NMOS or Level Shift. This
pin also serves a protection function for the FB overvoltage
condition—will toggle if the FB input is greater than the FB
regulation voltage (VFB) plus 60mV (typical). The PWMOUT
pin is driven from INTVCC. Use of a FET with gate cut-off
voltage higher than 1V is recommended.
FB (Pin 2/Pin 12): Voltage Loop Feedback Pin. FB is
intended for constant-voltage regulation or for LED protection/open LED detection. The internal transconductance
amplifier with output VC will regulate FB to 1.25V (nominal)
through the DC/DC converter. If the FB input is regulating
the loop, the OPENLED pull-down is asserted. This action may signal an open LED fault. If FB is driven above
the FB threshold (by an external power supply spike, for
example), the OPENLED pull-down will be de-asserted and
the PWMOUT pin will be driven low to protect the LEDs
from an overcurrent event. Do not leave the FB pin open.
If not used, connect to GND.
ISN (Pin 3/Pin 13): Connection Point for the Negative
Terminal of the Current Feedback Resistor. If ISN is
greater than 2.9V, the LED current can be programmed
by ILED = 100mV/RLED when VCTRL > 1.2V or ILED = VCTRL
–100mV/(10 • RLED). Input bias current is typically 20μA.
Below 3V, ISN is an input to the short-circuit protection
feature that forces GATE to 0V if ISN is more than 150mV
(typ) below ISP.
ISP (Pin 4/Pin 14): Connection Point for the Positive Terminal of the Current Feedback Resistor. Input bias current
for this pin is typically 30μA. ISP is an input to the shortcircuit protection feature when ISP is less than 3.1V.
VC (Pin 5/Pin 15): Transconductance Error Amplifier
Output Pin Used to Stabilize the Voltage Loop with an RC
Network. This pin is high impedance when PWM is low, a
feature that stores the demand current state variable for
the next PWM high transition. Connect a capacitor between
this pin and GND; a resistor in series with the capacitor is
recommended for fast transient response.
CTRL (Pin 6/Pin 16): Current Sense Threshold Adjustment
Pin. Regulating threshold VISP – VISN is 1/10th VCTRL plus
an offset. CTRL linear range is from GND to 1.1V. Connect
CTRL to VREF for the 100mV default threshold. Do not
leave this pin open.
VREF (Pin 7/Pin 1): Voltage Reference Output Pin, Typically
2V. This pin drives a resistor divider for the CTRL pin, either
for analog dimming or for temperature limit/compensation
of LED load. Can supply up to 100μA.
PWM (Pin 8/Pin 2): A signal low turns off switcher, idles
oscillator and disconnects VC pin from all internal loads.
PWMOUT pin follows PWM pin. PWM has an internal
pull-down resistor. If not used, connect to INTVCC.
OPENLED (Pin 9/Pin 3, LT3756 Only): An open-drain
pull-down on OPENLED asserts if the FB input is greater
than the FB regulation threshold minus 50mV (typical).
To function, the pin requires an external pull-up resistor.
When the PWM input is low and the DC/DC converter is
idle, the OPENLED condition is latched to the last valid
state when the PWM input was high. When PWM input
goes high again, the OPENLED pin will be updated. This
pin may be used to report an open LED fault.
SYNC (Pin 9/Pin 3, LT3756-1 Only): The SYNC pin is used
to synchronize the internal oscillator to an external logic
level signal. The RT resistor should be chosen to program
an internal switching frequency 20% slower than the SYNC
pulse frequency. Gate turn-on occurs a fixed delay after
the rising edge of SYNC. For best PWM performance, the
PWM rising edge should occur at least 200ns before the
SYNC rising edge. Use a 50% duty cycle waveform to drive
this pin. This pin replaces OPENLED on LT3756-1 option
parts. If not used, tie this pin to GND.
SS (Pin 10/Pin 4): Soft-Start Pin. This pin modulates
oscillator frequency and compensation pin voltage (VC)
clamp. The soft-start interval is set with an external capacitor. The pin has a 10μA (typical) pull-up current source
to an internal 2.5V rail. The soft-start pin is reset to GND
by an undervoltage condition (detected by SHDN/UVLO
pin) or thermal limit.
RT (Pin 11/Pin 5): Switching Frequency Adjustment Pin.
Set the frequency using a resistor to GND (for resistor
values, see the Typical Performance curve or Table 1).
Do not leave the RT pin open.
SHDN/UVLO (Pin 12/Pin 6): Shutdown and Undervoltage
Detect Pin. An accurate 1.22V falling threshold with externally programmable hysteresis detects when power is
OK to enable switching. Rising hysteresis is generated by
the external resistor divider and an accurate internal 2μA
37561f
7
LT3756/LT3756-1
PIN FUNCTIONS
pull-down current. Above the 1.24V (nominal) threshold
(but below 6V), SHDN/UVLO input bias current is subμA. Below the falling threshold, a 2μA pull-down current
is enabled so the user can define the hysteresis with the
external resistor selection. An undervoltage condition
resets soft-start. Tie to 0.4V, or less, to disable the device
and reduce VIN quiescent current below 1μA. Do not tie
SHDN/UVLO to a voltage higher than VIN.
SENSE (Pin 15/Pin 9): The current sense input for the
control loop. Kelvin connect this pin to the positive terminal of the switch current sense resistor, RSENSE, in the
source of the NFET. The negative terminal of the current
sense resistor should be connected to the GND plane
close to the IC.
GATE (Pin 16/Pin 10): N-Channel FET Gate Driver Output.
Switches between INTVCC and GND. Driven to GND during
shutdown, fault or idle states.
INTVCC (Pin 13/Pin 7): Regulated Supply for Internal Loads,
GATE Driver and PWMOUT Driver. Supplied from VIN and
regulates to 7V (typical). INTVCC must be bypassed with
a 4.7μF capacitor placed close to the pin. Connect INTVCC
directly to VIN if VIN is always less than or equal to 7V.
Exposed Pad (Pin 17/Pin 17): Ground. This pin also serves
as current sense input for control loop, sensing negative
terminal of current sense resistor. Solder the Exposed Pad
directly to ground plane.
VIN (Pin 14/Pin 8): Input Supply Pin. Must be locally
bypassed with a 0.22μF (or larger) capacitor placed close
to the IC.
BLOCK DIAGRAM
SHDN/UVLO
1.22V
–
+
A6
FB
VC
1.3V
2μA
PWMOUT
–
+
SHDN
OVFB
COMPARATOR
PWM
VIN
– LDO
+A8
1.25V
7V
INTVCC
A5
+
gm
–
1.25V
10μA AT
FB = 1.25V
SHORT-CIRCUIT
DETECT
+
–
+
A10
–
150mV
10μA
SCILMB
+
A2
–
gm
EAMP
ISN
+
A1
–
5k
ISP
SCILMB
R
DRIVER
S
PWM
COMPARATOR
10μA AT
A1+ = A1–
GATE
Q
ISENSE
CTRL
BUFFER
CTRL
1.1V
+
+ A3
–
+
–
SENSE
A4
Q2
GND
RAMP
GENERATOR
VC
SSCLAMP
140μA
VREF
2V
–
+A7
100kHz TO 1MHz
OSCILLATOR
FAULT
LOGIC
OPENLED
10μA
1.25V
TSD
SS
+
+
–
1.2V
FB
FREQ
PROG
RT
–
+
SYNC (LT3756-1 ONLY)
(LT3756
ONLY)
37561 BD
50k
37561f
8
LT3756/LT3756-1
OPERATION
The LT3756 is a constant-frequency, current mode controller with a low side NMOS gate driver. The GATE pin and
PWMOUT pin drivers, and other chip loads, are powered
from INTVCC, which is an internally regulated supply. In
the discussion that follows, it will be helpful to refer to
the Block Diagram of the IC. In normal operation, with the
PWM pin low, the GATE and PWMOUT pins are driven to
GND, the VC pin is high impedance to store the previous
switching state on the external compensation capacitor,
and the ISP and ISN pin bias currents are reduced to
leakage levels. When the PWM pin transitions high, the
PWMOUT pin transitions high after a short delay. At the
same time, the internal oscillator wakes up and generates a pulse to set the PWM latch, turning on the external
power MOSFET switch (GATE goes high). A voltage input
proportional to the switch current, sensed by an external
current sense resistor between the SENSE and GND input
pins, is added to a stabilizing slope compensation ramp
and the resulting “switch current sense” signal is fed into
the positive terminal of the PWM comparator. The current
in the external inductor increases steadily during the time
the switch is on. When the switch current sense voltage
exceeds the output of the error amplifier, labeled “VC”,
the latch is reset and the switch is turned off. During the
switch off phase, the inductor current decreases. At the
completion of each oscillator cycle, internal signals such
as slope compensation return to their starting points and a
new cycle begins with the set pulse from the oscillator.
Through this repetitive action, the PWM control algorithm
establishes a switch duty cycle to regulate a current or
voltage in the load. The VC signal is integrated over many
switching cycles and is an amplified version of the difference between the LED current sense voltage, measured
between ISP and ISN, and the target difference voltage
set by the CTRL pin. In this manner, the error amplifier
sets the correct peak switch current level to keep the
LED current in regulation. If the error amplifier output
increases, more current is demanded in the switch; if it
decreases, less current is demanded. The switch current
is monitored during the on-phase and the voltage across
the SENSE pin is not allowed to exceed the current limit
threshold of 108mV (typical). If the SENSE pin exceeds
the current limit threshold, the SR latch is reset regardless
of the output state of the PWM comparator. Likewise, at
an ISP/ISN common mode voltage less than 3V, the difference between ISP and ISN is monitored to determine if
the output is in a short-circuit condition. If the difference
between ISP and ISN is greater than 150mV (typical), the
SR latch will be reset regardless of the PWM comparator.
These functions are intended to protect the power switch,
as well as various external components in the power path
of the DC/DC converter.
In voltage feedback mode, the operation is similar to that
described above, except the voltage at the VC pin is set
by the amplified difference of the internal reference of
1.25V (nominal) and the FB pin. If FB is lower than the
reference voltage, the switch current will increase; if FB
is higher than the reference voltage, the switch demand
current will decrease. The LED current sense feedback
interacts with the FB voltage feedback so that FB will not
exceed the internal reference and the voltage between ISP
and ISN will not exceed the threshold set by the CTRL pin.
For accurate current or voltage regulation, it is necessary
to be sure that under normal operating conditions, the
appropriate loop is dominant. To deactivate the voltage
loop entirely, FB can be connected to GND. To deactivate
the LED current loop entirely, the ISP and ISN should be
tied together and the CTRL input tied to VREF .
Two LED specific functions featured on the LT3756 are
controlled by the voltage feedback pin. First, when the
FB pin exceeds a voltage 50mV lower (–4%) than the FB
regulation voltage, the pull-down driver on the OPENLED
pin is activated. This function provides a status indicator
that the load may be disconnected and the constant-voltage
feedback loop is taking control of the switching regulator. When the FB pin exceeds the FB regulation voltage
by 60mV (5% typical), the PWMOUT pin is driven low,
ignoring the state of the PWM input. In the case where
the PWMOUT pin drives a disconnect NFET, this action
isolates the LED load from GND, preventing excessive
current from damaging the LEDs. If the FB input exceeds
both the open LED and the overvoltage (OV) thresholds,
then an externally driven overvoltage event has caused
the FB pin to be too high and the OPENLED pull-down
will be deactivated and locked out until the FB pin drops
below both thresholds.
37561f
9
LT3756/LT3756-1
APPLICATIONS INFORMATION
INTVCC Regulator Bypassing and Operation
The INTVCC pin requires a capacitor for stable operation
and to store the charge for the large GATE switching currents. Choose a 10V rated low ESR, X7R or X5R ceramic
capacitor for best performance. The value of the capacitor
is determined primarily by the stability of the regulator
rather than the gate charge, QG, of the switching NMOS—a
4.7μF capacitor will be adequate for many applications.
Place the capacitor close to the IC to minimize the trace
length to the INTVCC pin and also to the IC ground.
An internal current limit on the INTVCC output protects
the LT3756 from excessive on-chip power dissipation.
The minimum value of this current should be considered
when choosing the switching NMOS and the operating
frequency.
Programming the Turn-On and Turn-Off Thresholds
with the SHDN/UVLO Pin
The falling UVLO value can be accurately set by the resistor divider. A small 2μA pull-down current is active when
SHDN/UVLO is below the 1.24V threshold. The purpose
of this current is to allow the user to program the rising
hysteresis. The following equations should be used to
determine the values of the resistors:
VIN,FALLING = 1.24 •
VIN,RISING HYST = 2μA • R1
VIN
IINTVCC can be calculated from the following equation:
LT3756
If the input voltage, VIN, will not exceed 7V, then the
INTVCC pin should be connected to the input supply. Be
aware that a small current (typically less than 10μA) will
load the INTVCC in shutdown. If VIN is normally above, but
occasionally drops below the INTVCC regulation voltage,
then the minimum operating VIN will be close to 6V . This
value is determined by the dropout voltage of the linear
regulator and the 4.5V (4.3V typical) INTVCC undervoltage
lockout threshold mentioned above.
R1
SHDN/UVLO
IINTVCC = QG • fOSC
Careful choice of a lower QG FET will allow higher switching frequencies, leading to smaller magnetics. The INTVCC
pin has its own undervoltage disable (UVLO) set to 4.3V
(typical) to protect the external FETs from excessive power
dissipation caused by not being fully enhanced. If the
INTVCC pin drops below the UVLO threshold, the GATE
and PWMOUT pins will be forced to 0V and the soft-start
pin will be reset.
R1 + R2
R2
R2
3756 F01
Figure 1
LED Current Programming
The LED current is programmed by placing an appropriate
value current sense resistor between the ISP and ISN pins.
Typically, sensing of the current should be done at the top
of the LED string. If this option is not available, then the
current may be sensed at the bottom of the string, but take
caution that the minimum ISN value does not fall below
3V, which is the lower limit of the LED current regulation
function. The CTRL pin should be tied to a voltage higher
than 1.1V to get the full-scale 100mV (typical) threshold
across the sense resistor. The CTRL pin can also be used
to dim the LED current to zero, although relative accuracy
decreases with the decreasing voltage sense threshold.
When the CTRL pin voltage is less than 1.1V, the LED
current is:
ILED =
VCTRL − 100mV
RLED • 10
37561f
10
LT3756/LT3756-1
APPLICATIONS INFORMATION
When VCTRL is higher than 1.1V, the LED current is regulated to:
ILED =
100mV
RLED
The LED current programming feature can increase total
dimming range by a factor of 10. The CTRL pin should
not be left open (tie to VREF if not used). The CTRL pin
can also be used in conjunction with a thermistor to
provide overtemperature protection for the LED load, or
with a resistor divider to VIN to reduce output power and
switching current when VIN is low. The presence of a time
varying differential voltage signal (ripple) across ISP and
ISN at the switching frequency is expected. The amplitude
of this signal is increased by high LED load current, low
switching frequency and/or a smaller value output filter
capacitor. Some level of ripple signal is acceptable: the
compensation capacitor on the VC pin filters the signal so
the average difference between ISP and ISN is regulated
to the user-programmed value. Ripple voltage amplitude
(peak-to-peak) in excess of 20mV should not cause misoperation, but may lead to noticeable offset between the
average value and the user-programmed value.
Programming Output Voltage (Constant-Voltage
Regulation) or Open LED/Overvoltage Threshold
For a boost or SEPIC application, the output voltage can
be set by selecting the values of R1 and R2 (see Figure 2)
according to the following equation:
VOUT = 1.25 •
R1 + R2
R2
For a boost type LED driver, set the resistor from the output
to the FB pin such that the expected VFB during normal
operation will not exceed 1.1V. For an LED driver of buck or
a buck-boost configuration, the output voltage is typically
level-shifted to a signal with respect to GND as illustrated
in Figure 3. The output can be expressed as:
VOUT = VBE + 1.25 •
R1
R2
ISP/ISN Short-Circuit Protection Feature
The ISP and ISN pins have a protection feature independent of the LED current sense feature that operates at
ISN below 3V. The purpose of this feature is to provide
continuous current sensing when ISN is below the LED
current sense common mode range (during start-up or
an output short-circuit fault) to prevent the development
of excessive switching currents that could damage the
power components. The action threshold (150mV, typ) is
above the default LED current sense threshold, so that no
interference will occur over the ISN voltage range where
these two functions overlap. This feature acts in the same
manner as SENSE current limit — it prevents GATE from
going high (switch turn-on) until the ISP/ISN difference
falls below the threshold.
Dimming Control
There are two methods to control the current source for
dimming using the LT3756. One method uses the CTRL
pin to adjust the current regulated in the LEDs. A second
method uses the PWM pin to modulate the current source
between zero and full current to achieve a precisely programmed average current. To make this method of current
control more accurate, the switch demand current is stored
on the VC node during the quiescent phase when PWM is
low. This feature minimizes recovery time when the PWM
R1
VIN
+
RSEN(EXT)
VOUT
LT3756
R1
–
LT3756
FB
R2
100k
LED
ARRAY
FB
R2
3756 F02
3756 F03
Figure 2. Feedback Resistor Connection
for Boost or SEPIC LED Drivers
Figure 3. Feedback Resistor Connection for
Buck Mode or Buck-Boost Mode LED Driver
37561f
11
LT3756/LT3756-1
APPLICATIONS INFORMATION
signal goes high. To further improve the recovery time, a
disconnect switch may be used in the LED current path to
prevent the ISP node from discharging during the PWM
signal low phase. The minimum PWM on or off time will
depend on the choice of operating frequency through the
RT input. For best current accuracy, the minimum PWM
low or high time should be at least six switching cycles
(6μs for fSW = 1MHz). Maximum PWM period is determined
by the system and is unlikely to be longer than 12ms.
The maximum PWM dimming ratio (PWM(RATIO)) can be
calculated from the maximum PWM period (tMAX) and the
minimum PWM pulse width (tMIN) as follows:
PWMRATIO =
tMAX
tMIN
tMAX = 9ms, tMIN = 6μs (fSW = 1MHz)
PWMRATIO = 9ms/6μs = 1500:1
Programming the Switching Frequency
The RT frequency adjust pin allows the user to program
the switching frequency from 100kHz to 1MHz to optimize
efficiency/performance or external component size. Higher
frequency operation yields smaller component size but
increases switching losses and gate driving current, and
may not allow sufficiently high or low duty cycle operation.
Lower frequency operation gives better performance at the
cost of larger external component size. For an appropriate RT resistor value see Table 1 or Figure 4. An external
resistor from the RT pin to GND is required—do not leave
this pin open.
Table 1. Switching Frequency vs RT Value (1% Resistors)
RT (kΩ)
1000
10
400
28.7
200
53.6
100
100
Duty Cycle Considerations
Switching duty cycle is a key variable defining converter
operation, therefore, its limits must be considered when
programming the switching frequency for a particular
application. The fixed minimum on-time and minimum
off-time (see Figure 5) and the switching frequency define
the minimum and maximum duty cycle of the switch,
respectively. The following equations express the minimum/maximum duty cycle:
Min Duty Cycle = (minimum on-time) • switching frequency
Max Duty Cycle = 1 – (minimum off-time) • switching
frequency
When calculating the operating limits, the typical values
for on/off-time in the data sheet should be increased by
at least 100ns to allow margin for PWM control latitude,
GATE rise/fall times and SW node rise/fall times.
10000
300
250
MINIMUM ON-TIME
200
1000
TIME (ns)
SWITCHING FREQUENCY (kHz)
fOSC (kHz)
MINIMUM OFF-TIME
150
100
100
50
10
10
100
RT (k)
37561 F04
Figure 4. Switching Frequency vs RT
0
–50
–25
50
25
0
75
TEMPERATURE (°C)
100
125
37561 F05
Figure 5. Typical Minimum On and
Off Pulse Width vs Temperature
37561f
12
LT3756/LT3756-1
APPLICATIONS INFORMATION
Thermal Considerations
The LT3756 and LT3756-1 are rated to a maximum input
voltage of 100V. Careful attention must be paid to the
internal power dissipation of the IC at higher input voltages to ensure that a junction temperature of 125°C is not
exceeded. This junction limit is especially important when
operating at high ambient temperatures. The majority of the
power dissipation in the IC comes from the supply current
needed to drive the gate capacitance of the external power
MOSFET. This gate drive current can be calculated as:
IGATE = fSW • QG
A low QG power MOSFET should always be used when operating at high input voltages, and the switching frequency
should also be chosen carefully to ensure that the IC does
not exceed a safe junction temperature. The internal junction temperature of the IC can be estimated by:
TJ = TA + [VIN (IQ + fSW • QG) • θJA]
where TA is the ambient temperature, IQ is the quiescent
current of the part (maximum 1.5mA) and θJA is the
package thermal impedance (68°C/W for the 3mm × 3mm
QFN package). For example, an application with TA(MAX)
= 85°C, VIN(MAX) = 60V, fSW = 400kHz, and having a FET
with QG = 20nC, the maximum IC junction temperature
will be approximately:
TJ = 85°C + [60V (1.5mA + 400kHz • 20nC) • 68°C/W]
a good choice, otherwise, maintain the duty cycle between
20% and 60%. When using both PWM and SYNC features,
the PWM signal rising edge should occur at least 200ns
before the SYNC rising edge (VIH) for optimal PWM
performance. If the SYNC pin is not used, it should be
connected to GND.
Open LED Detection (LT3756 Only)
The LT3756 provides an open-drain status pin, OPENLED,
that pulls low when the FB pin is within ~50mV of its
1.25V regulated voltage. If the open LED clamp voltage
is programmed correctly using the FB pin, then the FB
pin should never exceed 1.1V when LEDs are connected,
therefore, the only way for the FB pin to be within 50mV
of the 1.24V regulation voltage is for an open LED event to
have occurred. When an open LED fault occurs, the output
may initially overshoot the FB regulation point by several
percent, due to slew rate limitations on VC and the absence
of any load on the output. In order to ensure the voltage
on switching components remains below programmed
limits, and to guarantee accurate reporting of the open
LED fault, adding a silicon diode between OPENLED and
SS is recommended, as well as a 10k resistor in series
with the soft-start capacitor, if one is used.
Input Capacitor Selection
The LT3756-1 switching frequency can be synchronized to
an external clock using the SYNC pin. For proper operation,
the RT resistor should be chosen for a switching frequency
20% lower than the external clock frequency. The SYNC
pin is disabled during the soft-start period.
The input capacitor supplies the transient input current for
the power inductor of the converter and must be placed
and sized according to the transient current requirements.
The switching frequency, output current and tolerable input
voltage ripple are key inputs to estimating the capacitor
value. An X7R type ceramic capacitor is usually the best
choice since it has the least variation with temperature and
DC bias. Typically, boost and SEPIC converters require a
lower value capacitor than a buck mode converter. Assuming that a 100mV input voltage ripple is acceptable,
the required capacitor value for a boost converter can be
estimated as follows:
1μ F
V
CIN(μF ) = ILED( A ) • OUT • TSW(μs) •
VIN
A • μs
Observation of the following guidelines about the SYNC
waveform will ensure proper operation of this feature.
Driving SYNC with a 50% duty cycle waveform is always
Therefore, a 4.7μF capacitor is an appropriate selection
for a 400kHz boost regulator with 12V input, 48V output
and 1A load.
= 124°C
The Exposed Pad on the bottom of the package must be
soldered to a ground plane. This ground should then be
connected to an internal copper ground plane with thermal
vias placed directly under the package to spread out the
heat dissipated by the IC.
Frequency Synchronization (LT3756-1 Only)
37561f
13
LT3756/LT3756-1
APPLICATIONS INFORMATION
With the same VIN voltage ripple of 100mV, the input capacitor for a buck converter can be estimated as follows:
4 . 7 μF
CIN(μF ) = ILED( A ) • TSW (μs) •
A • μs
A 10μF input capacitor is an appropriate selection for a
400kHz buck mode converter with a 1A load.
In the buck mode configuration, the input capacitor has
large pulsed currents due to the current returned through
the Schottky diode when the switch is off. In this buck
converter case it is important to place the capacitor as close
as possible to the Schottky diode and to the GND return
of the switch (i.e., the sense resistor). It is also important
to consider the ripple current rating of the capacitor. For
best reliability, this capacitor should have low ESR and
ESL and have an adequate ripple current rating. The RMS
input current for a buck mode LED driver is:
IIN(RMS) = ILED •
( 1 – D) • D
Soft-Start Capacitor Selection
For many applications, it is important to minimize the
inrush current at start-up. The built-in soft-start circuit
significantly reduces the start-up current spike and output
voltage overshoot. The soft-start interval is set by the softstart capacitor selection according to the equation:
TSS = CSS •
2V
10μA
A typical value for the soft-start capacitor is 0.01μF. The
soft-start pin reduces the oscillator frequency and the
maximum current in the switch. The soft-start capacitor
is discharged when SHDN/UVLO falls below its threshold,
during an overtemperature event or during an INTVCC
undervoltage event. During start-up with SHDN/UVLO,
charging of the soft-start capacitor is enabled after the
first PWM high period.
Power MOSFET Selection
where D is the switch duty cycle.
Table 2. Recommended Ceramic Capacitor Manufacturers
MANUFACTURER
PHONE
WEB
TDK
516-535-2600
www.tdk.com
Kemet
408-986-0424
www.kemet.com
Murata
814-237-1431
www.murata.com
Taiyo Yuden
408-573-4150
www.t-yuden.com
Output Capacitor Selection
The selection of the output capacitor depends on the load
and converter configuration, i.e., step-up or step-down
and the operating frequency. For LED applications, the
equivalent resistance of the LED is typically low and the
output filter capacitor should be sized to attenuate the
current ripple. Use of an X7R type ceramic capacitor is
recommended.
To achieve the same LED ripple current, the required filter
capacitor is larger in the boost and buck-boost mode applications than that in the buck mode applications. Lower
operating frequencies will require proportionately higher
capacitor values.
For applications operating at high input or output voltages,
the power NMOS FET switch is typically chosen for drain
voltage VDS rating and low gate charge QG. Consideration
of switch on-resistance, RDS(ON), is usually secondary because switching losses dominate power loss. The INTVCC
regulator on the LT3756 has a fixed current limit to protect
the IC from excessive power dissipation at high VIN, so the
FET should be chosen so that the product of QG at 7V and
switching frequency does not exceed the INTVCC current
limit. For driving LEDs be careful to choose a switch with
a VDS rating that exceeds the threshold set by the FB pin
in case of an open-load fault. Several MOSFET vendors
are listed in Table 3. The MOSFETs used in the application
circuits in this datasheet have been found to work well
with the LT3756. Consult factory applications for other
recommended MOSFETs.
Table 3. MOSFET Manufacturers
VENDOR
PHONE
WEB
Vishay Siliconix
402-563-6866
www.vishay.com
Fairchild
972-910-8000
www.fairchildsemi.com
International Rectifier
310-252-7105
www.irf.com
37561f
14
LT3756/LT3756-1
APPLICATIONS INFORMATION
Schottky Rectifier Selection
Inductor Selection
The power Schottky diode conducts current during the
interval when the switch is turned off. Select a diode rated
for the maximum SW voltage. If using the PWM feature for
dimming, it is important to consider diode leakage, which
increases with the temperature, from the output during the
PWM low interval. Therefore, choose the Schottky diode
with sufficiently low leakage current. Table 4 has some
recommended component vendors.
The inductor used with the LT3756 should have a saturation
current rating appropriate to the maximum switch current
selected with the RSENSE resistor. Choose an inductor value
based on operating frequency, input and output voltage to
provide a current mode signal on SENSE of approximately
20mV magnitude. The following equations are useful to
estimate the inductor value (TSW = 1/fOSC):
LBUCK =
Table 4. Schottky Rectifier Manufacturers
VENDOR
PHONE
WEB
On Semiconductor
888-743-7826
www.onsemi.com
Diodes, Inc.
805-446-4800
www.diodes.com
Central Semiconductor
631-435-1110
www.centralsemi.com
Sense Resistor Selection
The resistor, RSENSE, between the source of the external NMOS FET and GND should be selected to provide
adequate switch current to drive the application without
exceeding the 108mV (typical) current limit threshold on
the SENSE pin of LT3756. For buck mode applications,
select a resistor that gives a switch current at least 30%
greater than the required LED current. For buck mode,
select a resistor according to:
RSENSE,BUCK ≤
0.07 V
ILED
VIN • 0.07 V
( VIN + VLED )ILED
For boost, select a resistor according to:
RSENSE,BOOST ≤
LBUCK-BOOST =
LBOOST =
TSW • RSENSE • VLED • VIN
( VLED + VIN ) • 0..02V
TSW • RSENSE • VIN ( VLED – VIN)
VLED • 0.02V
Table 5 provides some recommended inductor vendors.
Table 5. Inductor Manufacturers
VENDOR
PHONE
WEB
Sumida
408-321-9660
www.sumida.com
Würth Elektronik
605-886-4385
www.we-online.com
Coiltronics
561-998-4100
www.cooperet.com
Vishay
402-563-6866
www.vishay.com
Coilcraft
847-639-6400
www.coilcraft.com
Loop Compensation
For buck-boost, select a resistor according to:
RSENSE,BUCK-BOOST ≤
TSW • RSENSE • VLED ( VIN – VLED )
VIN • 0.02V
VIN • 0.07 V
VLED • ILED
The placement of RSENSE should be close to the source of
the NMOS FET and GND of the LT3756. The SENSE input
to LT3756 should be a Kelvin connection to the positive
terminal of RSENSE.
The LT3756 uses an internal transconductance error amplifier whose VC output compensates the control loop. The
external inductor, output capacitor and the compensation
resistor and capacitor determine the loop stability.
The inductor and output capacitor are chosen based on
performance, size and cost. The compensation resistor
and capacitor at VC are selected to optimize control loop
response and stability. For typical LED applications, a
2.2nF compensation capacitor at VC is adequate, and
a series resistor should always be used to increase the
slew rate on the VC pin to maintain tighter regulation of
LED current during fast transients on the input supply to
the converter.
37561f
15
LT3756/LT3756-1
APPLICATIONS INFORMATION
Board Layout
the LT3756. Likewise, the ground terminal of the bypass
capacitor for the INTVCC regulator should be placed near
the GND of the switching path. Typically, this requirement
will result in the external switch being closest to the IC,
along with the INTVCC bypass capacitor. The ground for
the compensation network and other DC control signals
should be star connected to the underside of the IC. Do
not extensively route high impedance signals such as FB
and VC, as they may pick up switching noise. In particular,
avoid routing FB and PWMOUT in parallel for more than
a few millimeters on the board. Since there is a small
variable DC input bias current to the ISN and ISP inputs,
resistance in series with these pins should be minimized
to avoid creating an offset in the current sense threshold.
Likewise, minimize resistance in series with the SENSE
input to avoid changes (most likely reduction) to the switch
current limit threshold.
The high speed operation of the LT3756 demands careful
attention to board layout and component placement. The
Exposed Pad of the package is the only GND terminal of
the IC and is also important for thermal management of
the IC. It is crucial to achieve a good electrical and thermal
contact between the Exposed Pad and the ground plane of
the board. To reduce electromagnetic interference (EMI), it
is important to minimize the area of the high dV/dt switching
node between the inductor, switch drain and anode of the
Schottky rectifier. Use a ground plane under the switching
node to eliminate interplane coupling to sensitive signals.
The lengths of the high dI/dt traces: 1) from the switch
node through the switch and sense resistor to GND, and
2) from the switch node through the Schottky rectifier and
filter capacitor to GND should be minimized. The ground
points of these two switching current traces should come
to a common point then connect to the ground plane under
TYPICAL APPLICATIONS
VISP-VISN vs Temperature
for NTC Resistor Divider
30W White LED Headlamp Driver with Thermal Derating
4.7μF
1M
1M
VIN
SHDN/UVLO
VREF
332k
14k
LT3756
0.27Ω
CTRL
100k
ISN
100k
NTC
RT1
0.01μF
28.7k
400kHz
10k
370mA
30W LED STRING
80
60
40
SENSE
20
0.018Ω
0
PWMOUT
GND INTVCC
RT VC
M1: VISHAY SILICONIX Si7454DP
D1: DIODES INC PDS5100
L1: COILTRONICS DR127-220
RT1: MURATA NCP18WM104J
M2: VISHAY SILICONIX Si2328DS
D2: IN4448HWT
M1
GATE
OPENLED
PWM
SS
D2
100
4.7μF
FB
ISP
16.9k
INTVCC
120
D1
L1, 22μH
VISP – VISN (mV)
VIN 8V TO 60V
(100V TRANSIENT)
10k
0.001μF
25
45
65
85
TEMPERATURE (°C)
105
125
37551 TA02b
4.7μF
10V
M2
3756 TA02a
37561f
16
LT3756/LT3756-1
TYPICAL APPLICATIONS
Efficiency vs VIN
Buck-Boost Mode LED Driver
D1
VOUT
C1
4.7μF
1μF
100V
VIN
1M
SHDN/UVLO
VREF
185k
ISP
13k
1Ω
CTRL
INTVCC
90
VIN
LT3756
ISN
M1
GATE
100k
SENSE
OPENLED
PWM
SS
RT
PWMOUT
VC
GND INTVCC
0.1μF
10k
1M
FB
36.5k
300kHz
4700pF
24V TO 32V
LED STRING
100mA
0.068Ω
80
70
60
50
1.5k
C2
2.2μF
10V
39k
100
C3
4.7μF
EFFICIENCY (%)
VIN
9V TO
65V
L1
68μH
0
M3
80
M2
1k
3756 TA03a
C4
1μF
L1A
33μH
Efficiency vs VIN
D1
VIN
SHDN/UVLO
511k
FB
L1B
VREF
25k
ISP
CTRL
INTVCC
LT3756
100k
0.1Ω
96
EFFICIENCY (%)
1M
100
C3
10μF
s2
35V
1:1
185k
60
37561 TA03b
90% Efficient, 20W SEPIC LED Driver
C1
4.7μF
100V
40
VIN (V)
VIN
L1: COILCRAFT MSS1038-683
D1: ON SEMICONDUCTOR MBRS3100T3
M1: VISHAY SILICONIX Si2328DS
M2: VISHAY SILICONIX Si2328DS
M3: ZETEX ZXM6IP03F
VIN
8V TO
80V
20
1A
92
88
ISN
GATE
OPENLED
PWM
SENSE
SS
RT
PWMOUT
VC
GND INTVCC
0.01μF
28.7k
400kHz
30k
10k
0.001μF
C2
4.7μF
10V
M1
84
20W
LED
STRING
0.033Ω
80
0
20
40
VIN (V)
60
80
37561 TA04b
M2
3756 TA04a
L1: COILCRAFT MSD1278T-333
M1: VISHAY SILICONIX Si7430DP
D1: ON SEMICONDUCTOR MBRS3200T
M2: ZETEX ZXM61N03F
37561f
17
LT3756/LT3756-1
PACKAGE DESCRIPTION
MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1667 Rev Ø)
BOTTOM VIEW OF
EXPOSED PAD OPTION
3.835 p 0.102
(.151 p .004)
5.23
(.206)
MIN
3.556 p 0.102
(.140 p .004)
2.845 p 0.102
(.112 p .004)
0.889 p 0.127
(.035 p .005)
8
1
1.651 p 0.102 1.905 p 0.102
(.065 p .004) (.075 p .004)
2.159 p 0.102 3.20 – 3.45
(.085 p .004) (.126 – .136)
0.305 p 0.038
(.0120 p .0015)
TYP
16
0.50
(.0197)
BSC
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
9
4.039 p 0.102
(.159 p .004)
(NOTE 3)
0.280 p 0.076
(.011 p .003)
REF
16151413121110 9
DETAIL “A”
0o – 6o TYP
3.00 p 0.102
(.118 p .004)
(NOTE 4)
4.90 p 0.152
(.193 p .006)
GAUGE PLANE
0.53 p 0.152
(.021 p .006)
1234567 8
DETAIL “A”
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.86
(.034)
REF
0.1016 p 0.0508
(.004 p .002)
MSOP (MSE16) 0907 REV Ø
37561f
18
LT3756/LT3756-1
PACKAGE DESCRIPTION
UD Package
16-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1691)
0.70 ±0.05
3.50 ± 0.05
1.45 ± 0.05
2.10 ± 0.05 (4 SIDES)
PACKAGE OUTLINE
0.25 ±0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
3.00 ± 0.10
(4 SIDES)
BOTTOM VIEW—EXPOSED PAD
PIN 1 NOTCH R = 0.20 TYP
OR 0.25 × 45° CHAMFER
R = 0.115
TYP
0.75 ± 0.05
15
16
PIN 1
TOP MARK
(NOTE 6)
0.40 ± 0.10
1
1.45 ± 0.10
(4-SIDES)
2
(UD16) QFN 0904
0.200 REF
0.00 – 0.05
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
0.25 ± 0.05
0.50 BSC
37561f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LT3756/LT3756-1
TYPICAL APPLICATION
Buck Mode 1A LED Driver with High Dimming Ratio and Open LED Reporting
C1
1μF
1M
VIN
365k
ISP
SHDN/UVLO
1.5k
61.9k
VREF
0.1Ω
C3
4.7μF
22.1k
M2
PWMOUT
LT3756
5 WHITE LEDs
20W
1k
96
100k
M3
PWM
92
88
84
100k
L1
100μH
OPENLED
0.1μF
10k
100
+
22V
–
ISN
FB
CTRL
INTVCC
1A
Efficiency vs VIN
EFFICIENCY (%)
VIN
24V TO
80V
28.7k
400kHz
M1
SS
GATE
RT
VC
SENSE
GND INTVCC
47k
80
D1
VIN
C4
4.7μF
20
30
40
50
VIN (V)
60
70
80
37561 TA05b
0.043Ω
C2
4.7μF
0.001μF
3756 TA05a
M1: VISHAY SILICONIX Si3430DV
D1: DIODES INC B1100/B
L1: COILCRAFT MSS1246-101
M2: VISHAY SILICONIX Si2328DS
M3: ZETEX ZXM61P03F
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT3474
36V, 1A (ILED), 2MHz, Step-Down LED Driver
VIN: 4V to 36V, VOUT(MAX) = 13.5V, True Color PWM Dimming = 400:1,
ISD < 1μA, TSSOP16E Package
LT3475
Dual 1.5A (ILED), 36V, 2MHz Step-Down LED Driver
VIN: 4V to 36V, VOUT(MAX) = 13.5V, True Color PWM Dimming = 3000:1,
ISD < 1μA, TSSOP20E Package
LT3476
Quad Output 1.5A, 36V, 2MHz High Current LED Driver VIN: 2.8V to 16V, VOUT(MAX) = 36V, True Color PWM Dimming = 1000:1,
ISD < 10μA, 5mm × 7mm QFN Package
with 1000:1 Dimming
LT3477
3A, 42V, 3MHz Boost, Buck-Boost, Buck LED Driver
VIN: 2.5V to 25V, VOUT(MAX) = 40V, Dimming = Analog/PWM, ISD < 1μA,
QFN and TSSOP20E Packages
LT3478/LT3478-1
4.5A, 42V, 2.5MHz High Current LED Driver with
3000:1 Dimming
VIN: 2.8V to 36V, VOUT(MAX) = 42V, True Color PWM Dimming = 3000:1,
ISD < 3μA, TSSOP16E Package
LT3486
Dual 1.3A, 2MHz High Current LED Driver
VIN: 2.5V to 24V, VOUT(MAX) = 36V, True Color PWM Dimming = 1000:1,
ISD < 1μA, 5mm × 3mm DFN and TSSOP16E Packages
LT3496
Triple 0.75A, 2.1MHz, 45V LED Driver
VIN: 3V to 30V, VOUT(MAX) = 45V, Dimming = 3000:1, ISD < 1μA,
4mm × 5mm QFN and TSSOP16E Packages
LT3517
1.5A, 2.5MHz, 45V LED Driver
VIN: 3V to 30V, VOUT(MAX) = 45V, Dimming = 3000:1, ISD < 1μA,
4mm × 4mm QFN and TSSOP16E Packages
LT3518
2.3A, 2.5MHz, 45V LED Driver
VIN: 3V to 30V, VOUT(MAX) = 45V, Dimming = 3000:1, ISD < 1μA,
4mm × 4mm QFN and TSSOP16E Packages
LT3755/LT3755-1
40VIN , 60VOUT, Full Featured LED Controller
VIN: 4.5V to 40V, VOUT(MAX) = 60V, True Color PWM Dimming = 3000:1,
ISD < 1μA, 3mm × 3mm QFN-16 and MS16E Packages
LTC®3783
High Current LED Controller
VIN: 3V to 36V, VOUT(MAX) = Ext FET, True Color PWM Dimming = 3000:1,
ISD < 20μA, 5mm × 4mm QFN10 and TSSOP16E Packages
37561f
20 Linear Technology Corporation
LT 0808 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2008
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