LINER LTC1346AI 10mbps dce/dte v.35 transceiver Datasheet

LTC1346A
10Mbps DCE/DTE
V.35 Transceiver
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DESCRIPTIO
FEATURES
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Single Chip Provides Complete Differential Signal
Interface for V.35 Port
Drivers and Receivers Will Withstand Repeated
±10kV ESD Pulses
10Mbaud Transmission Rate
Meets CCITT V.35 Specification
Operates from ±5V Supplies
Shutdown Mode Reduces ICC to Below 1µA
Selectable Transmitter and Receiver Configurations
Independent Driver/Receiver Enables
Transmitter Maintains High Impedance When
Disabled, Shut Down or with Power Off
Transmitters Are Short-Circuit Protected
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APPLICATI
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S
Modems
Telecommunications
Data Routers
The LTC®1346A is a single chip transceiver that provides
the differential clock and data signals for a V.35 interface
from ±5V supplies. Combined with an external resistor
termination network and an LT ®1134A RS232 transceiver
for the control signals, the LTC1346A forms a complete low
power DTE or DCE V.35 interface port.
The LTC1346A features three current output differential
transmitters and three differential receivers. The transceiver can be configured for DTE or DCE operation or
shutdown using three Select pins. In the shutdown mode,
the supply current is reduced to below 1µA.
The LTC1346A transceiver operates up to 10Mbaud. All
transmitters feature short-circuit protection. Both the transmitter outputs and the receiver outputs can be forced into
a high impedance state. The transmitter outputs and receiver inputs feature ±10kV ESD protection.
, LTC and LT are registered trademarks of Linear Technology Corporation.
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TYPICAL APPLICATION
Clock and Data Signals for V.35 Interface
1
VCC1
5V
DTE
DCE
1
2
2
+
0.1µF
4
5
LTC1346A
DX
DX
24
1
23
2
22
3
21
4
TXD (103)
T
T
SCTE (113)
T
T
TXC (114)
18 14
9
RX
T
17 13
T
RXC (115)
16 12
10
RX
T
15 11
T
RXD (104)
14 10
11
RX
7
VCC1
8
13
3
12
BI
627T500/1250
BI
627T500/1250
T
9
8
T
7
GND (102)
8
+
LTC1346A
VEE2
0.1µF –5V
0.1µF
12
16
11
15
10
14
9
13
1
24
2
23
3
22
4
21
5
20
6
7
VCC2
5V
+
VEE1
– 5V +
0.1µF
19
10
RX
11
RX
DX
DX
4
5
50Ω
DX
6
7
3
8
12
T
VCC2
125Ω
=
50Ω
BI TECHNOLOGIES
627T500/1250 (SOIC)
LTC1346 • TA01
1
LTC1346A
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PACKAGE/ORDER I FOR ATIO
RATI GS
(Note 1)
Supply Voltage
VCC .................................................................... 6.5V
VEE ................................................................... – 6.5V
Input Voltage
Transmitters ........................... – 0.3V to (VCC + 0.3V)
Receivers ............................................... – 18V to 18V
S0, S1, S2 ............................... – 0.3V to (VCC + 0.3V)
Output Voltage
Transmitters .......................................... – 18V to 18V
Receivers ................................ – 0.3V to (VCC + 0.3V)
Short-Circuit Duration
Transmitter Output ..................................... Indefinite
Receiver Output .......................................... Indefinite
Operating Temperature Range
LTC1346AC ............................................ 0°C to 70°C
LTC1346AI ........................................ – 40°C to 85°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
DC ELECTRICAL CHARACTERISTICS
SYMBOL
VOD
VOC
IOH
IOL
IOZ
PARAMETER
Transmitter Differential Output Voltage
Transmitter Common Mode Output Voltage
Transmitter Output High Current
Transmitter Output Low Current
Transmitter Output Leakage Current
ORDER PART
NUMBER
TOP VIEW
VEE 1
24 Y1
VCC 2
23 Z1
GND 3
22 Y2
T1 4
21 Z2
T2 5
20 Y3
T3 6
19 Z3
S1 7
18 A3
S2 8
17 B3
R3 9
16 A2
R2 10
15 B2
R1 11
14 A1
S0 12
13 B1
LTC1346ACSW
LTC1346AISW
SW PACKAGE
24-LEAD PLASTIC SO WIDE
TJMAX = 150°C, θJA = 85°C/W
Consult factory for Military grade parts.
VCC = 5V ±5%, VEE = – 5V ±5% (Note 2)
CONDITIONS
– 4V ≤ VOS ≤ 4V (Figure 1)
VOS = 0V (Figure 1)
VY, Z = 0V
VY, Z = 0V
– 5V ≤ VY, Z ≤ 5V, S1 = S2 = 0V
●
●
●
●
MIN
0.44
– 0.6
– 12.6
9.4
TYP
0.55
0
– 11
11
±1
●
RO
VTH
∆VTH
IIN
RIN
VOH
VOL
IOSR
IOZR
VIH
VIL
IIN
2
Transmitter Output Impedance
Differential Receiver Input Threshold Voltage
Receiver Input Hysterisis
Receiver Input Current (A, B)
Receiver Input Impedance
Receiver Output High Voltage
Receiver Output Low Voltage
Receiver Output Short-Circuit Current
Receiver Three-State Output Current
Logic Input High Voltage
Logic Input Low Voltage
Logic Input Current
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ABSOLUTE
– 2V ≤ VY, Z ≤ 2V
– 7V ≤ (VA + VB)/2 ≤ 12V
– 7V ≤ (VA + VB)/2 ≤ 12V
– 7V ≤ VA, B ≤ 12V
– 7V ≤ VA, B ≤ 12V
IO = 4mA, VA, B = 0.2V
IO = 4mA, VA, B = – 0.2V
0V ≤ VO ≤ VCC
S0 = VCC, 0V ≤ VO ≤ VCC
T, S0, S1, S2
T, S0, S1, S2
T, S0, S1, S2
100
25
50
●
●
17.5
3
●
●
7
●
●
●
●
200
0.7
●
●
MAX
0.66
0.6
– 9.4
12.6
±20
±100
30
4.5
0.2
40
0.4
85
±10
2
0.8
±10
UNITS
V
V
mA
mA
µA
µA
kΩ
mV
mV
mA
kΩ
V
V
mA
µA
V
V
µA
LTC1346A
AC ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
ICC
VCC Supply Current
IEE
VEE Supply Current
tr , t f
tPLH
tPHL
tSKEW
tPLH
tPHL
tSKEW
tZL
Transmitter Rise or Fall Time
Transmitter Input to Output
Transmitter Input to Output
Transmitter Output to Output
Receiver Input to Output
Receiver Input to Output
Differential Receiver Skew, tPLH – tPHL
Receiver Enable to Output Low (Active Mode)
Receiver Enable to Output Low
(from Shutdown, Note 3)
Receiver Enable to Output High (Active Mode)
Receiver Enable to Output High
(from Shutdown, Note 3)
Receiver Disable from Low
Receiver Disable from High
tZH
tLZ
tHZ
VCC = 5V ±5%, VEE = – 5V ±5% (Note 2)
CONDITIONS
VOS = 0V, S0 = Low, S1 = S2 = High (Figure 1)
No Load, S0 = Low, S1 = S2 = High
Shutdown, S0 = VCC, S1 = S2 = 0V
VOS = 0V, S0 = Low, S1 = S2 = High (Figure 1)
No Load, S0 = Low, S1 = S2 = High
Shutdown, S0 = VCC, S1 = S2 = 0V
VOS = 0V (Figures 1, 3)
VOS = 0V (Figures 1, 3)
VOS = 0V (Figures 1, 3)
VOS = 0V (Figures 1, 3)
VOS = 0V (Figures 1, 4)
VOS = 0V (Figures 1, 4)
VOS = 0V (Figures 1, 4)
CL = 15pF, SW1 Closed (Figures 2, 5)
CL = 15pF, SW1 Closed (Figures 2, 5)
MIN
●
●
●
●
●
●
●
●
●
●
●
●
TYP
40
6
0.1
– 40
–6
– 0.1
7
25
30
5
50
55
5
40
2
MAX
50
9
100
– 50
–9
– 100
40
70
70
100
100
70
UNITS
mA
mA
µA
mA
mA
µA
ns
ns
ns
ns
ns
ns
ns
ns
µs
CL = 15pF, SW2 Closed (Figures 2, 5)
CL = 15pF, SW2 Closed (Figures 2, 5)
●
35
2
70
ns
µs
CL = 15pF, SW1 Closed (Figures 2, 5)
CL = 15pF, SW2 Closed (Figures 2, 5)
●
30
35
70
70
ns
ns
The ● denotes specifications which apply over the full operating
temperature range.
Note 1: The Absolute Maximum Ratings are those values beyond which
the life of a device may be impaired.
●
Note 2: All currents into device pins are positive; all currents out of device
pins are termed negative. All voltages are referenced to device ground
unless otherwise specified.
Note 3: Receiver enable to output valid high or low from shutdown is
typically 2µs.
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TYPICAL PERFORMANCE CHARACTERISTICS
Transmitter Output Current
vs Temperature
Transmitter Output Current
vs Output Voltage
13
20
13
11
10
9
–50 –25
0
50
75
25
TEMPERATURE (˚C)
100
125
1346A G01
15
12
TIME (ns)
OUTPUT CURRENT (mA)
12
VCC = 5V
VEE = –5V
TA = 25°C
VCC = 5V
VEE = –5V
VCC = 5V
VEE = –5V
OUTPUT CURRENT (mA)
Transmitter Output Skew
vs Temperature
11
5
10
9
–2.0 –1.5 –1.0 –0.5 0 0.5 1.0
OUTPUT VOLTAGE (V)
10
1.5
2.0
1346A G02
0
–50 –25
0
50
75
25
TEMPERATURE (˚C)
100
125
1346A G03
3
LTC1346A
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TYPICAL PERFORMANCE CHARACTERISTICS
Receiver tPLH – tPHL
vs Temperature
ICC Supply Current vs Temperature
45
VCC = 5V
VEE = –5V
LOADED
CURRENT (mA)
6.5
35
NO LOAD
0
–50 –25
0
50
75
25
TEMPERATURE (˚C)
100
125
25
–50 –25
0
50
75
25
TEMPERATURE (˚C)
NO LOAD
–6.0
–35
100
5.5
125
–6.5
–40
–45
–50 –25
0
50
75
25
TEMPERATURE (˚C)
Transmitter Output Waveforms
100
–7.0
125
1346A G06
1346A G05
1346A G04
INPUT
5V/DIV
–5.5
LOADED
6.0
30
5
–30
7.0
Receiver Enable from Shutdown
Receiver Output Waveforms
INPUT A–B
1V/DIV
INPUT
0.2V/DIV
INPUT S0
5V/DIV
OUTPUT
0.2V/DIV
OUTPUT
5V/DIV
OUTPUT
5V/DIV
1346A G07
1346A G08
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PIN FUNCTIONS
VEE (Pin 1): Negative Supply, – 4.75V ≥ VEE ≥ – 5.25V
B1 (Pin 13): Receiver 1 Inverting Input
VCC (Pin 2): Positive Supply, 4.75V ≤ VCC ≤ 5.25V
A1 (Pin 14): Receiver 1 Noninverting Input
GND (Pin 3): Ground
B2 (Pin 15): Receiver 2 Inverting Input
T1 (Pin 4): Transmitter 1 Input, TTL Compatible
A2 (Pin 16): Receiver 2 Noninverting Input
T2 (Pin 5): Transmitter 2 Input, TTL Compatible
B3 (Pin 17): Receiver 3 Inverting Input
T3 (Pin 6): Transmitter 3 Input, TTL Compatible
A3 (Pin 18): Receiver 3 Noninverting Input
S1 (Pin 7): Select Input 1, TTL Compatible
Z3 (Pin 19): Transmitter 3 Inverting Output
S2 (Pin 8): Select Input 2, TTL Compatible
Y3 (Pin 20): Transmitter 3 Noninverting Output
R3 (Pin 9): Receiver 3 Output, TTL Compatible
Z2 (Pin 21): Transmitter 2 Inverting Output
R2 (Pin 10): Receiver 2 Output, TTL Compatible
Y2 (Pin 22): Transmitter 2 Noninverting Output
R1 (Pin 11): Receiver 1 Output, TTL Compatible
Z1 (Pin 23): Transmitter 1 Inverting Output
S0 (Pin 12): Select Input 0, TTL Compatible
Y1 (Pin 24): Transmitter 1 Noninverting Output
4
1346A G09
CURRENT (mA)
10
–5.0
VCC = 5V
VEE = –5V
CURRENT (mA)
TIME (ns)
VCC = 5V
VEE = –5V
40
15
IEE Supply Current vs Temperature
–25
7.5
CURRENT (mA)
20
LTC1346A
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FU CTIO TABLES
Transmitter and Receiver Configuration
S0
0
1
0
1
0
1
0
1
S1
0
0
1
1
0
0
1
1
S2
0
0
0
0
1
1
1
1
DX ON
—
—
1, 2, 3
1, 2, 3
1, 2
1, 2
1, 2, 3
1, 2, 3
RX ON
1, 2, 3
—
1, 2
—
1, 2, 3
—
1, 2, 3
—
Transmitter
Description
All RX ON, All DX OFF
All OFF, Shutdown
DCE Mode
DCE Mode, All RX OFF
DTE Mode
DTE Mode, All RX OFF
All ON
All DX ON, All RX OFF
INPUTS
OUTPUTS
CONFIGURATION S0 S1 S2
T Y1 AND Y2 Z1 AND Z2 Y3 Z3
All OFF
0
X
0
0
Z
Z
Z
Z
Shutdown
1
0
0
X
Z
Z
Z
Z
DCE or All ON
X
1
X
0
0
1
0
1
DCE or All ON
X
1
X
1
1
0
1
0
DTE
X
0
1
0
0
1
Z
Z
DTE
X
0
1
1
1
0
Z
Z
Receiver
INPUTS
CONFIGURATION S0 S1 S2
OUTPUTS
A–B
R1 AND R2
R3
0
0
0
≤ – 0.2V
0
0
All Rx ON
0
0
0
≥ 0.2V
1
1
Shutdown
1
0
0
X
Z
Z
DCE
0
1
0
≤ – 0.2V
0
Z
DCE
0
1
0
≥ 0.2V
1
Z
Disabled
1
1
0
X
Z
Z
DTE or All ON
0
X
1
≤ – 0.2V
0
0
All Rx ON
DTE or All ON
0
X
1
≥0.2V
1
1
Disabled
1
X
1
X
Z
Z
TEST CIRCUITS
Y
50Ω
T
Y
125Ω
VOS
50Ω
A
125Ω
R
VOD
B
Z
S0
50Ω
50Ω
VOC = (VY + VZ)/2
15pF
LTC1346A • F01
Z
Figure 1. V.35 Transmitter/Receiver Test Circuit
VCC
SW1
1k
RECEIVER
OUTPUT
CL
SW2
LTC1346A • F02
Figure 2. Receiver Output Enable and Disable Timing Test Load
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LTC1346A
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SWITCHI G TI E WAVEFOR S
3V
1.5V
T
f = 1MHz: t r ≤ 10ns: t f ≤ 10ns
1.5V
0V
t PLH
t PHL
VO
90%
Y–Z
VDIFF = V(Y) – V(Z)
50%
10%
–VO
90%
50%
10%
1/2 VO
tr
tf
Z
VO
Y
tSKEW
tSKEW
LTC1346A • F03
Figure 3. V.35 Transmitter Propagation Delays
V OD /2
f = 1MHz: t r ≤ 10ns: t f ≤ 10ns
0V
A–B
INPUT
0V
–VOD /2
t PLH
t PHL
VOH
R
1.5V
OUTPUT
1.5V
VOL
LTC1346A • F04
Figure 4. V.35 Receiver Propagation Delays
3V
1.5V
S0
0V
f = 1MHz: t r ≤ 10ns: t f ≤ 10ns
t ZL
1.5V
t LZ
5V
R
1.5V
OUTPUT NORMALLY LOW
VOL
t ZH
OUTPUT NORMALLY HIGH
VOH
0.5V
t HZ
0.5V
1.5V
R
0V
LTC1346A • F05
Figure 5. Receiver Enable and Disable Times
6
LTC1346A
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APPLICATIONS INFORMATION
10. No data errors should occur with ±2V common
mode change at either the transmitter/receiver or
±4V ground potential difference between transmitter and receiver.
Review of CCITT Recommendation V.35
Electrical Specifications
V.35 is a CCITT recommendation for synchronous data
transmission via modems. Appendix 2 of the recommendation describes the electrical specifications which are
summarized below:
Cable Termination
Each end of the cable connected to an LTC1346A must be
terminated by an external Y- or ∆-resistor network for
proper operation. The Y-termination has two series connected 50Ω resistors and a 125Ω resistor connected
between ground and the center tap of the two 50Ω resistors
as shown in Figure 6.
1. The interface cable is a balanced twisted pair with 80Ω
to 120Ω impedance.
2. The transmitter’s source impedance is between 50Ω
and 150Ω.
3. The transmitter’s resistance between shorted terminals and ground is 150Ω ±15Ω.
The alternative ∆-termination has a 120Ω resistor across
the twisted wires and two 300Ω resistors between each
wire and ground. Standard 1/8W, 5% surface mount
resistors can be used for the termination network. To
maintain the proper differential output swing, the resistor
tolerance must be 5% or better. A termination network
that combines all the resistors into an SO-14 package is
available from:
4. When terminated by a 100Ω resistive load, the terminal-to-terminal voltage should be 0.55V ±20%.
5. The transmitter’s rise time should be less than 1% of
the signal pulse or 40ns, whichever is greater.
6. The common mode voltage at the transmitter output
should not exceed 0.6V.
7. The receiver impedance is 100Ω ±10Ω.
BI Technologies (Formerly Beckman Industrial)
Resistor Networks
4200 Bonita Place
Fullerton, CA 92635
Phone: (714) 447-2357
FAX: (714) 447-2500
Part #: BI Technologies 627T500/1250 (SOIC)
899TR50/125 (DIP)
8. The receiver impedance to ground is 150Ω ±15Ω.
9. The transmitter or receiver should not be damaged
by connection to earth ground, short-circuiting or
cross connection to other lines.
50Ω
125Ω
50Ω
Y
300Ω
120Ω
300Ω
∆
LTC1346A • F06
Figure 6. Y- and ∆-Termination Networks
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LTC1346A
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APPLICATIONS INFORMATION
CHIP
BOUNDARY
VCC
11mA
Y
50Ω
125Ω
T
50Ω
Z
11mA
VEE
LTC1346A • F07
Figure 7. Simplified Transmitter Schematic
Theory of Operation
The transmitter outputs consist of complementary
switched-current sources as shown in Figure 7.
With a logic zero at the transmitter input, the inverting
output Z sources 11mA and the noninverting output Y
sinks 11mA. The differential transmitter output voltage is
then set by the termination resistors. With two differential
50Ω resistors at each end of the cable, the voltage is set to
(50Ω)(11mA) = 0.55V. With a logic 1 at the transmitter
input, output Z sinks 11mA and Y sources 11mA. The
common mode voltage of Y and Z is 0V when both current
sources are matched and there is no ground potential
difference between the cable terminations. The transmitter
current sources have a common mode range of ±2V, which
allows for a ground difference between cable terminations
of ±4V.
Each receiver input has a 30k resistance to ground and
requires external termination to meet the V.35 input impedance specification. The receivers have an input hysteresis
of 50mV to improve noise immunity.
Three Select pins, S0, S1 and S2, configure the chip as
described in Function Tables. When the transmitters and
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receivers are OFF, all outputs are forced into high impedance. The S0 pin can be used as receiver output enable.
In shutdown mode, ICC drops to 1µA with all transmitters
and receivers OFF. When the LTC1346A is enabled from
shutdown the transmitters and receivers require 2µs to
stabilize.
Complete V.35 Port
Figure 8 shows the schematic of a complete surface
mounted, ±5V DTE and DCE V.35 port using only three ICs
and six capacitors per port. The LTC1346A is used to
transmit the clock and data signals and the LT1134A to
transmit the control signals. If test signals 140, 141 and
142 are not used, the transmitter inputs should be tied
to VCC.
RS422/RS485 Applications
The receivers on the LTC1346A can be used for RS422
and RS485 applications. Using the test circuit in Figure 9,
the LTC1346A receivers are able to successfully extract
the data stream from the common mode voltage, meeting
RS422 and RS485 requirements as shown in Figures 10
and 11.
LTC1346A
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APPLICATIONS INFORMATION
DTE
VCC1
5V
50Ω
T
VEE1
–5V
2
0.1µF
LTC1346A
4
DX
5
DX
9
RX
10
RX
11
RX
8
12
24
1
23
2
22
3
21
4
18
14
17
13
16
12
15
11
14
10
13
9
3
7
T
SCTE (113)
AA
T
TXC (114)
T
RXC (115)
T
T
RXD (104)
T
T
R
R
T
X
V
V
T
AA
Y
Y
X
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T
B
GND (102)
B
A
CABLE SHIELD
A
T
+
3
2
0.1µF
12
16
11
15
10
14
9
13
1
24
2
23
3
22
4
21
5
20
6
19
7
3
22
4
DX
5
DX
6
DX
8
12
VCC2
4
+
11
RX
7
23
+
3
1µF
22
1
+
1µF
10
RX
1µF
24
0.1µF
LTC1346A
8
+
LT1134A
1µF
S
S
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P
1
1µF
1
+
T
P
TXD (103)
BI
627T500/
1250
(SOIC)
VCC2
5V
+
4
BI
627T500/
1250
(SOIC)
8
7
VCC1
1µF
VEE2
–5V
50Ω
1
0.1µF
DCE
125Ω
=
23
24
LT1134A
1µF
+
1µF
2
21
19
20
18
OPTIONAL SIGNALS
16
14
17
15
DX
DX
RX
RX
RX
RX
DX
DX
13
5
H
DTR (108)
7
C
RTS (105)
6
E
DSR (107)
8
D
CTS (106)
10
F
DCD (109)
12
NN
TM (142)
9
N
RDL (140)
11
L
LLB (141)
H
6
C
8
E
5
D
7
F
9
NN
11
N
10
L
12
ISO 2593
ISO 2593
34-PIN DTE/DCE
34-PIN DTE/DCE
INTERFACE CONNECTOR INTERFACE CONNECTOR
20
RX
18
RX
DX
DX
DX
DX
21
19
17
15
16
RX
14
RX
13
LTC1346A • TA08
Figure 8. Complete Single ±5V V.35 Interface
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LTC1346A
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APPLICATIONS INFORMATION
VCC1
5V
VCC2
5V
A
A
LTC485
GND
100Ω
100Ω
B
B
GND
+–
TTL
IN
TTL
OUT
LTC1346A
VEE
–5V
7V TO – 7V
GND POTENTIAL DIFFERENCE
LTC1346A • F09
Figure 9. RS422/RS485 Receiver Interface
5V
RECEIVER
OUTPUT
5V/DIV
RECEIVER
A
INPUT B
5V/DIV
15V
0V
10V
5V
0V
0V
–5V
RECEIVER
INPUT B
A
5V/DIV
–10V
5V
RECEIVER
OUTPUT
5V/DIV
0V
LTC1346 • F10
Figure 10. – 7V Common Mode
Multiprotocol Application
The LTC1346A can be used in multiprotocol applications
where V.35, RS232 and RS422 (used in RS530, RS449
among others) signals may appear at the same port. The
LTC1346A switched current source driver is not compatible with RS232 or RS422. However, the outputs when
disabled can share lines with RS232 drivers with a shutdown feature such as the LT1030 and RS422 drivers with
a disable feature such as the LTC486/LTC487 (Figure 12a).
10
LTC1346 • F11
Figure 11. 12V Common Mode
The LTC1346A driver will not be damaged or load the
shared lines when disabled. The LTC1346A receiver can
receive V.35, RS232 and RS422 signals as shown in Figure
12b. The LTC1346A receiver is directly compatible with
V.35 and RS422. For RS232 signal, the noninverting input
of the receiver should be grounded. Because the line
termination for each of the protocols is different, some
form of termination switching should be included, either
the connector (as shown in Figures 12a and 12b) or on the
PCB.
LTC1346A
U
U
W
U
APPLICATIONS INFORMATION
LT1030
V.35 DIFFERENTIAL
CONNECTION WITH
TERMINATION
LTC487
RS422
DIFFERENTIAL
CONNECTION
RS232
CONNECTION
NO CONNECTION
LT1346A
CONNECTOR
50Ω
125Ω
50Ω
LOGIC
INPUT
1346A F12a
Figure 12a. Multiprotocol Transmitter
V.35 DIFFERENTIAL
CONNECTION WITH
TERMINATION
RS232
CONNECTION WITH
TERMINATION
50Ω
CONNECTOR
LT1346A
LOGIC
OUTPUT
RS422 DIFFERENTIAL
CONNECTION WITH
TERMINATION
125Ω
100Ω
5k
50Ω
1346A F12b
Figure 12b. Multiprotocol Receiver
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC1346A
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
SW Package
24-Lead Plastic Small Outline (Wide 0.300)
(LTC DWG # 05-08-1620)
0.598 – 0.614*
(15.190 – 15.600)
24
23
22
21
20
19
18
17
16
15
14
13
0.394 – 0.419
(10.007 – 10.643)
NOTE 1
0.291 – 0.299**
(7.391 – 7.595)
1
2
3
4
5
6
7
8
9
10
11
12
0.037 – 0.045
(0.940 – 1.143)
0.093 – 0.104
(2.362 – 2.642)
0.010 – 0.029 × 45°
(0.254 – 0.737)
0° – 8° TYP
0.009 – 0.013
(0.229 – 0.330)
NOTE 1
0.016 – 0.050
(0.406 – 1.270)
0.050
(1.270)
TYP
0.004 – 0.012
(0.102 – 0.305)
0.014 – 0.019
(0.356 – 0.482)
NOTE:
1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS.
S24 (WIDE) 0695
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1134A
5V Only, 4-Driver/4-Receiver RS232 Transceiver
Forms Complete V.35 Interface with LTC1346A
LTC1334
5V Only, Configurable RS232/RS485 Transceiver
Includes On-Chip Charge Pump
LTC1345
Single Supply V.35 Transceiver
Single 5V Only, Includes On-Chip Charge Pump
12
Linear Technology Corporation
LT/GP 0296 10K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977
 LINEAR TECHNOLOGY CORPORATION 1995
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