Intersil ISL41334IRZ ±15kv esd protected, two port, dual protocol transceiver Datasheet

ISL81334, ISL41334
®
Data Sheet
December 20, 2005
±15kV
ESD Protected, Two Port, Dual
Protocol Transceivers
FN6202.1
Features
• ±15kV (HBM) ESD Protected Bus Pins (RS-232 or
RS-485)
The ISLX1334 are two port interface ICs where each port
can be independently configured as a single RS-485/422
transceiver, or as a dual (2 Tx, 2 Rx) RS-232 transceiver.
With both ports set to the same mode, two RS-485/422
transceivers, or four RS-232 transceivers are available.
• Two Independent Ports, Each User Selectable for RS-232
(2 Transceivers) or RS-485/422 (1 Transceiver)
• Flow-Through Pinouts Simplify Board Layouts
If either port is in RS-232 mode, the onboard charge pump
generates RS-232 compliant ±5V Tx output levels from a
single VCC supply as low as 4.5V. Four small 0.1µF
capacitors are required for the charge pump. The
transceivers are RS-232 compliant, with the Rx inputs
handling up to ±25V, and the Tx outputs handling ±12V.
In RS-485 mode, the transceivers support both the RS-485
and RS-422 differential communication standards. The
receivers feature "full failsafe" operation, so the Rx outputs
remain in a high state if the inputs are open or shorted
together. The transmitters support up to three data rates, two
of which are slew rate limited for problem free
communications. The charge pump disables when both
ports are in RS-485 mode, thereby saving power, minimizing
noise, and eliminating the charge pump capacitors.
Both RS-232 and RS-485 modes feature loopback and
shutdown functions. Loopback internally connects the Tx
outputs to the corresponding Rx input, to facilitate board
level self test implementation. The outputs remain connected
to the loads during loopback, so connection problems (e.g.,
shorted connectors or cables) can be detected. Shutdown
mode disables the Tx and Rx outputs, disables the charge
pumps, and places the IC in a low current (µA) mode.
The ISL41334 is a QFN packaged device that includes two
additional user selectable, lower speed and edge rate
options for EMI sensitive designs, or to allow longer bus
lengths. It also features a logic supply pin (VL) that sets the
VOH level of logic outputs, and the switching points of logic
inputs, to be compatible with another supply voltage in mixed
voltage systems. The QFN also adds active low Rx enable
pins to increase design flexibility, allowing Tx/Rx direction
control, via a single signal per port, by connecting the
corresponding DE and RE pins together.
• Pb-Free Plus Anneal Available (RoHS Compliant)
• Large (2.7V) Differential VOUT for Improved Noise
Immunity in RS-485/422 Networks
• Full Failsafe (Open/Short) Rx in RS-485/422 Mode
• Loopback Mode Facilitates Board Self Test Functions
• User Selectable RS-485 Data Rates (ISL41334 Only)
- Fast Speed . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20Mbps
- Slew Rate Limited. . . . . . . . . . . . . . . . . . . . . . . 460kbps
- Slew Rate Limited. . . . . . . . . . . . . . . . . . . . . . . 115kbps
• Fast RS-232 Data Rate . . . . . . . . . . . . . . . Up to 650kbps
• Low Current Shutdown Mode. . . . . . . . . . . . . . . . . . .42µA
• QFN Package Saves Board Space (ISL41334 Only)
• Logic Supply Pin (VL) Eases Operation in Mixed Supply
Systems (ISL41334 Only)
Applications
• Gaming Applications (e.g., Slot Machines)
• Single Board Computers
• Factory Automation
• Security Networks
• Industrial/Process Control Networks
• Level Translators (e.g., RS-232 to RS-422)
• Point of Sale Equipment
• Dual Channel RS-485 Interfaces
For a single port version of these devices, please see the
ISL81387/ ISL41387 data sheet.
TABLE 1. SUMMARY OF FEATURES
NO. OF
PORTS
PACKAGE OPTIONS
RS-485 DATA
RATE (bps)
RS-232 DATA
RATE (kbps)
VL PIN?
ACTIVE H or L
Rx ENABLE?
LOW POWER
SHUTDOWN?
ISL81334
2
28 Ld SOIC, 28 Ld SSOP
20M
650
NO
NONE
YES
ISL41334
2
40 Ld QFN (6 x 6mm)
20M, 460k, 115k
650
YES
L
YES
PART NUMBER
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2005. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
ISL81334, ISL41334
Ordering Information
PART NUMBER (NOTE)
PART MARKING
TEMP. RANGE (°C)
PACKAGE (Pb-Free)
PKG. DWG. #
ISL81334IAZ
81334IAZ
-40 to 85
28 Ld SSOP
M28.209
ISL81334IAZ-T
81334IAZ
-40 to 85
28 Ld SSOP Tape and Reel
M28.209
ISL81334IBZ
ISL81334IBZ
-40 to 85
28 Ld SOIC
M28.3
ISL81334IBZ-T
ISL81334IBZ
-40 to 85
28 Ld SOIC Tape and Reel
M28.3
ISL41334IRZ
41334IRZ
-40 to 85
40 Ld QFN
L40.6x6
ISL41334IRZ-T
41334IRZ
-40 to 85
40 Ld QFN Tape and Reel
L40.6x6
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Pinouts
23 DZ1/DE1
Z1 7
VL
Y1 6
NC
24 RA1
NC
25 RB1
B1 5
VCC
A1 4
C2-
26 VCC
C2+
V+ 3
C1+
27 C2-
C1-
28 C2+
C1- 2
NC
C1+ 1
ISL41334 (QFN)
TOP VIEW
NC
ISL81334 (SOIC, SSOP)
TOP VIEW
40
39
38
37
36
35
34
33
32
31
V+
1
30 RB1
A1
2
29 RA1
22 DY1
B1
3
28 DZ1/DE1
SEL1 8
21 LB
Y1
4
27 DY1
SEL2 9
20 ON/OFF
Z1
5
26 LB
7
24 DY2
Z2
8
23 DZ2/DE2
Y2
9
22 RA2
B2
10
21 RB2
15 V-
GND 14
2
11
12
13
14
15
16
17
18
19
20
NC
SEL2
16 RB2
V-
17 RA2
A2 13
RXEN2
B2 12
RXEN1
25 ON/OFF
GND
6
GND
SEL1
SPB
18 DZ2/DE2
SPA
Y2 11
NC
19 DY2
A2
Z2 10
FN6202.1
December 20, 2005
ISL81334, ISL41334
TABLE 2. ISL81334 FUNCTION TABLE
INPUTS
RECEIVER OUTPUTS
DRIVER OUTPUTS
SEL1 or 2
ON/OFF
DE 1 or 2
RA
RB
Y
Z
CHARGE PUMPS
(NOTE 1)
MODE
0
1
N.A.
ON
ON
ON
ON
ON
RS-232
X
0
X
High-Z
High-Z
High-Z
High-Z
OFF
Shutdown
1
1
0
ON
High-Z *
High-Z
High-Z
OFF
RS-485
1
1
1
ON
High-Z *
ON
ON
OFF
RS-485
NOTE:
1. Charge pumps are off iff SEL1 = SEL2 = 1, or if ON/OFF = 0. If ON = 1, and either port is programmed for RS-232 mode, then the charge
pumps are on.
ISL81334 Truth Tables (FOR EACH PORT)
RS-232 TRANSMITTING MODE
INPUTS
SEL1 or 2 ON/OFF
RS-485 TRANSMITTING MODE
OUTPUTS
DY
DZ
Y
Z
INPUTS
SEL1 or 2 ON/OFF
OUTPUTS
DE1 or 2
DY
Y
Z
0
1
0
0
1
1
1
1
1
0
1
0
0
1
0
1
1
0
1
1
1
1
0
1
0
1
1
0
0
1
1
1
0
X
High-Z
High-Z
0
1
1
1
0
0
1
0
X
X
High-Z
High-Z
0
0
X
X
High-Z
High-Z
RS-485 RECEIVING MODE
RS-232 RECEIVING MODE
INPUTS
SEL1 or 2 ON/OFF
INPUTS
OUTPUT
A
B
RA
RB
SEL1 or 2 ON/OFF
OUTPUT
B-A
RA
RB *
0
1
0
0
1
1
1
1
≥ -40mV
1
High-Z
0
1
0
1
1
0
1
1
≤ -200mV
0
High-Z
0
1
1
0
0
1
1
1
Open or Shorted together
1
High-Z
0
1
1
1
0
0
1
0
X
High-Z
High-Z
0
1
Open
Open
1
1
0
0
X
X
High-Z
High-Z
3
* Internally pulled high through a 40kΩ resistor.
FN6202.1
December 20, 2005
ISL81334, ISL41334
TABLE 3. ISL41334 FUNCTION TABLE
INPUTS
SEL1 or 2 ON/OFF
SPA
SPB
RXEN 1
or 2
DE 1 or 2
RECEIVER
OUTPUTS
DRIVER
OUTPUTS
RA
RB
Y
Z
CHARGE
PUMPS
(NOTE 2)
DRIVER
DATA
RATE
(Mbps)
MODE
0
1
X
X
0
N.A.
ON
ON
ON
ON
ON
0.46
RS-232
0
1
X
X
1
N.A.
High-Z
High-Z
ON
ON
ON
0.46
RS-232
X
0
X
X
X
X
High-Z
High-Z
High-Z
High-Z
OFF
N.A.
Shutdown
1
1
X
X
0
0
ON
High-Z * High-Z
High-Z
OFF
N.A.
RS-485
1
1
0
0
0
1
ON
High-Z *
ON
ON
OFF
0.46
RS-485
1
1
0
1
0
1
ON
High-Z *
ON
ON
OFF
0.115
RS-485
1
1
1
0
0
1
ON
High-Z *
ON
ON
OFF
20
RS-485
1
1
1
1
0
1
ON
High-Z *
ON
ON
OFF
20
RS-485
1
1
X
X
1
0
High-Z High-Z * High-Z
High-Z
OFF
N.A.
RS-485
1
1
0
0
1
1
High-Z High-Z *
ON
ON
OFF
0.46
RS-485
1
1
0
1
1
1
High-Z High-Z *
ON
ON
OFF
0.115
RS-485
1
1
1
0
1
1
High-Z High-Z *
ON
ON
OFF
20
RS-485
1
1
1
1
1
1
High-Z High-Z *
ON
ON
OFF
20
RS-485
NOTE:
2. Charge pumps are off iff SEL1 = SEL2 = 1, or if ON/OFF = 0. If ON = 1, and either port is programmed for RS-232 mode, then the charge pumps
are on.
ISL41334 Truth Tables (FOR EACH PORT)
RS-485 TRANSMITTING MODE
RS-232 TRANSMITTING MODE
INPUTS
SEL1 or 2 ON/OFF
OUTPUTS
DY
DZ
Y
Z
SEL1 ON/ DEN
or 2 OFF 1 or 2 SPA SPB
0
1
0
0
1
1
0
1
0
1
1
0
0
1
1
0
0
1
0
1
1
1
0
0
0
0
X
X
High-Z
High-Z
Y
Z
Mbps
1
0
0
0/1
1/0
0/1
0.46
1
1
1
0
1
0/1
1/0
0/1
0.115
1
1
1
1
X
0/1
1/0
0/1
20
1
1
0
X
X
X
High-Z High-Z
N.A.
1
0
X
X
X
X
High-Z High-Z
N.A.
RS-485 RECEIVING MODE
A
B
RA
RB
0
1
0
0
0
1
1
0
1
0
0
1
1
0
0
1
0
1
0
0
1
0
1
0
1
1
0
0
0
1
0
Open
Open
1
1
0
1
1
X
X
High-Z High-Z
0
0
X
X
X
High-Z High-Z
4
DY
1
OUTPUT
RXEN 1
or 2
SEL1 or 2 ON/OFF
DATA
RATE
1
RS-232 RECEIVING MODE
INPUTS
OUTPUTS
INPUTS
INPUTS
OUTPUT
SEL1
or 2
ON/OFF
RXEN 1
or 2
B-A
RA
RB *
1
1
0
≥ -40mV
1
High-Z
1
1
0
≤ -200mV
0
High-Z
1
1
0
Open or Shorted
together
1
High-Z
1
1
1
X
High-Z High-Z
1
0
X
X
High-Z High-Z
* Internally pulled high through a 40kΩ resistor.
FN6202.1
December 20, 2005
ISL81334, ISL41334
Pin Descriptions
PIN
MODE
FUNCTION
GND
BOTH
Ground connection.
LB
BOTH
Enables loopback mode when low. Internally pulled-high.
NC
BOTH
No Connection.
ON/OFF
BOTH
If either port is in RS-232 mode, a low on ON/OFF disables the charge pumps. In either mode, a low disables all the outputs,
and places the device in low power shutdown. Internally pulled-high. ON = 1 for normal operation.
RXEN
BOTH
Active low receiver output enable. Rx is enabled when RXEN is low; Rx is high impedance when RXEN is high. Internally
pulled low. (QFN only)
SEL
BOTH
Interface Mode Select input. High puts corresponding port in RS-485 Mode, while a low puts it in RS-232 Mode.
VCC
BOTH
System power supply input (5V).
VL
BOTH
Logic-Level Supply. All TTL/CMOS inputs and outputs are powered by this supply. (QFN only)
A
RS-232 Receiver input with ±15kV ESD protection. A low on A forces RA high; A high on A forces RA low.
RS-485 Inverting receiver input with ±15kV ESD protection.
B
RS-232 Receiver input with ±15kV ESD protection. A low on B forces RB high; A high on B forces RB low.
RS-485 Noninverting receiver input with ±15kV ESD protection.
DY
RS-232 Driver input. A low on DY forces output Y high. Similarly, a high on DY forces output Y low.
RS-485 Driver input. A low on DY forces output Y high and output Z low. Similarly, a high on DY forces output Y low and output Z high.
DZ
RS-232 Driver input. A low on DZ forces output Z high. Similarly, a high on DZ forces output Z low.
DE
RS-485 Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high. They are high impedance when DE is
low. Internally pulled high when port selected for RS-485 mode.
RA
RS-232 Receiver output.
RS-485 Receiver output: If B > A by at least -40mV, RA is high; If B < A by -200mV or more, RA is low; RA = High if A and B are
unconnected (floating) or shorted together (i.e., full fail-safe).
RB
RS-232 Receiver output.
RS-485 Not used. Internally pulled-high, and unaffected by RXEN.
Y
RS-232 Driver output with ±15kV ESD protection.
RS-485 Inverting driver output with ±15kV ESD protection.
Z
RS-232 Driver output with ±15kV ESD protection.
RS-485 Noninverting driver output with ±15kV ESD protection.
SP
RS-485 Speed control. Internally pulled-high. (QFN only)
C1+
RS-232 External capacitor (voltage doubler) is connected to this lead. Not needed if both ports in RS-485 Mode.
C1-
RS-232 External capacitor (voltage doubler) is connected to this lead. Not needed if both ports in RS-485 Mode.
C2+
RS-232 External capacitor (voltage inverter) is connected to this lead. Not needed if both ports in RS-485 Mode.
C2-
RS-232 External capacitor (voltage inverter) is connected to this lead. Not needed if both ports in RS-485 Mode.
V+
RS-232 Internally generated positive RS-232 transmitter supply (+5.5V). C3 not needed if both ports in RS-485 Mode.
V-
RS-232 Internally generated negative RS-232 transmitter supply (-5.5V). C4 not needed if both ports in RS-485 Mode.
5
FN6202.1
December 20, 2005
ISL81334, ISL41334
Typical Operating Circuit
RS-232 MODE WITHOUT LOOPBACK
+5V
+
+5V
0.1µF
1
C1
0.1µF
+
C2
0.1µF
+
2
28
27
C1+
VCC
V+
C1C2+
3
V- 15
C2-
24
R
5kΩ
5
B1
+
0.1µF
26
4
A1
RS-232 MODE WITH LOOPBACK
25
R
5kΩ
+ C3
0.1µF
C4
0.1µF
+
RA1
RB1
1
C1
0.1µF
+
C2
0.1µF
+
2
28
27
26
C1+
3
V+
C1C2+
V- 15
C4
0.1µF
+
24
R
RA1
5kΩ
5
B1
+ C3
0.1µF
C2-
4
A1
VCC
5kΩ
25
R
RB1
LB
Rx
6
Y1
7
Z1
22
D
23
D
LB
8
ON/OFF
SEL1
DY1
DZ1
21
6
Y1
7
Z1
VCC
20
LB
8
VCC
SEL1
+
C2
0.1µF
+
A1
B1
Z1
VCC
VCC
NOTE: PINOUT FOR SOIC AND SSOP
SAME FOR PORT 2.
NOTE: PINOUT FOR SOIC AND SSOP
SAME FOR PORT 2.
RS-485 MODE WITH LOOPBACK
+5V
0.1µF
2
28
27
C1+
VCC
C1C2+
V+
3
V- 15
C2-
4
24
R
5
6
22
D
7
+ C3
0.1µF
C4
0.1µF
+
+
C2
0.1µF
+
A1
RA1
B1
8
DE1
LB
ON/OFF
SEL1
0.1µF
1
C1
0.1µF
2
28
27
C1+
26
VCC
V+
C1C2+
4
24
R
5
20
GND
VCC
VCC
+ C3
0.1µF
C4
0.1µF
+
RA1
LB
Rx
DY1
21
3
V- 15
C2-
RB1
25
Y1
23
+
26
Z1
VCC
20
14
25
Y1
GND
14
1
C1
0.1µF
ON/OFF
DZ1
21
GND
RS-485 MODE WITHOUT LOOPBACK
+
DY1
23
D
GND
+5V
22
D
VCC
VCC
6
D
7
23
8
22
DE1
LB
ON/OFF
SEL1
RB1
DY1
21
GND
20
VCC
GND
14
14
NOTE: PINOUT FOR SOIC AND SSOP
SAME FOR PORT 2.
NOTE: PINOUT FOR SOIC AND SSOP
SAME FOR PORT 2.
6
FN6202.1
December 20, 2005
ISL81334, ISL41334
Absolute Maximum Ratings (TA = 25°C)
Thermal Information
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
VL (QFN Only) . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to VCC + 0.5V
Input Voltages
All Except A, B (non-QFN Package) . . . . . -0.5V to (VCC + 0.5V)
All Except A, B (QFN Package) . . . . . . . . . . -0.5V to (VL + 0.5V)
Input/Output Voltages
A, B (Any Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25V to +25V
Y, Z (Any Mode, Note 3) . . . . . . . . . . . . . . . . . . . -12.5V to +12.5V
RA, RB (non-QFN Package). . . . . . . . . . . . -0.5V to (VCC + 0.5V)
RA, RB (QFN Package) . . . . . . . . . . . . . . . . -0.5V to (VL + 0.5V)
Output Short Circuit Duration
Y, Z, RA, RB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Thermal Resistance (Typical, Note 4)
θJA (°C/W)
28 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
65
28 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . .
60
40 Ld QFN Package. . . . . . . . . . . . . . . . . . . . . . . . .
32
Maximum Junction Temperature (Plastic Package) . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(SOIC and SSOP - Lead Tips Only)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
3. One output at a time, IOUT ≤ 100mA for ≤ 10 mins.
4. QFN θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features.
θJA for other packages is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief
TB379 and Tech Brief TB389 for details.
Test Conditions: VCC = 4.5V to 5.5V, C1 - C4 = 0.1µF, VL = VCC (for QFN only); Unless Otherwise Specified.
Typicals are at VCC = 5V, TA = 25°C (Note 5)
Electrical Specifications
PARAMETER
TEMP
(°C)
MIN
TYP
MAX
UNITS
Full
-
-
VCC
V
R = 50Ω (RS-422) (Figure 1)
Full
2.5
3.1
-
V
R = 27Ω (RS-485) (Figure 1)
Full
2.2
2.7
5
V
VOD3
RD = 60Ω, R = 375Ω, VCM = -7V to 12V (Figure 1)
Full
2
2.7
5
V
∆VOD
R = 27Ω or 50Ω (Figure 1)
Full
-
0.01
0.2
V
VOC
R = 27Ω or 50Ω (Figure 1) (Note 9)
Full
-
-
3.1
V
∆VOC
R = 27Ω or 50Ω (Figure 1) (Note 9)
Full
-
0.01
0.2
V
Full
35
-
250
mA
VOUT = 12V
Full
-
-
500
µA
VOUT = -7V
Full
-200
-
-
µA
SYMBOL
TEST CONDITIONS
DC CHARACTERISTICS - RS-485 DRIVER (SEL = VCC)
Driver Differential VOUT (no load)
VOD1
Driver Differential VOUT (with load)
VOD2
Change in Magnitude of Driver
Differential VOUT for
Complementary Output States
Driver Common-Mode VOUT
Change in Magnitude of Driver
Common-Mode VOUT for
Complementary Output States
Driver Short-Circuit Current,
VOUT = High or Low
IOS
-7V ≤ (VY or VZ) ≤ 12V (Note 7)
Driver Three-State Output
Leakage Current (Y, Z)
IOZ
Outputs Disabled,
VCC = 0V or 5.5V
DC CHARACTERISTICS - RS-232 DRIVER (SEL = GND)
Driver Output Voltage Swing
VO
All TOUTS Loaded with 3kΩ to Ground
Full
±5.0
+6/-7
-
V
Driver Output Short-Circuit Current
IOS
VOUT = 0V
Full
-60
25/-35
60
mA
DC CHARACTERISTICS - LOGIC PINS (i.e., DRIVER AND CONTROL INPUT PINS)
Input High Voltage
7
VIH1
VL = VCC if QFN
Full
2
1.6
-
V
VIH2
VL = 3.3V (QFN Only)
Full
2
1.2
-
V
VIH3
VL = 2.5V (QFN Only)
Full
1.5
1
-
V
FN6202.1
December 20, 2005
ISL81334, ISL41334
Test Conditions: VCC = 4.5V to 5.5V, C1 - C4 = 0.1µF, VL = VCC (for QFN only); Unless Otherwise Specified.
Typicals are at VCC = 5V, TA = 25°C (Note 5) (Continued)
Electrical Specifications
PARAMETER
SYMBOL
Input Low Voltage
Input Current
TEST CONDITIONS
TEMP
(°C)
MIN
TYP
MAX
UNITS
VIL1
VL = VCC if QFN
Full
-
1.4
0.8
V
VIL2
VL = 3.3V (QFN Only)
Full
-
1
0.7
V
VIL3
VL = 2.5V (QFN Only)
Full
-
-
0.5
V
IIN1
Pins Without Pull-ups or Pull-downs
Full
-2
-
2
µA
IIN2
LB, ON/OFF, DE, SP (QFN), RXEN (QFN)
Full
-25
-
25
µA
-7V ≤ VCM ≤ 12V, Full Failsafe
Full
-0.2
-
-0.04
V
VCM = 0V
25
-
35
-
mV
VIN = 12V
Full
-
-
0.8
mA
VIN = -7V
Full
-0.64
-
-
mA
Full
15
-
-
kΩ
DC CHARACTERISTICS - RS-485 RECEIVER INPUTS (SEL = VCC)
Receiver Differential Threshold
Voltage
VTH
∆VTH
Receiver Input Hysteresis
Receiver Input Current (A, B)
IIN
Receiver Input Resistance
RIN
VCC = 0V or 4.5 to 5.5V
-7V ≤ VCM ≤ 12V, VCC = 0 (Note 8) or
4.5V ≤ VCC ≤ 5.5V
DC CHARACTERISTICS - RS-232 RECEIVER INPUTS (SEL = GND)
Receiver Input Voltage Range
VIN
Full
-25
-
25
V
Receiver Input Threshold
VIL
Full
-
1.4
0.8
V
VIH
Full
2.4
1.9
-
V
Receiver Input Hysteresis
∆VTH
25
-
0.5
-
V
Receiver Input Resistance
RIN
Full
3
5
7
kΩ
VIN = ±15V, VCC Powered Up (Note 8)
DC CHARACTERISTICS - RECEIVER OUTPUTS (485 OR 232 MODE)
Receiver Output High Voltage
VOH1
IO = -2mA (VL = VCC if QFN)
Full
3.5
4.6
-
V
VOH2
IO = -650µA, VL = 3V, QFN Only
Full
2.6
2.9
-
V
VOH3
IO = -500µA, VL = 2.5V, QFN Only
Full
2
2.4
-
V
Receiver Output Low Voltage
VOL
IO = 3mA
Full
-
0.1
0.4
V
Receiver Short-Circuit Current
IOSR
0V ≤ VO ≤ VCC
Full
7
-
85
mA
Receiver Three-State Output
Current
IOZR
Output Disabled, 0V ≤ VO ≤ VCC (or VL for QFN)
Full
-
-
±10
µA
Unused Receiver (RB) Pull-Up
Resistance
ROBZ
ON/OFF = VCC, SELX = VCC (RS-485 Mode)
25
-
40
-
kΩ
ICC232
SEL1 or SEL2 = GND, LB = ON/OFF = VCC
Full
-
3.7
7
mA
ICC485
SEL 1 & 2 = LB = DE = ON/OFF = VCC
Full
-
1.6
5
mA
ISHDN232
ON/OFF = SELX = GND, LB = VCC, (SPX = VCC
if QFN)
Full
-
25
50
µA
ISHDN485
ON/OFF = DEX = GND, SELX =
LB = VCC, (SPX = GND if QFN)
SOIC/SSOP
Full
-
42
80
µA
QFN
Full
-
80
160
µA
POWER SUPPLY CHARACTERISTICS
No-Load Supply Current, Note 6
Shutdown Supply Current
ESD CHARACTERISTICS
Bus Pins (A, B, Y, Z) Any Mode
Human Body Model
25
-
15
-
kV
All Other Pins
Human Body Model
25
-
4
-
kV
8
FN6202.1
December 20, 2005
ISL81334, ISL41334
Test Conditions: VCC = 4.5V to 5.5V, C1 - C4 = 0.1µF, VL = VCC (for QFN only); Unless Otherwise Specified.
Typicals are at VCC = 5V, TA = 25°C (Note 5) (Continued)
Electrical Specifications
PARAMETER
SYMBOL
TEMP
(°C)
TEST CONDITIONS
MIN
TYP
MAX
UNITS
RS-232 DRIVER AND RECEIVER SWITCHING CHARACTERISTICS (SEL = GND, ALL VERSIONS AND SPEEDS)
Driver Output Transition Region
Slew Rate
SR
Driver Output Transition Time
tr, tf
Driver Propagation Delay
tDPHL
CL ≥ 15pF
Full
-
18
30
V/µs
CL ≤ 2500pF
Full
4
12
-
V/µs
RL = 3kΩ, CL = 2500pF, 10% - 90%
Full
0.22
1.2
3.1
µs
RL = 3kΩ, CL = 1000pF (Figure 6)
Full
-
1
2
µs
Full
-
1.2
2
µs
RL = 3kΩ, Measured From
3V to -3V or -3V to 3V
tDPLH
Driver Propagation Delay Skew
tDSKEW
tDPHL - tDPLH (Figure 6)
Full
-
240
400
ns
Driver Enable Time from Shutdown
tDENSD
VOUT = ±3.0V
25
-
20
-
µs
Driver Maximum Data Rate
DRD
RL = 3kΩ, CL = 1000pF, One Transmitter
Switching per port
Full
460
650
-
kbps
Receiver Propagation Delay
tRPHL
CL = 15pF (Figure 7)
Full
-
50
120
ns
Full
-
40
120
ns
tRPHL - tRPLH (Figure 7)
Full
-
10
40
ns
CL = 15pF
Full
0.46
2
-
Mbps
tRPLH
Receiver Propagation Delay Skew
Receiver Maximum Data Rate
tRSKEW
DRR
RS-485 DRIVER SWITCHING CHARACTERISTICS (FAST DATA RATE (20Mbps), SEL = VCC, ALL VERSIONS (SPA = VCC if QFN))
Driver Differential Input to Output
Delay
Driver Output Skew
tDLH, tDHL RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
15
30
50
ns
tSKEW
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
-
0.5
10
ns
tR, tF
RDIFF = 54Ω, CL = 100pF, Figure 2
Full
3
11
20
ns
Driver Enable to Output Low
tZL
CL = 100pF, SW = VCC (Figure 3)
Full
-
27
60
ns
Driver Enable to Output High
tZH
CL = 100pF, SW = GND (Figure 3)
Full
-
24
60
ns
Driver Disable from Output Low
tLZ
CL = 15pF, SW = VCC (Figure 3)
Full
-
31
60
ns
Driver Disable from Output High
tHZ
CL = 15pF, SW = GND (Figure 3)
Full
-
24
60
ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN)
RL = 500Ω, CL = 100pF, SW = VCC (Figure 3)
Full
-
65
250
ns
Driver Enable from Shutdown to
Output High
tZH(SHDN) RL = 500Ω, CL = 100pF, SW = GND (Figure 3)
Full
-
152
250
ns
Full
-
30
-
Mbps
Driver Differential Rise or Fall Time
Driver Maximum Data Rate
fMAX
RDIFF = 54Ω, CL = 100pF (Figure 2)
RS-485 DRIVER SWITCHING CHARACTERISTICS (MEDIUM DATA RATE (460kbps, QFN ONLY), SEL = VCC, SPA = SPB= GND)
Driver Differential Input to Output
Delay
Driver Output Skew
Driver Differential Rise or Fall Time
tDLH, tDHL RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
200
490
1000
ns
tSKEW
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
-
110
400
ns
tR, tF
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
300
600
1100
ns
Driver Enable to Output Low
tZL
CL = 100pF, SW = VCC (Figure 3)
Full
-
30
300
ns
Driver Enable to Output High
tZH
CL = 100pF, SW = GND (Figure 3)
Full
-
128
300
ns
Driver Disable from Output Low
tLZ
CL = 15pF, SW = VCC (Figure 3)
Full
-
31
60
ns
Driver Disable from Output High
tHZ
CL = 15pF, SW = GND (Figure 3)
Full
-
24
60
ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN)
RL = 500Ω, CL = 100pF, SW = VCC (Figure 3)
Full
-
65
500
ns
Driver Enable from Shutdown to
Output High
tZH(SHDN) RL = 500Ω, CL = 100pF, SW = GND (Figure 3)
Full
-
255
500
ns
9
FN6202.1
December 20, 2005
ISL81334, ISL41334
Electrical Specifications
PARAMETER
Test Conditions: VCC = 4.5V to 5.5V, C1 - C4 = 0.1µF, VL = VCC (for QFN only); Unless Otherwise Specified.
Typicals are at VCC = 5V, TA = 25°C (Note 5) (Continued)
SYMBOL
Driver Maximum Data Rate
fMAX
TEST CONDITIONS
RDIFF = 54Ω, CL = 100pF (Figure 2)
TEMP
(°C)
MIN
TYP
MAX
UNITS
Full
-
2000
-
kbps
RS-485 DRIVER SWITCHING CHARACTERISTICS (SLOW DATA RATE (115kbps, QFN ONLY), SEL = VCC, SPA = GND, SPB= VCC)
Driver Differential Input to Output
Delay
Driver Output Skew
Driver Differential Rise or Fall Time
tDLH, tDHL RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
800
1500
2500
ns
tSKEW
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
-
350
1250
ns
tR, tF
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
1000
2000
3100
ns
Driver Enable to Output Low
tZL
CL = 100pF, SW = VCC (Figure 3)
Full
-
32
600
ns
Driver Enable to Output High
tZH
CL = 100pF, SW = GND (Figure 3)
Full
-
300
600
ns
Driver Disable from Output Low
tLZ
CL = 15pF, SW = VCC (Figure 3)
Full
-
31
60
ns
Driver Disable from Output High
tHZ
CL = 15pF, SW = GND (Figure 3)
Full
-
24
60
ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN)
RL = 500Ω, CL = 100pF, SW = VCC (Figure 3)
Full
-
65
800
ns
Driver Enable from Shutdown to
Output High
tZH(SHDN) RL = 500Ω, CL = 100pF, SW = GND (Figure 3)
Full
-
420
800
ns
Full
-
800
-
kbps
Driver Maximum Data Rate
fMAX
RDIFF = 54Ω, CL = 100pF (Figure 2)
RS-485 RECEIVER SWITCHING CHARACTERISTICS (SEL = VCC, ALL VERSIONS AND SPEEDS)
Receiver Input to Output Delay
tPLH, tPHL
(Figure 4)
Full
20
50
90
ns
Receiver Skew | tPLH - tPHL |
tSKEW
(Figure 4)
Full
-
0.1
10
ns
Receiver Maximum Data Rate
fMAX
Full
-
40
-
Mbps
RECEIVER ENABLE/DISABLE CHARACTERISTICS (ALL MODES AND SPEEDS)
Receiver Enable to Output Low
tZL
QFN Only, CL = 15pF, SW = VCC (Figure 5)
Full
-
22
60
ns
Receiver Enable to Output High
tZH
QFN Only, CL = 15pF, SW = GND (Figure 5)
Full
-
23
60
ns
Receiver Disable from Output Low
tLZ
QFN Only, CL = 15pF, SW = VCC (Figure 5)
Full
-
24
60
ns
Receiver Disable from Output High
tHZ
QFN Only, CL = 15pF, SW = GND (Figure 5)
Full
-
25
60
ns
Receiver Enable from Shutdown to
Output Low
tZLSHDN
CL = 15pF, SW = VCC (Figure 5)
RS-485 Mode
Full
-
260
700
ns
RS-232 Mode
25
-
35
-
ns
Receiver Enable from Shutdown to
Output High
tZHSHDN
RS-485 Mode
Full
-
260
700
ns
RS-232 Mode
25
-
25
-
ns
CL = 15pF, SW = GND (Figure 5)
NOTES:
5. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless
otherwise specified.
6. Supply current specification is valid for loaded drivers when DE = 0V (RS-485 mode only).
7. Applies to peak current. See “Typical Performance Curves” for more information.
8. RIN defaults to RS-485 mode (>15kΩ) when the device is unpowered (VCC = 0V), regardless of the state of the SEL inputs.
9. VCC ≤ 5.25V.
10
FN6202.1
December 20, 2005
ISL81334, ISL41334
Test Circuits and Waveforms
R
VCC
DE
Y
DY
RD
D
VOD
Z
VOC
R
FIGURE 1. RS-485 DRIVER VOD AND VOC TEST CIRCUIT
3V
DY
1.5V
1.5V
0V
VCC
CL = 100pF
DE
VOH
Y
DY
tPHL
tPLH
RDIFF
D
Z
50%
OUT (Z)
50%
VOL
CL = 100pF
tPHL
SIGNAL
GENERATOR
tPLH
VOH
OUT (Y)
50%
50%
VOL
tDLH
tDHL
90%
DIFF OUT (Z - Y)
10%
+VOD
90%
0V
0V
10%
tR
-VOD
tF
SKEW = |tPLH (Y or Z) - tPHL (Z or Y)|
FIGURE 2A. TEST CIRCUIT
FIGURE 2B. MEASUREMENT POINTS
FIGURE 2. RS-485 DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
11
FN6202.1
December 20, 2005
ISL81334, ISL41334
Test Circuits and Waveforms (Continued)
DE
Y
DY
500Ω
VCC
D
SIGNAL
GENERATOR
SW
Z
GND
ENABLED
DE
(ON/OFF FOR SHDN)
3V
1.5V
1.5V
0V
CL
tZH
tZH(SHDN)
OUTPUT HIGH
OUT (Y, Z)
FOR SHDN TESTS, SWITCH ON/OFF RATHER THAN DE
PARAMETER
ON/DE
OUTPUT
DY
SW
tHZ
1/-
Y/Z
0/1
GND
15
tLZ
1/-
Y/Z
1/0
VCC
15
tZH
1/-
Y/Z
0/1
GND
100
tZL
1/-
Y/Z
1/0
VCC
100
tZH(SHDN)
-/1
Y/Z
0/1
GND
100
tZL(SHDN)
-/1
Y/Z
1/0
VCC
100
tHZ
VOH - 0.5V VOH
2.3V
0V
CL (pF)
tZL
tZL(SHDN)
tLZ
VCC
OUT (Y, Z)
2.3V
OUTPUT LOW
VOL + 0.5V V
OL
FIGURE 3B. MEASUREMENT POINTS
FIGURE 3A. TEST CIRCUIT
FIGURE 3. RS-485 DRIVER ENABLE AND DISABLE TIMES
RXEN (QFN ONLY)
0V
+1.5V
15pF
A
0V
RA
R
B
B
0V
-1.5V
tPLH
tPHL
VCC
SIGNAL
GENERATOR
RA
1.5V
1.5V
0V
FIGURE 4B. MEASUREMENT POINTS
FIGURE 4A. TEST CIRCUIT
FIGURE 4. RS-485 RECEIVER PROPAGATION DELAY
3V
RXEN (QFN ONLY)
A
R
SIGNAL
GENERATOR
1kΩ
RA
VCC
SW
B
ON/OFF
(FOR SHDN TESTS)
0V
ENABLED
GND
15pF
1.5V
3V
RXEN (QFN ONLY)
1.5V
1.5V
0V
FOR SHDN TESTS, SWITCH ON/OFF RATHER THAN RXEN
PARAMETER
ON/RXEN
B
SW
tHZ (QFN Only)
1/-
+1.5V
GND
tLZ (QFN Only)
1/-
-1.5V
VCC
tZH (QFN Only)
1/-
+1.5V
GND
tZL (QFN Only)
1/-
-1.5V
VCC
tZH(SHDN)
-/0
+1.5V
GND
tZL(SHDN)
-/0
-1.5V
VCC
FIGURE 5A. TEST CIRCUIT
tZH
tZH(SHDN)
OUTPUT HIGH
RA
tHZ
VOH - 0.5V VOH
1.5V
0V
tZL
tZL(SHDN)
RA
tLZ
VCC
1.5V
VOL + 0.5V V
OUTPUT LOW
OL
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. RS-485 RECEIVER ENABLE AND DISABLE TIMES
12
FN6202.1
December 20, 2005
ISL81334, ISL41334
Test Circuits and Waveforms (Continued)
VCC
3V
DE
DY,Z
DY,Z
1.5V
1.5V
CL
Y, Z
0V
D
tDPHL
VO+
RL
SIGNAL
GENERATOR
tDPLH
OUT (Y,Z)
0V
0V
VO-
SKEW = |tDPHL - tDPLH|
FIGURE 6B. MEASUREMENT POINTS
FIGURE 6A. TEST CIRCUIT
FIGURE 6. RS-232 DRIVER PROPAGATION DELAY AND TRANSITION TIMES
3V
RXEN
A, B
A, B
R
RA, RB
1.3V
1.7V
CL = 15pF
0V
tRPLH
tRPHL
SIGNAL
GENERATOR
2.4V
RA, RB
0.8V
VOH
VOL
SKEW = |tRPHL - tRPLH|
FIGURE 7A. TEST CIRCUIT
FIGURE 7B. MEASUREMENT POINTS
FIGURE 7. RS-232 RECEIVER PROPAGATION DELAY AND TRANSITION TIMES
13
FN6202.1
December 20, 2005
ISL81334, ISL41334
Typical Application
Detailed Description
RS-232 to RS-485 Converter
Each of the two ISLX1334 ports supports dual protocols:
RS-485/422, and RS-232. RS-485 and RS-422 are
differential (balanced) data transmission standards for use in
high speed (up to 20Mbps) networks, or long haul and noisy
environments. The differential signaling, coupled with
RS-485’s requirement for extended common mode range
(CMR) of +12V to -7V make these transceivers extremely
tolerant of ground potential differences, as well as voltages
induced in the cable by external fields. Both of these effects
are real concerns when communicating over the
RS-485/422 maximum distance of 4000’ (1220m). It is
important to note that the ISLX1334 don’t follow the RS-485
convention whereby the inverting I/O is labeled “B/Z”, and
the noninverting I/O is “A/Y”. Thus, in the application
diagrams below the 1334 A/Y (B/Z) pins connect to the B/Z
(A/Y) pins of the generic RS-485/422 ICs.
The ISLX1334 are ideal for implementing a single IC 2-wire
(Tx Data, Rx Data) protocol converter, because each port can
be programmed for a different protocol. Figure 8 illustrates the
simple connections to create a single transceiver RS-232 to
RS-485 converter. Depending on the RS-232 data rate, using
an RS-422 bus as an RS-232 “extension cord” can extend the
transmission distance up to 4000’ (1220m). A similar circuit on
the other end of the cable completes the conversion to/from
RS-232.
+5V
+ 0.1µF
C1
0.1µF
+
1
26
C1+
C2
0.1µF
2
C128
C2+
+
27
C2-
NC
4 A1
TxD
RS-232 IN
5 B1
VCC
V- 15
R
5kΩ
R
5kΩ
6 Y1
NC
RxD
RS-232 OUT
D
7 Z1
8
VCC
9
D
C4
0.1µF
+
RA1 24
NC
RS-422 is typically a point-to-point (one driver talking to one
receiver on a bus), or a point-to-multipoint (multidrop)
standard that allows only one driver and up to 10 receivers
on each bus. Because of the one driver per bus limitation,
RS-422 networks use a two bus, full duplex structure for
bidirectional communication, and the Rx inputs and Tx
outputs (no tri-state required) connect to different busses, as
shown in Figure 10.
RB1 25
DY1 22
DZ1 23
11
Y2
10
Z2
20
ON/OFF
SEL2
12 B2
RS-485 OUT
+C3
0.1µF
SEL1
13 A2
RS-485 IN
3
V+
R
D
Conversely, RS-485 is a true multipoint standard, which
allows up to 32 devices (any combination of drivers- must be
tri-statable - and receivers) on each bus. Now bidirectional
communication takes place on a single bus, so the Rx inputs
and Tx outputs of a port connect to the same bus lines, as
shown in Figure 9. Each port set to RS-485 /422 mode
includes one Rx and one Tx.
VCC
RA2 17
DY2 19
DE2 18
VCC
GND
14
NOTE: PINOUT FOR SOIC AND SSOP
FIGURE 8. SINGLE IC RS-232 TO RS-485 CONVERTER
+
GENERIC 1/2 DUPLEX 485 XCVR
+5V
+
+5V
B
DI
GENERIC 1/2 DUPLEX 485 XCVR
+5V
D
+
0.1µF
VCC
GND
VCC
RO
R
B/Z
A
RXEN *
DE
R
0.1µF
VCC
R
RE
0.1µF
ISLX1334
RA
RO
Tx/Rx
RE
A/Y
DE
DE
B/Z
Y
DI
DY
D
D
A/Y
Z
GND
RT
RT
GND
* QFN ONLY
FIGURE 9. TYPICAL HALF DUPLEX RS-485 NETWORK
14
FN6202.1
December 20, 2005
ISL81334, ISL41334
+
GENERIC 422 Rx (SLAVE)
RO
RE
GENERIC FULL DUPLEX 422 XCVR (SLAVE)
0.1µF
+5V
+
ISLX1334 (MASTER)
1kΩ
OR NC
+5V
R
0.1µF
+5V
VCC
+
GND
B
0.1µF
A
D
VCC
RT
VCC
Z
A
Y
B
DY
DE
RA
Z
RT
A
RO
R
DI
R
B
D
Y
GND
GND
FIGURE 10. TYPICAL RS-422 NETWORK
RS-232 is a point-to-point, singled ended (signal voltages
referenced to GND) communication protocol targeting fairly
short (<150’, 46m) and low data rate (<1Mbps) applications.
Each port contains two transceivers (2 Tx and 2 Rx) in
RS-232 mode.
Rx outputs are short circuit protected, and are only tristatable when the entire IC is shutdown via the ON/OFF pin,
or via the active low RXEN pin available on the QFN
package option (see “ISL41334 Special Features” for more
details).
Protocol selection is handled via a logic pin (SELX) for each
port.
Tx Features
ISLX1334 Advantages
.
These dual protocol ICs offer many parametric
improvements versus those offered on competing dual
protocol devices. Some of the major improvements are:
15kV Bus Pin ESD - Eases board level requirements;
2.7V Diff VOUT - Better Noise immunity and/or distance;
Full Failsafe RS-485 Rx - Eliminates bus biasing;
Selectable RS-485 Data Rate - Up to 20Mbps, or slew
rate limited for low EMI and fewer termination issues;
High RS-232 Data Rate - >460kbps
Lower Tx and Rx Skews - Wider, consistent bit widths;
Lower ICC - Max ICC is 2-4X lower than competition;
Flow-Thru Pinouts - Tx, Rx bus pins on one side/logic
pins on the other, for easy routing to connector/UART;
Smaller (SSOP and QFN) and Pb-free Packaging.
RS-232 Mode
Rx Features
RS-232 receivers invert and convert RS-232 input levels
(±3V to ±25V) to the standard TTL/CMOS levels required by
a UART, ASIC, or µcontroller serial port. Receivers are
designed to operate at faster data rates than the drivers, and
they feature very low skews (10ns) so the receivers
contribute negligibly to bit width distortion. Inputs include the
standards required 3kΩ to 7kΩ pulldown resistor, so unused
inputs may be left unconnected. Rx inputs also have built-in
hysteresis to increase noise immunity, and to decrease
erroneous triggering due to slowly transitioning input signals.
15
RS-232 drivers invert and convert the standard TTL/CMOS
levels from a UART, or µcontroller serial port to RS-232
compliant levels (±5V minimum). The Tx delivers these
compliant output levels even at data rates of 650kbps, and
with loads of 1000pF. The drivers are designed for low skew
(typically 12% of the 500kbps bit width), and are compliant to
the RS-232 slew rate spec (4 to 30V/µs) for a wide range of
load capacitances. Tx inputs float if left unconnected, and
may cause ICC increases. For the best results, connect
unused inputs to GND.
Tx outputs are short circuit protected, and incorporate a
thermal SHDN feature to protect the IC in situations of
severe power dissipation. See the RS-485 section for more
details. Drivers tri-state only in SHDN, or when the 5V power
supply is off. The SHDN function is useful for tri-stating the
outputs if both ports will always be tri-stated together (e.g.,
used as a four transceiver RS-232 port), and if it is
acceptable for the Rx to be disabled as well. A single port Tx
disable can be accomplished by switching the port to
RS-485 mode, and then using the corresponding DE pin to
tri-state the drivers. Of course, the Rx is now an RS-485 Rx,
so this option is feasible only if the Rx aren’t needed when
the Tx are disabled.
Charge Pumps
The on-chip charge pumps create the RS-232 transmitter
power supplies (typically +6/-7V) from a single supply as low
as 4.5V, and are enabled only if either port is configured for
RS-232 operation. The efficient design requires only four
FN6202.1
December 20, 2005
ISL81334, ISL41334
small 0.1µF capacitors for the voltage doubler and inverter
functions. By operating discontinuously (i.e., turning off as
soon as V+ and V- pump up to the nominal values), the
charge pump contribution to RS-232 mode ICC is reduced
significantly. Unlike competing devices that require the
charge pump in RS-485 mode, disabling the charge pump
saves power, and minimizes noise. If the application keeps
both ports in RS-485 mode (e.g., a dedicated dual channel
RS-485 interface), then the charge pump capacitors aren’t
even required.
Data Rates and Cabling
Drivers operate at data rates up to 650kbps, and are
guaranteed for data rates up to 460kbps. The charge pumps
and drivers are designed such that one driver in each port
can be operated at the rated load, and at 460kbps (see
Figure 34). Figure 34 also shows that drivers can easily drive
several thousands of picofarads at data rates up to 250kbps,
while still delivering compliant ±5V output levels.
Receivers operate at data rates up to 2Mbps. They are
designed for a higher data rate to facilitate faster factory
downloading of software into the final product, thereby
improving the user’s manufacturing throughput.
Figures 37 and 38 illustrate driver and receiver waveforms at
250kbps, and 500kbps, respectively. For these graphs, one
driver of each port drives the specified capacitive load, and a
receiver in the port.
RS-232 doesn’t require anything special for cabling; just a
single bus wire per transmitter and receiver, and another
wire for GND. So an ISLX1334 RS-232 port uses a five
conductor cable for interconnection. Bus terminations are
not required, nor allowed, by the RS-232 standard.
RS-485 Mode
Rx Features
RS-485 receivers convert differential input signals as small
as 200mV, as required by the RS-485 and RS-422
standards, to TTL/CMOS output levels. The differential Rx
provides maximum sensitivity, noise immunity, and common
mode rejection. Per the RS-485 standard, receiver inputs
function with common mode voltages as great as ±7V
outside the power supplies (i.e., +12V and -7V), making
them ideal for long networks where induced voltages are a
realistic concern. Each RS-485/422 port includes a single
receiver (RA), and the unused Rx output (RB) is disabled,
but pulled high by an internal current source. The internal
current source turns off in SHDN.
Worst case receiver input currents are 20% lower than the 1
“unit load” (1mA) RS-485 limit, which translates to a 15kΩ
minimum input resistance.
These receivers include a “full fail-safe” function that
guarantees a high level receiver output if the receiver inputs
are unconnected (floating), shorted together, or if the bus is
16
terminated but undriven (i.e., differential voltage collapses to
near zero due to termination). Failsafe with shorted, or
terminated and undriven inputs is accomplished by setting
the Rx upper switching point at -40mV, thereby ensuring that
the Rx recognizes a 0V differential as a high level.
All the Rx outputs are short circuit protected, and are tri-state
when the IC is forced into SHDN, but ISL81334 (SOIC and
SSOP) receiver outputs are not independently tri-statable.
ISL41334 (QFN) receiver outputs are tri-statable via an
active low RXEN input for each port (see “ISL41334 Special
Features” for more details).
Tx Features
The RS-485/422 driver is a differential output device that
delivers at least 2.2V across a 54Ω load (RS-485), and at
least 2.5V across a 100Ω load (RS-422). Both levels
significantly exceed the standards requirements, and these
exceptional output voltages increase system noise immunity,
and/or allow for transmission over longer distances. The
drivers feature low propagation delay skew to maximize bit
widths, and to minimize EMI.
To allow multiple drivers on a bus, the RS-485 spec requires
that drivers survive worst case bus contentions undamaged.
The ISLX1334 drivers meet this requirement via driver
output short circuit current limits, and on-chip thermal
shutdown circuitry. The output stages incorporate current
limiting circuitry that ensures that the output current never
exceeds the RS-485 spec, even at the common mode
voltage range extremes. In the event of a major short circuit
condition, devices also include a thermal shutdown feature
that disables the drivers whenever the die temperature
becomes excessive. This eliminates the power dissipation,
allowing the die to cool. The drivers automatically re-enable
after the die temperature drops about 15 degrees. If the
contention persists, the thermal shutdown/re-enable cycle
repeats until the fault is cleared. Receivers stay operational
during thermal shutdown.
RS-485 multi-driver operation also requires drivers to include
tri-state functionality, so each port has a DE pin to control
this function. If the driver is used in an RS-422 network, such
that driver tri-state isn’t required, then the DE pin can be left
unconnected and an internal pull-up keeps it in the enabled
state. Drivers are also tri-stated when the IC is in SHDN, or
when the 5V power supply is off.
Speed Options
The ISL81334 (SOIC/SSOP) has fixed, high slew rate driver
outputs optimized for 20Mbps data rates. The ISL41334
(QFN) offers three user selectable data rate options: “Fast”
for high slew rate and 20Mbps; “Medium” with slew rate
limiting set for 460kbps; “Slow” with even more slew rate
limiting for 115kbps operation. See the “Data Rate“ and
“Slew Rate Limited Data Rates” sections for more
information.
Receiver performance is the same for all three speed
options.
FN6202.1
December 20, 2005
ISL81334, ISL41334
RS-485/422 are intended for network lengths up to 4000’
(1220m), but the maximum system data rate decreases as
the transmission length increases. Devices operating at the
maximum data rate of 20Mbps are limited to lengths of 2030’ (6-9m), while devices operating at or below 115kbps can
operate at the maximum length of 4000’ (1220m).
Higher data rates require faster edges, so both the
ISLX1334 versions offer an edge rate capable of 20Mbps
data rates. The ISL41334 also offers two slew rate limited
edge rates to minimize problems at slower data rates.
Nevertheless, for the best jitter performance when driving
long cables, the faster speed settings may be preferable,
even at low data rates. See the “RS-485 Slew Rate Limited
Data Rates” section for details.
Twisted pair is the cable of choice for RS-485/422 networks.
Twisted pair cables tend to pick up noise and other
electromagnetically induced voltages as common mode
signals, which are effectively rejected by the differential
receivers in these ICs.
The preferred cable connection technique is “daisychaining”, where the cable runs from the connector of one
device directly to the connector of the next device, such that
cable stub lengths are negligible. A “backbone” structure,
where stubs run from the main backbone cable to each
device’s connector, is the next best choice, but care must be
taken to ensure that each stub is electrically “short”. See
Table 4 for recommended maximum stub lengths for each
speed option.
TABLE 4. RECOMMENDED STUB LENGTHS
SPEED OPTION
MAXIMUM STUB LENGTH
ft (m)
SLOW
350-500 (107-152)
MED
100-150 (30.5 - 46)
FAST
1-3 (0.3 - 0.9)
Proper termination is imperative to minimize reflections
when using the 20Mbps speed option. Short networks using
the medium and slow speed options need not be terminated,
but terminations are recommended unless power dissipation
is an overriding concern. Note that the RS-485 spec allows a
maximum of two terminations on a network, otherwise the Tx
output voltage may not meet the required VOD.
In point-to-point, or point-to-multipoint (RS-422) networks,
the main cable should be terminated in its characteristic
impedance (typically 120Ω) at the end farthest from the
driver. In multi-receiver applications, stubs connecting
receivers to the main cable should be kept as short as
possible, but definitely shorter than the limits shown in Table
4. Multipoint (RS-485) systems require that the main cable
be terminated in its characteristic impedance at both ends.
Again, keep stubs connecting a transceiver to the main
17
cable as short as possible, and refer to Table 4. Avoid “star”,
and other configurations, where there are many “ends”
which would require more than the two allowed terminations
to prevent reflections.
High ESD
All pins on the ISLX1334 include ESD protection structures
rated at ±4kV (HBM), which is good enough to survive ESD
events commonly seen during manufacturing. But the bus
pins (Tx outputs and Rx inputs) are particularly vulnerable to
ESD events because they connect to an exposed port on the
exterior of the finished product. Simply touching the port
pins, or connecting a cable, can destroy an unprotected port.
ISLX1334 bus pins are fitted with advanced structures that
deliver ESD protection in excess of ±15kV (HBM), without
interfering with any signal in the RS-485 or the RS-232
range. This high level of protection may eliminate the need
for board level protection, or at the very least will increase
the robustness of any board level scheme.
Small Packages
Many competing dual protocol ICs are available only in
monstrously large 24 to 28 Ld SOIC packages. The
ISL81334’s 28 Ld SSOP is 50% smaller than even a 24 Ld
SOIC, and the ISL41334’s tiny 6x6mm QFN is 80% smaller
than a 28 Ld SOIC.
Flow Through Pinouts
Even the ISLX1334 pinouts are features, in that the “flowthrough” design simplifies board layout. Having the bus pins
all on one side of the package for easy routing to a cable
connector, and the Rx outputs and Tx inputs on the other
side for easy connection to a UART, avoids costly and
problematic crossovers. Figure 11 illustrates the flowthrough nature of the pinout.
ISL81334
A1
B1
CONNECTOR
Data Rate, Cables, and Terminations
Y1
Z1
Z2
Y2
B2
A2
UART
R
D
RA1
OR
DY1
ASIC
OR
DY2
µCONTROLLER
RA2
FIGURE 11. ILLUSTRATION OF FLOW THROUGH PINOUT
Low Power Shutdown (SHDN) Mode
The ON/OFF pin is driven low to place the IC (both ports) in
the SHDN mode, and the already low supply current drops to
as low as 25µA. If this functionality isn’t desired, the pin can
be left disconnected (thanks to the internal pull-up), or it
should be connected to VCC (VL for the QFN), through a
1kΩ resistor. SHDN disables the Tx and Rx outputs, and
FN6202.1
December 20, 2005
ISL81334, ISL41334
disables the charge pumps if either port is in RS-232 mode,
so V+ collapses to VCC, and V- collapses to GND.
All but 5uA of SHDN ICC current is due to control input (ON,
LB, SP, DE) pull-up resistors (~20µA/resistor), so SHDN ICC
varies depending on the ISLX1334 configuration. The spec
tables indicate the worst case values, but careful selection of
the configuration yields lower currents. For example, in RS232 mode the SP pins aren’t used, so if both ports are
configured for RS-232, floating or tying the SP pins high
minimizes SHDN ICC. Likewise in RS-485 mode, the drivers
are disabled in SHDN, so driving the DE pins high during this
time also reduces ICC.
from a 5V powered dual protocol IC might seriously
overdrive and damage the logic device input. Similarly, the
the logic device’s low VOH might not exceed the VIH of a 5V
powered dual protocol input. Connecting the VL pin to the
power supply of the logic device - as shown in Figure 12 limits the ISL41334’s Rx output VOH to VL (see Figure 15),
and reduces the Tx and control input switching points to
values compatible with the logic device output levels.
Tailoring the logic pin input switching points and output levels
to the supply voltage of the UART, ASIC, or µcontroller
eliminates the need for a level shifter/translator between the
two ICs.
VCC = +5V
On the ISL41334, the SHDN ICC increases as VL
decreases. VL powers the input stage and sets its VOH at VL
rather than VCC. VCC powers the second stage, but the
second stage input isn’t driven to the rail, so some ICC
current flows. See Figure 21 for details.
When enabling from SHDN in RS-232 mode, allow at least
20µs for the charge pumps to stabilize before transmitting
data. The charge pumps aren’t used in RS-485 mode, so the
transceiver is ready to send or receive data in less than 1µs,
which is much faster than competing devices that require the
charge pump for all modes of operation.
Internal Loopback Mode
Driving the LB pin low places both ports in the loopback
mode, a mode that facilitates implementing board level self
test functions. In loopback, internal switches disconnect the
Rx inputs from the Rx outputs, and feed back the Tx outputs
to the appropriate Rx output. This way the data driven at the
Tx input appears at the corresponding Rx output (refer to
“Typical Operating Circuits”). The Tx outputs remain
connected to their terminals, so the external loads are
reflected in the loopback performance. This allows the
loopback function to potentially detect some common bus
faults such as one or both driver outputs shorted to GND, or
outputs shorted together.
Note that the loopback mode uses an additional set of
receivers, as shown in the “Typical Operating Circuits”.
These loopback receivers are not standards compliant, so
the loopback mode can’t be used to implement a half-duplex
RS-485 transceiver.
If loopback won’t be utilized, the pin can be left disconnected
(thanks to the internal pull-up), or it should be connected to
VCC (VL for the QFN), through a 1kΩ resistor.
RA
VCC = +2V
VOH = 5V
RXD
VIH ≥ 2V
DY
VOH ≤ 2V
ESD
DIODE
TXD
GND
GND
ISL81334
UART/PROCESSOR
VCC = +5V
VCC = +2V
VL
RA
VOH = 2V
RXD
VIH = 0.9V
DY
VOH ≤ 2V
GND
ESD
DIODE
TXD
GND
ISL41334
UART/PROCESSOR
FIGURE 12. USING VL PIN TO ADJUST LOGIC LEVELS
VL can be anywhere from VCC down to 1.65V, but the input
switching points may not provide enough noise margin when
VL < 1.8V. Table 5 indicates typical VIH and VIL values for
various VL values so the user can ascertain whether or not a
particular VL voltage meets his needs.
TABLE 5. VIH AND VIL vs. VL FOR VCC = 5V
ISL41334 (QFN Package) Special Features
VL (V)
VIH (V)
VIL (V)
Logic Supply (VL Pin)
1.65V
0.79
0.50
1.8V
0.82
0.60
2.0V
0.87
0.69
2.5V
0.99
0.86
3.3V
1.19
1.05
The ISL41334 (QFN) includes a VL pin that powers the logic
inputs (Tx inputs and control pins) and Rx outputs. These
pins interface with “logic” devices such as UARTs, ASICs,
and µcontrollers, and today most of these devices use power
supplies significantly lower than 5V. Thus, a 5V output level
18
FN6202.1
December 20, 2005
ISL81334, ISL41334
The VL supply current (IL) is typically less than 100µA, as
shown in Figures 20 and 21. All of the DC VL current is due
to inputs with internal pull-up resistors (DE, SP, LB, ON/OFF)
being driven to the low input state. The worst case IL current
occurs during SHDN (see Figure 20), due to the IL through
the ON/OFF pin pull-up resistor when that pin is driven low.
IIL through an input pull-up resistor is ~20µA, so the IL in
Figure 20 drops by about 40µA (at VL = 5V) when the two
SP inputs are high (middle vs. top curve). IL is lowest in the
RS-232 mode, because only the ON/OFF pin should be
driven low. When all these inputs are driven high, IL drops to
<1µA, so to minimize power dissipation drive these inputs
high when unneeded (e.g., SP inputs aren’t used in RS-232
mode, so drive them high).
Active Low Rx Enable (RXEN)
In many RS-485 applications, especially half duplex
configurations, users like to accomplish “echo cancellation”
by disabling the corresponding receiver while its driver is
transmitting data. This function is available on the QFN
package via an active low RXEN pin for each port. The
active low function also simplifies direction control, by
allowing a single Tx/Rx direction control line. If an active high
RXEN were used, either two valuable I/O pins would be
used for direction control, or an external inverter is required
between DE and RXEN. Figure 13 details the advantage of
using the RXEN pin.
+5V
ISL81387
0.1µF
B
R
A
RXEN
Tx/Rx
DEN
DY
Z
GND
ACTIVE HIGH RX ENABLE
+5V
ISL41334
+
VCC
RA
R
Speed selection is via the SPA and SPB pins (see Table 3),
and the selection pertains to each port programmed for
RS-485 mode.
Evaluation Board
Y
D
The SOIC and SSOP versions of this IC operate with Tx
output transitions optimized for a 20Mbps data rate. These
fast edges may increase EMI and reflection issues, even
though fast transitions aren’t required at the lower data rates
used by many applications. The ISL41334 (QFN version)
solves this problem by offering two additional, slew rate
limited, data rates that are optimized for speeds of 115kbps,
and 460kbps.The slew limited edges permit longer
unterminated networks, or longer stubs off terminated
busses, and help minimize EMI and reflections.
Nevertheless, for the best jitter performance when driving
long cables, the faster speed options may be preferable,
even at lower data rates. The faster output transitions deliver
less variability (jitter) when loaded with the large capacitance
associated with long cables. Figures 43, 44, and 45 detail
the jitter performance of the three speed options while
driving three different cable lengths. The figures show that
under all conditions the faster the edge rate, the better the
jitter performance. Of course, faster transitions require more
attention to ensuring short stub lengths, and quality
terminations, so there are trade-offs to be made. Assuming a
jitter budget of 10%, it is likely better to go with the slow
speed option for data rates of 115kbps or less, to minimize
fast edge effects. Likewise, the medium speed option is a
good choice for data rates between 115kbps and 460kbps.
For higher data rates, or when the absolute best jitter is
required, use the high speed option.
+
VCC
RA
RS-485 Slew Rate Limited Data Rates
0.1µF
An evaluation board, part number ISL41334EVAL1, is
available to assist in assessing the dual protocol IC’s
performance. The evaluation board contains a QFN
packaged device, but because the same die is used in all
packages, the board is also useful for evaluating the
functionality of the other versions. The board’s design allows
for evaluation of all standard features, plus the QFN specific
features. Refer to the eval board application note for details,
and contact your sales rep for ordering information.
B
A
RXEN *
Tx/Rx
DE
Y
DY
D
Z
GND
* QFN ONLY
ACTIVE LOW RX ENABLE
FIGURE 13. USING ACTIVE LOW vs ACTIVE HIGH RX
ENABLE
19
FN6202.1
December 20, 2005
ISL81334, ISL41334
Typical Performance Curves
VCC = VL = 5V, TA = 25°C; Unless Otherwise Specified
5
50
40
VOL, 85°C
30
20
VOH, 25°C
VOH, 85°C
10
4
HIGH OUTPUT VOLTAGE (V)
RECEIVER OUTPUT CURRENT (mA)
VOL, 25°C
3
IOH = -1mA
2
IOH = -8mA
1
IOH = -4mA
0
0
0
1
2
3
4
5
0
1
2
RECEIVER OUTPUT VOLTAGE (V)
FIGURE 14. RECEIVER OUTPUT CURRENT vs RECEIVER
OUTPUT VOLTAGE
5
3.6
DIFFERENTIAL OUTPUT VOLTAGE (V)
90
DRIVER OUTPUT CURRENT (mA)
4
FIGURE 15. RECEIVER HIGH OUTPUT VOLTAGE vs LOGIC
SUPPLY VOLTAGE (VL)
100
80
70
60
50
40
30
20
10
0
3
VL (V)
0
1
2
3
4
DIFFERENTIAL OUTPUT VOLTAGE (V)
3.5
RDIFF = 100Ω
3.4
3.3
3.2
RDIFF = 54Ω
3.1
3
-40
5
-25
0
25
50
85
75
TEMPERATURE (°C)
FIGURE 17. RS-485, DRIVER DIFFERENTIAL OUTPUT
VOLTAGE vs TEMPERATURE
FIGURE 16. RS-485, DRIVER OUTPUT CURRENT vs
DIFFERENTIAL OUTPUT VOLTAGE
4
150
RS-232, RXEN = X
Y OR Z = LOW
FULL TEMP RANGE
3.5
3
50
ICC (mA)
OUTPUT CURRENT (mA)
100
0
Y OR Z = HIGH
-50
2.5
2
RS-485, HALF DUPLEX, DE = VCC, RXEN = X
RS-485, FULL DUPLEX, DE = VCC, RXEN = X
25°C
85°C
1.5
-100
RS-485, DE = GND, RXEN = X
-40°C
-150
-7 -6
-4
-2
0
2
4
6
OUTPUT VOLTAGE (V)
8
10
12
FIGURE 18. RS-485, DRIVER OUTPUT CURRENT vs SHORT
CIRCUIT VOLTAGE
20
1
-40
-25
0
25
50
75
85
TEMPERATURE (°C)
FIGURE 19. SUPPLY CURRENT vs TEMPERATURE
FN6202.1
December 20, 2005
ISL81334, ISL41334
Typical Performance Curves
VCC = VL = 5V, TA = 25°C; Unless Otherwise Specified (Continued)
600
10m
NO LOAD
VIN = VL or GND
LB = VL
VL ≤ VCC
NO LOAD
VIN = VL or GND
LB = VL
ON = DZ/DE = DY = GND
500
VL > VCC
RS-232/RS-485 ICC
1m
ICC and IL (µA)
IL (A)
400
RS-485, DE = ON = SP = GND
100µ
300
200
RS-232, ON = GND, SP = VL
10µ
100
RS-485, DE = ON = GND, SP = VL
1µ
SP = GND
RS-485 IL
SP = VL RS-232 IL
0
2
3
4
5
2
6
2.5
3
3.5
VL (V)
FIGURE 20. RS-232, VL SUPPLY CURRENT vs VL VOLTAGE
(QFN ONLY)
4.5
5
FIGURE 21. VCC and VL SHDN SUPPLY CURRENTS vs VL
VOLTAGE (QFN ONLY)
400
1700
RDIFF = 54Ω, CL = 100pF
RDIFF = 54Ω, CL = 100pF
350
1650
|tPHLZ - tPLHY|
300
1600
SKEW (ns)
PROPAGATION DELAY (ns)
4
VL (V)
tDHL
1550
tDLH
200
150
1500
100
tDHL
1450
1400
-40
|tPLHZ - tPHLY|
250
|tDLH - tDHL|
50
-25
0
25
50
75
85
TEMPERATURE (°C)
FIGURE 22. RS-485, DRIVER PROPAGATION DELAY vs
TEMPERATURE (SLOW DATA RATE, QFN ONLY)
21
-40
-25
0
25
50
75
85
TEMPERATURE (°C)
FIGURE 23. RS-485, DRIVER SKEW vs TEMPERATURE
(SLOW DATA RATE, QFN ONLY)
FN6202.1
December 20, 2005
ISL81334, ISL41334
Typical Performance Curves
VCC = VL = 5V, TA = 25°C; Unless Otherwise Specified (Continued)
560
550
120
RDIFF = 54Ω, CL = 100pF
RDIFF = 54Ω, CL = 100pF
530
|tPHLZ - tPLHY|
80
SKEW (ns)
520
tDHL
510
tDLH
500
60
|tPLHZ - tPHLY|
40
tDHL
490
20
480
|tDLH - tDHL|
470
-40
-25
0
50
25
75
0
-40
85
0
-25
TEMPERATURE (°C)
FIGURE 24. RS-485, DRIVER PROPAGATION DELAY vs
TEMPERATURE (MEDIUM DATA RATE, QFN
ONLY)
RDIFF = 54Ω, CL = 100pF
2
35
|tDLH - tDHL|
SKEW (ns)
PROPAGATION DELAY (ns)
85
75
2.5
RDIFF = 54Ω, CL = 100pF
tDHL
30
tDLH
1.5
1
|tPLHZ - tPHLY|
25
0.5
20
-40
-25
0
25
50
|tPHLZ - tPLHY|
0
-40
-25
85
75
TEMPERATURE (°C)
RA
0
4
3
2
DRIVER OUTPUT (V)
5
RECEIVER OUTPUT (V)
0
DRIVER INPUT (V)
5
5
Y
Z
1
0
TIME (400ns/DIV)
FIGURE 28. RS-485, DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH (SLOW DATA RATE, QFN ONLY)
22
25
50
75
85
FIGURE 27. RS-485, DRIVER SKEW vs TEMPERATURE
(FAST DATA RATE)
RDIFF = 60Ω, CL = 100pF
DY
0
TEMPERATURE (°C)
FIGURE 26. RS-485, DRIVER PROPAGATION DELAY vs
TEMPERATURE (FAST DATA RATE)
RECEIVER OUTPUT (V)
50
FIGURE 25. RS-485, DRIVER SKEW vs TEMPERATURE
(MEDIUM DATA RATE, QFN ONLY)
40
DRIVER OUTPUT (V)
25
TEMPERATURE (°C)
RDIFF = 60Ω, CL = 100pF
5
DY
5
0
RA
DRIVER INPUT (V)
PROPAGATION DELAY (ns)
100
540
0
5
4
3
2
1
Z
Y
0
TIME (400ns/DIV)
FIGURE 29. RS-485, DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW (SLOW DATA RATE, QFN ONLY)
FN6202.1
December 20, 2005
ISL81334, ISL41334
DY
0
RA
0
5
4
Y
3
2
Z
1
0
5
DY
5
RA
0
5
4
Z
3
2
Y
1
0
TIME (200ns/DIV)
TIME (200ns/DIV)
DY
0
RA
0
5
4
3
2
RECEIVER OUTPUT (V)
5
DRIVER INPUT (V)
RDIFF = 60Ω, CL = 100pF
FIGURE 31. RS-485, DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW (MEDIUM DATA RATE, QFN ONLY)
DRIVER OUTPUT (V)
DRIVER OUTPUT (V)
RECEIVER OUTPUT (V)
FIGURE 30. RS-485, DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH (MEDIUM DATA RATE, QFN ONLY)
5
Y
Z
1
0
RDIFF = 60Ω, CL = 100pF
5
DY
5
RA
5
4
Z
3
2
Y
1
0
TIME (10ns/DIV)
FIGURE 32. RS-485, DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH (FAST DATA RATE)
FIGURE 33. RS-485, DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW (FAST DATA RATE)
7.5
VOUT+
5
2.5
ALL TOUTS LOADED WITH 3kΩ TO GND
500kbps
0
1 TRANSMITTER/PORT AT 250kbps or 500kbps,
OTHER TRANSMITTERS AT 30kbps
-2.5
500kbps
-5
VOUT -
250kbps
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
FIGURE 34. RS-232, TRANSMITTER OUTPUT VOLTAGE vs
LOAD CAPACITANCE
23
TRANSMITTER OUTPUT VOLTAGE (V)
250kbps
RS-232 REGION OF NONCOMPLIANCE
7.5
TRANSMITTER OUTPUT VOLTAGE (V)
0
0
TIME (10ns/DIV)
-7.5
0
DRIVER INPUT (V)
5
RDIFF = 60Ω, CL = 100pF
DRIVER INPUT (V)
5
RECEIVER OUTPUT (V)
RDIFF = 60Ω, CL = 100pF
DRIVER INPUT (V)
VCC = VL = 5V, TA = 25°C; Unless Otherwise Specified (Continued)
DRIVER OUTPUT (V)
DRIVER OUTPUT (V)
RECEIVER OUTPUT (V)
Typical Performance Curves
5
VOUT+
2.5
0
OUTPUTS STATIC
ALL TOUTS LOADED WITH 3kΩ TO GND
-2.5
-5
-7.5
-40
VOUT -
-25
0
25
TEMPERATURE (°C)
50
75
85
FIGURE 35. RS-232, TRANSMITTER OUTPUT VOLTAGE vs
TEMPERATURE
FN6202.1
December 20, 2005
ISL81334, ISL41334
Typical Performance Curves
VCC = VL = 5V, TA = 25°C; Unless Otherwise Specified (Continued)
TRANSMITTER OUTPUT CURRENT (mA)
40
30
Y or Z = LOW
CL = 3500pF, 1 CHANNEL SWITCHING/PORT
5
20
DY
0
10
5
VOUT SHORTED TO GND
0
0
Y/A
-10
-5
-20
5
Y or Z = HIGH
-30
RA
0
-40
-40
0
-25
25
50
85
75
2µs/DIV.
TEMPERATURE (°C)
FIGURE 37. RS-232, TRANSMITTER AND RECEIVER
WAVEFORMS AT 250kbps
FIGURE 36. RS-232, TRANSMITTER SHORT CIRCUIT
CURRENT vs TEMPERATURE
60
0
RECEIVER + DUTY CYCLE (%)
5
VIN = ±5V
CL = 1000pF, 1 CHANNEL SWITCHING/PORT
DY
5
0
Y/A
-5
5
RA
FULL TEMP RANGE
58
56
54
SR IN = 15V/µs
52
SR IN = 100V/µs
50
0
48
500
50
FIGURE 38. RS-232, TRANSMITTER AND RECEIVER
WAVEFORMS AT 500kbps
ALL TOUTS LOADED WITH 5kΩ TO GND
DATA RATE (kbps)
800
700
2 TRANSMITTERS AT 25°C
600
1 TRANSMITTER AT 25°C
500
400
300
200
1 TRANSMITTER AT 85°C
2 TRANSMITTERS AT 85°C
100
100
1000
2000
3000
LOAD CAPACITANCE (pF)
4000
5000
FIGURE 40. RS-232, TRANSMITTER MAXIMUM DATA RATE vs
LOAD CAPACITANCE
24
2000
7.5
VOUT+
5
25°C
85°C
2.5
1 TRANSMITTER SWITCHING ON EACH PORT
0
ALL TOUTS LOADED WITH 5kΩ TO GND, CL = 1000pF
-2.5
85°C
-5
VOUT -
25°C
-7.5
0
100
200
300
400
500
600
700
RS-232 REGION OF NONCOMPLIANCE
VOUT ≥ ±4V
900
1500
FIGURE 39. RS-232, RECEIVER OUTPUT +DUTY CYCLE vs
DATA RATE
TRANSMITTER OUTPUT VOLTAGE (V)
1100
1000
1000
DATA RATE (kbps)
1µs/DIV.
800
DATA RATE (kbps)
FIGURE 41. RS-232, TRANSMITTER OUTPUT VOLTAGE vs
DATA RATE
FN6202.1
December 20, 2005
ISL81334, ISL41334
Typical Performance Curves
VCC = VL = 5V, TA = 25°C; Unless Otherwise Specified (Continued)
100
450
1 TRANSMITTER SWITCHING ON EACH PORT
ALL TOUTS LOADED WITH 3kΩ TO GND, CL = 1000pF
400
FAST
10
JITTER (%)
350
SKEW (ns)
MED
SLOW
85°C
300
250
1
25°C
200
150
50
150
250
350
450
550
650
DOUBLE TERM’ED WITH 121Ω
0.1
750
32 100
200
300
DATA RATE (kbps)
FIGURE 42. RS-232, TRANSMITTER SKEW vs DATA RATE
500
600
700
800
900 1000
FIGURE 43. RS-485, TRANSMITTER JITTER vs DATA RATE
WITH 2000’ CAT 5 CABLE
100
100
SLOW
SLOW
MED
MED
10
FAST
1
DOUBLE TERM’ED WITH 121Ω
0.1
32 100
200
300
400
500
600
700
800
900 1000
DATA RATE (kbps)
FIGURE 44. RS-485, TRANSMITTER JITTER vs DATA RATE
WITH 1000’ CAT 5 CABLE
JITTER (%)
10
JITTER (%)
400
DATA RATE (kbps)
FAST
1
DOUBLE TERM’ED WITH 121Ω
0.1
32 100
200
300
400
500
600
700
800
900 1000
DATA RATE (kbps)
FIGURE 45. RS-485, TRANSMITTER JITTER vs DATA RATE
WITH 350’ CAT 5 CABLE
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
4838
PROCESS:
BiCMOS
25
FN6202.1
December 20, 2005
ISL81334, ISL41334
Small Outline Plastic Packages (SOIC)
M28.3 (JEDEC MS-013-AE ISSUE C)
N
INDEX
AREA
28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
H
0.25(0.010) M
B M
INCHES
E
SYMBOL
-B-
1
2
3
L
SEATING PLANE
-A-
h x 45o
A
D
-C-
e
A1
B
0.25(0.010) M
C
0.10(0.004)
C A M
B S
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication Number 95.
MILLIMETERS
MIN
MAX
NOTES
A
0.0926
0.1043
2.35
2.65
-
0.0040
0.0118
0.10
0.30
-
B
0.013
0.0200
0.33
0.51
9
C
0.0091
0.0125
0.23
0.32
-
D
0.6969
0.7125
17.70
18.10
3
E
0.2914
0.2992
7.40
7.60
4
0.05 BSC
1.27 BSC
H
0.394
h
0.01
0.029
L
0.016
0.050
8o
0o
N
α
NOTES:
MAX
A1
e
α
MIN
0.419
-
0.25
0.75
5
0.40
1.27
6
28
0o
-
10.65
10.00
28
7
8o
Rev. 0 12/93
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
26
FN6202.1
December 20, 2005
ISL81334, ISL41334
Shrink Small Outline Plastic Packages (SSOP)
M28.209 (JEDEC MO-150-AH ISSUE B)
N
INDEX
AREA
28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
H
0.25(0.010) M
2
GAUGE
PLANE
3
0.25
0.010
SEATING PLANE
-A-
INCHES
E
-B-
1
B M
A
D
-C-
α
e
C
0.10(0.004)
C A M
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
-
0.078
-
2.00
-
A1
0.002
-
0.05
-
-
A2
0.065
0.072
1.65
1.85
-
B
0.009
0.014
0.22
0.38
9
C
0.004
0.009
0.09
0.25
-
D
0.390
0.413
9.90
10.50
3
E
0.197
0.220
5.00
5.60
4
e
A2
A1
B
0.25(0.010) M
L
B S
NOTES:
0.026 BSC
H
0.292
L
0.022
N
α
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication Number 95.
MILLIMETERS
0.65 BSC
0.322
7.40
0.037
0.55
28
0°
-
8.20
-
0.95
6
28
8°
0°
7
8°
Rev. 2 6/05
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.20mm (0.0078
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.13mm (0.005 inch) total in excess of
“B” dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
27
FN6202.1
December 20, 2005
ISL81334, ISL41334
Quad Flat No-Lead Plastic Package (QFN)
Micro Lead Frame Plastic Package (MLFP)
L40.6x6
40 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
(COMPLIANT TO JEDEC MO-220VJJD-2 ISSUE C)
MILLIMETERS
SYMBOL
MIN
NOMINAL
MAX
NOTES
A
0.80
0.90
1.00
-
A1
-
-
0.05
-
A2
-
-
1.00
A3
b
0.18
D
0.23
9
0.30
5, 8
6.00 BSC
D1
D2
9
0.20 REF
-
5.75 BSC
3.95
4.10
9
4.25
7, 8
E
6.00 BSC
-
E1
5.75 BSC
9
E2
3.95
e
4.10
4.25
7, 8
0.50 BSC
-
k
0.25
-
-
-
L
0.30
0.40
0.50
8
L1
-
-
0.15
10
N
40
2
Nd
10
3
Ne
10
3
P
-
-
0.60
9
θ
-
-
12
9
Rev. 1 10/02
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on each D and E.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensions are provided to assist with PCB Land Pattern
Design efforts, see Intersil Technical Brief TB389.
9. Features and dimensions A2, A3, D1, E1, P & θ are present when
Anvil singulation method is used and not present for saw
singulation.
10. Depending on the method of lead termination at the edge of the
package, a maximum 0.15mm pull back (L1) maybe present. L
minus L1 to be equal to or greater than 0.3mm.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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28
FN6202.1
December 20, 2005