PD - 95419 IRFI530NPbF HEXFET® Power MOSFET l l l l l l Advanced Process Technology Isolated Package High Voltage Isolation = 2.5KVRMS Sink to Lead Creepage Dist. = 4.8mm Fully Avalanche Rated Lead-Free D VDSS = 100V RDS(on) = 0.11Ω G Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. The TO-220 Fullpak eliminates the need for additional insulating hardware in commercial-industrial applications. The moulding compound used provides a high isolation capability and a low thermal resistance between the tab and external heatsink. This isolation is equivalent to using a 100 micron mica barrier with standard TO-220 product. The Fullpak is mounted to a heatsink using a single clip or by a single screw fixing. TO-220 FULLPAK Absolute Maximum Ratings ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG ID = 12A S Parameter Max. Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Current Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw. 12 8.6 60 41 0.27 ±20 150 9.0 4.1 5.0 -55 to + 175 Units A W W/°C V mJ A mJ V/ns °C 300 (1.6mm from case) 10 lbfin (1.1Nm) Thermal Resistance Parameter RθJC RθJA Junction-to-Case Junction-to-Ambient Min. Typ. Max. 3.7 65 Units °C/W 06/16/04 IRFI530NPbF Electrical Characteristics @ TJ = 25°C (unless otherwise specified) RDS(on) VGS(th) g fs Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Min. 100 2.0 6.4 IDSS Drain-to-Source Leakage Current LD Internal Drain Inductance LS Internal Source Inductance Ciss Coss Crss C Input Capacitance Output Capacitance Reverse Transfer Capacitance Drain to Sink Capacitance V(BR)DSS ∆V(BR)DSS/∆TJ IGSS Typ. Max. Units Conditions V VGS = 0V, ID = 250µA 0.12 V/°C Reference to 25°C, ID = 1mA 0.11 Ω VGS = 10V, ID = 6.6A 4.0 V VDS = VGS, ID = 250µA S VDS = 50V, ID = 9.0A 25 VDS = 100V, V GS = 0V µA 250 VDS = 80V, VGS = 0V, TJ = 150°C 100 VGS = 20V nA -100 VGS = -20V 44 ID = 9.0A 6.2 nC VDS = 80V 21 VGS = 10V, See Fig. 6 and 13 6.4 VDD = 50V 27 ID = 9.0A ns 37 RG = 12Ω 25 RD = 5.5Ω, See Fig. 10 Between lead, 4.5 6mm (0.25in.) nH from package 7.5 and center of die contact 640 VGS = 0V 160 VDS = 25V pF 88 = 1.0MHz, See Fig. 5 12 = 1.0MHz D G S Source-Drain Ratings and Characteristics IS I SM VSD t rr Q rr Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Min. Typ. Max. Units 12 60 130 650 1.3 190 970 A V ns nC Conditions MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25°C, IS = 6.6A, V GS = 0V TJ = 25°C, IF = 9.0A di/dt = 100A/µs Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) VDD = 15V, starting TJ = 25°C, L = 3.1mH RG = 25Ω, IAS = 9.0A. (See Figure 12) ISD ≤ 9.0A, di/dt ≤ 520A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C Pulse width ≤ 300µs; duty cycle ≤ 2%. t=60s, =60Hz Uses IRF530N data and test conditions D G S IRFI530NPbF 100 100 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 10 4.5V 20µs PULSE WIDTH TJ = 25°C 1 0.1 1 10 A 10 4.5V 20µs PULSE WIDTH TJ = 175°C 1 0.1 100 3.0 R DS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) 100 TJ = 25°C TJ = 175°C 10 V DS = 50V 20µs PULSE WIDTH 5 6 7 8 9 10 A 100 Fig 2. Typical Output Characteristics Fig 1. Typical Output Characteristics 1 1 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) 4 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP I , Drain-to-Source Current (A) D I , Drain-to-Source Current (A) D TOP 10 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics A I D = 15A 2.5 2.0 1.5 1.0 0.5 VGS = 10V 0.0 -60 -40 -20 0 20 40 60 A 80 100 120 140 160 180 TJ , Junction Temperature (°C) Fig 4. Normalized On-Resistance Vs. Temperature IRFI530NPbF 1200 V GS , Gate-to-Source Voltage (V) 1000 C, Capacitance (pF) 20 V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd C oss = Cds + C gd V DS = 80V V DS = 50V V DS = 20V 16 Ciss 800 12 600 Coss 400 Crss 200 0 A 1 10 8 4 FOR TEST CIRCUIT SEE FIGURE 13 0 100 0 5 10 15 20 25 30 35 VDS , Drain-to-Source Voltage (V) Q G , Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 100 40 A 45 1000 OPERATION IN THIS AREA LIMITED BY R DS(on) I D , Drain Current (A) ISD , Reverse Drain Current (A) I D = 9.0A TJ = 175°C 10 TJ = 25°C VGS = 0V 1 0.4 0.6 0.8 1.0 1.2 1.4 VSD , Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage A 1.6 100 10µs 10 100µs 1ms TC = 25°C TJ = 175°C Single Pulse 1 1 10ms 10 100 A 1000 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area IRFI530NPbF V GS RG ID , Drain Current (A) RD VDS 8.0 D.U.T. + -V DD 6.0 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 4.0 Fig 10a. Switching Time Test Circuit VDS 2.0 90% 0.0 25 50 75 100 125 150 175 TC , Case Temperature ( °C) 10% VGS td(on) Fig 9. Maximum Drain Current Vs. Case Temperature tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 D = 0.50 1 0.20 0.10 0.05 0.1 0.01 0.00001 0.02 0.01 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 10 IRFI530NPbF D.U.T. RG + - VDD IAS 10 V tp 0.01Ω Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp VDD E AS , Single Pulse Avalanche Energy (mJ) L VDS 350 TOP 300 BOTTOM ID 3.7A 6.4A 9.0A 250 200 150 100 50 0 VDD = 25V 25 50 A 75 100 125 150 175 Starting TJ , Junction Temperature (°C) VDS Fig 12c. Maximum Avalanche Energy Vs. Drain Current IAS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V .2µF .3µF 10 V QGS D.U.T. QGD + V - DS VGS VG 3mA IG Charge Fig 13a. Basic Gate Charge Waveform ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit IRFI530NPbF Peak Diode Recovery dv/dt Test Circuit Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + D.U.T + - - + RG • • • • dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Driver Gate Drive P.W. Period D= + - VDD P.W. Period VGS=10V D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS ISD * IRFI530NPbF TO-220 Full-Pak Package Outline Dimensions are shown in millimeters (inches) TO-220 Full-Pak Part Marking Information E XAMP L E : T H IS IS AN IR F I840G W IT H AS S E MB L Y L OT COD E 3432 AS S E MB L E D ON WW 24 1999 IN T H E AS S E MB L Y L IN E "K " P AR T N U M B E R IN T E R N AT IONAL R E CT IF IE R L OGO IR F I840G 924K 34 Note: "P" in assembly line position indicates "Lead-Free" AS S E M B L Y L OT COD E 32 DAT E COD E YE AR 9 = 1999 WE E K 24 L IN E K Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 06/04 Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/