1MX8 BIT CMOS MASK ROM AC23V8000 Description The AC23V8000 high performance read only memory is organized 1,048,576 x 8 bit (byte mode) and has an access time of 70/100/120ns. The low power feature allows the battery operation. The large size of 8M bit memory density is ideal for charactergenerator, data or program memory in micro-processor application. The AC23V8000 is provided as die form in waffle pack tray. Key features Pin Description • 1,048,576 X 8bit organiszation • Single 3.3V power supply operation • Access Time : 70/100/120ns (Max) • Standby Current : 50 (Max) • Operating Current : 35 (Max) • TTL compatible inputs and outputs • 3-State outputs for wired-OR expansion • Programmable CE or OE pin • Fully static operation • Package AC23V8000 : Die in waffle pack tray Pin Function A0~A19 Address inputs Q0~Q7 Data Outputs CEB* Chip Enable input OEB* Output Enable input VCC Power supply VSS Ground * User selectable polarity • CEB : CE/CEB • OEB : OE/OEB A19 VCC VCC 5 4 6 7 3 2 1 46 45 44 43 NC A5 42 41 40 39 NC A8 8 9 38 37 NC A9 A4 10 36 A11 NC 11 35 NC NC NC 12 13 34 33 NC NC A3 14 32 OEB A2 15 31 A10 A1 16 30 CEB A0 17 29 Q7 NC 18 19 20 21 22 23 24 25 26 28 27 Q6 Q1 Q2 NC VSS VSS Q4 Q5 47 Q3 Q0 Page 1 of 6 A14 A13 A15 A16 NC A6 A18 A17 A7 A12 Pin Configuration Bonding Pad No Bonding Pad ARTCHIPs 1MX8 BIT CMOS MASK ROM AC23V8000 Block Diagram A0~A19 X-PREDEC Y-PREDEC X-DECODER ADDRESS BUFFER MEMORY ARRAY 8MBIT ROM CELL Y-DECODER SENSE AMP CEB OEB CONTROL CIRCUIT OUTPUT CIRCUIT Q0~Q7 Page 2 of 6 ARTCHIPs 1MX8 BIT CMOS MASK ROM AC23V8000 Absolute Maximum Ratings Symbol Parameter Rating Unit TA Ambient Operating Temperature -10 ~ 80 O C TSTG Storage Temperature -55 ~ 150 O C VCC Supply Voltage to Ground Potential -0.3 ~ 4.5 V VOUT Output Voltage -0.3~Vcc+0.3 V VIN Input Voltage -0.3~Vcc+0.3 V Stress above those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied and exposure to absolute maximum rating conditions for extended periods may affect device reliability. Recommended DC Operating Conditions(VCC=3.3·0.3V, TA=0~70O C ) Symbol Parameter Min Typ Max Unit Vcc Supply Voltage 3.0 3.3 3.6 V Vss Supply Voltage 0 0 0 V VIH Input High Voltage 2.2 Vcc+0.3 V VIL Input Low Voltage -0.3 0.8 V DC Electrical Characteristics(VCC=3.3·0.3V, TA=0~70 O C ) Symbol Parameter Condition VOH Output High Voltage IOH=-0.4mA VOL Output Low Voltage IOL=2.1mA IIL Input Leakage Current VIN=0V to VCC IOL Output Leakage Current VOUT=0V to VCC ICC Operating Supply Current CEB=OEB=VIL All Output Open (tRC=100ns) Min Typ Max 2.4 Unit V 0.4 V 10 uA 10 uA 35 mA ISB1 Standby Current(TTL) CEB=VIH, all Output Open 500 uA ISB2 Standby Current(CMOS) CEB=VCC, all Output Open 50 uA Page 3 of 6 ARTCHIPs 1MX8 BIT CMOS MASK ROM AC23V8000 Capacitance(TA=25O C , f=1.0MHz) Symbol Parameter Condition Min Max Unit CI Input Capacitance VIN = 0V 10 pF CO Output Capacitance VOUT = 0V 10 pF Capacitance is periodically sampled and not 100% tested Function Table CE/CE OE/OE Mode Data Power L/H X Standby High Z Standby H/L Operating DOUT L/H Output Disable High Z H/L Active AC Characteristics(VCC=3.3·0.3V, TA=0~70 O C ) 70ns Symbol 100ns 120ns Parameter Unit Min Max Min Max Min Max tRC Read cycle time tACE Chip enable access time 70 100 120 ns tAA Address access time 70 100 120 ns tAOE Output enable access time 35 50 60 ns tOH Output hold time from address change tHZ Output or chip disable to output High-Z tLZ Output or chip Enable to output Low-Z 70 100 0 0 20 10 ns 120 ns 0 20 10 20 10 ns ns AC Test Condition • Input pulse level • Input rise and fall time • Input and output timing level • Output load Page 4 of 6 0.4V to 2.4V 10ns 1.5V 1 TTL gate and CL=100pF(70ns product CL=30pF) ARTCHIPs 1MX8 BIT CMOS MASK ROM AC23V8000 Timing Waveforms READ MODE tRC ADD A0~A19 ADD1 ADD2 tHZ tACE CEB:ACTIVE LOW CE/CEB CE:ACTIVE HIGH tAOE tAA OEB:ACTIVE LOW OE/OEB OE:ACTIVE HIGH tLZ Q0~Q7 Page 5 of 6 tLZ tOH VALID VALID ARTCHIPs 1MX8 BIT CMOS MASK ROM AC23V8000 Revision History Rev No. Date Contents rev0 10-Mar-2001 rev1 09-Jan-2002 Package dimension modified rev2 16-June-2003 Package exempted and pad diagram added Page 6 of 6 ARTCHIPs